使用多相降压转换器的好处

Analog Applications JournalHigh-Performance Analog Products www.ti.com/aaj 1Q 2012 Texas Instruments Incorporated 8 Benefits of a multiphase buck converter Introduction Single-phase buck controllers work well for low-voltage converter applications with cur- rents of up to approximately 25 A, but power dissipation and efficiency start to become an issue at higher currents. One suitable approach is to use a multiphase buck controller. This article briefly dis cusses the benefits of using a multiphase buck converter versus a single- phase converter and the value a multiphase buck converter can provide when implemented. Figure 1 shows a two-phase circuit. From this circuit’s waveforms, shown in Figure 2, it is clear that the phases are interleaved. Inter leav- ing reduces ripple currents at the input and output. It also reduces hot spots on a printed circuit board or a particular component. In effect, a two-phase buck con verter reduces the RMS-current power dissipation in the FETs and inductors by half. Interleaving also reduces transitional losses. Output-filter consideration The output-filter requirements decrease in a multiphase implementation due to the reduced current in the power stage for each phase. For a 40-A, two-phase solution, an average current of only 20 A is delivered to each inductor. Compared to a 40-A single-phase approach, the inductance and inductor size are drastically reduced because of lower average current and lower saturation current. Output ripple voltage Ripple-current cancellation in the output-filter stage results in a reduced ripple voltage across the output capacitor compared to a single-phase converter. This is another reason why a multi- phase converter is preferred. Equations 1 and 2 calculate the percentage of ripple current can- celed in each inductor. m D Phases� � (1) and By David Baba Applications Engineering Manager Power Management Q1 Gate Multiphase Controller Q3 Gate Phase 1 Node Phase 2 Node L1 L2 Q2 Gate Q4 Gate Q1 Q3 Q2 Q4 VIN VIN VOUT Figure 1. Two-phase buck converter Phase 1 Phase 2 1.628 1.629 1.630 1.631 1.632 1.633 1.634 Time (ms) S w it c h -N o d e V o lt a g e ( V ) 6 5 4 3 2 1 0 Figure 2. Node waveforms of phases 1 and 2 Rip _ normI (D) mp(D) 1 mp(D) D D Phases PhasesPhases , (1 D) D � �� � � � �� � � � � �� � � (2) ๑ᆩܠ၎ইუገ࣑ഗڦࡻت ፕኁǖDavid BabaLjڤዝᅏഗ (TI) ᆌᆩ߾ײևঢ়૙ ᆅჾ ܔᇀۉୁሞ 25 A ፑᆸڦگუገ࣑ഗᆌᆩܸ ჾLjڇ၎ইუ੦዆ഗݥ׉ᆶၳăැۉୁምٷ ڦࣆLjࠀࡼࢅၳ୲৽ਸ๔ׯྺ࿚༶ăᅃዖড ࡻڦݛ݆๟๑ᆩܠ၎ইუ੦዆ഗăԨ࿔ॽ० ڇԲড๑ᆩܠ၎ইუገ࣑ഗࢅڇ၎ገ࣑ഗڦ ࡻتLjժຫ௽ۉୟํ၄้ᅃ߲ܠ၎ইუገ࣑ ഗీࠕ༵ࠃ๊஺ᄣڦኵă ཮ 1 ၂๖କᅃ੼ܾ၎ۉୟăᆯ޿ۉୟڦհႚ DŽ཮ 2 ໯๖Dž੗ᅜൣؤںੂڟ߳၎ࢻ၎঍ ٱăኄዖ঍ٱ੗३ณ๼෇ࢅ๼؜࿖հۉୁă ଷྔLj໲࣏३ณକᆇຘۉୟӱईኁగ߲༬ۨ ፇॲฉڦඤۅăํाฉLjܾ၎ইუገ࣑ഗඟ FET ࢅۉߌڦ RMS-ۉୁࠀࡼইگକᅃӷă၎ ঍ٱ࣏੗ᅜইگدڞ໦ࡼă ๼؜୳հഗ੊୯ ᆯᇀ௅߲၎࿋ڦࠀ୲पۉୁ߸گLjܠ၎ํ၄ ڦ๼؜୳հഗᄲ൱ᄺໜኮইگăܔᇀᅃ੼ 40-A ܾ၎঴ਦݛӄઠຫLjၠ௅߲ۉߌ༵ࠃڦ ೝ਩ۉୁৈྺ 20Aă၎Բ 40-A ڇ၎ݛ݆Ljᆯ ᇀೝ਩ۉୁࢅԏࢅۉୁ߸گLjۉߌࢅۉߌഗ ༹ओۼٷٷ३ၭă ๼؜࿖հۉუ ๼؜୳հഗपዐڦ࿖հۉୁڸၩ੗ټઠԲڇ ၎ገ࣑ഗ߸گڦ๼؜ۉඹഗ࿖հۉუăኄ৽ ๟ܠ၎ገ࣑ഗྺ๊஺๟๯჋ڦᇱᅺăݛײ๕ 1 ࢅݛײ๕ 2 ऺ໙؜କ௅߲ۉߌዐ໯ڸၩڦ ࿖հۉୁӥݴԲă ཮ 1 ܾ၎ইუገ࣑ഗ ཮ 2 ၎ 1 ࢅ 2 ڦবۅհႚ Texas Instruments Incorporated 9 Analog Applications Journal 1Q 2012 www.ti.com/aaj High-Performance Analog Products where D is the duty cycle, IRip_norm is the nor- malized ripple current as a function of D, and mp is the integer of m. Figure 3 plots these equations. For example, using two phases at a 20% duty cycle (D) yields a 25% reduction in ripple current. The amount of ripple volt- age the capacitor must tolerate is calculated by multiplying the ripple current by the capac- itor’s equivalent series resistance. Clearly, both maximum current and voltage requirements are reduced. Figure 4 shows the simulation results for a two-phase buck converter at a duty cycle of 25%. The inductor ripple current is 2.2 A, but the output capacitor sees only 1.5 A due to ripple-current cancellation. With a duty cycle of 50% and two phases, the capacitor sees no ripple current at all. Load-transient performance Load-transient performance is improved due to the reduction of energy stored in each out- put inductor. The reduction in ripple voltage as a result of current cancellation contributes to minimal output-voltage overshoot and under shoot because many cycles will pass before the loop responds. The lower the ripple current is, the less the perturbation will be. Power Management 0 10 20 30 40 50 60 70 80 90 100 Duty Cycle, D (%) 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 N o rm a li z e d R ip p le C u rr e n t Figure 3. Normalized capacitor ripple current as a function of duty cycle 4.463 4.464 4.465 4.466 Time (ms) 4.467 4.468 4.469 O u tp u t C a p a c it o r C u rr e n t ( A ) In d u c to r C u rr e n t ( A ) 24 22 20 18 16 14 12 10 8 6 4 2 6 4 2 0 –2 –4 Phase 1 Phase 2 Figure 4. Cancellation of inductor ripple current with D = 25% Cancellation of input RMS ripple current The input capacitors supply all the input current to the buck converter if the input wire to the converter is induc- tive. These capacitors should be carefully selected to satisfy the RMS-ripple-current requirements to ensure that they ഄዐLjD ྺ቞੣ԲLjIRip_norm ྺՔጚࣅڦ ࿖հۉୁLjഄྺ D ڦࡧຕLjܸ mp ྺm ڦ ኝຕă཮ 3 ྺኄၵݛײ๕ڦ൸၍཮ă૩සLj 20% ቞੣Բ (D) ้๑ᆩ 2 ߲၎Lj੗ইگ 25% ࿖հۉୁăۉඹഗՂႷ׶๴ڦ࿖հۉ უٷၭLj੗ཚࡗ࿖հۉୁױᅜۉඹഗڦڪၳ ز૴ۉፆऺ໙ڥڟă࢔௽၂Ljፌٷۉୁࢅۉ უᄲ൱ۼইگକă ཮ 4 ၂๖କ 25% ቞੣Բူᅃ߲ܾ၎ইუገ ࣑ഗڦݠኈ঳ࡕăۉߌ࿖հۉୁྺ2.2ALjڍ ๟๼؜ۉඹഗۉୁৈྺ 1.5ALjᇱᅺ๟࿖հۉ ୁڸၩă50% ቞੣Բူ๑ᆩܾ၎้Ljۉඹ ഗྜඇுᆶ࿖հۉୁă ޶ሜຨༀႠీ ᆯᇀ௅߲๼؜ۉߌዐ٪ئڦీଉইگLj޶ሜ ຨༀႠీໜኮ༵ߛăۉୁڸၩټઠڦ࿖հۉ უইگLjӻዺํ၄କፌၭ๼؜ۉუࡗ؋ࢅူ ؋Ljᅺྺሞ࣍ୟၚᆌᅜമႹܠዜ೺ۼᅙ঳ຐă࿖հۉ ୁሁگLj߅ඡሁၭă ๼෇ RMS ࿖հۉୁڸၩ සࡕ૶থገ࣑ഗڦ๼෇၍٪ሞۉߌၳᆌLjሶ๼෇ۉඹഗ ॽ໯ᆶ๼෇ۉୁࠃߴইუገ࣑ഗăᄲጮဦ჋ስኄၵۉඹ ഗLjᅜ஢ፁRMS࿖հۉୁᄲ൱Ljඓԍ໲்փࣷ؜၄ࡗ ඤጒༀă࢔௽၂Ljܔᇀᅃ߲ 50% ቞੣Բڦڇ၎ገ࣑ഗ ཮ 3 Քጚࣅۉඹഗ࿖հۉୁྺ቞੣Բڦࡧຕ ཮ 4 D=25% ้ۉߌ࿖հۉୁڸၩ Texas Instruments Incorporated 10 Analog Applications JournalHigh-Performance Analog Products www.ti.com/aaj 1Q 2012 Power Management Table 1. Operating conditions of LM3754 evaluation board Input voltage 10.8 to 13.2 V Output voltage 1.2 V ± 1% Output current 40 A (max) Switching frequency 300 kHz Module size 2 × 2 inches Circuit area 1.4 × 1.3 inches Module height 0.5 inches Air flow 200 LFM Number of phases 2 do not overheat. It is well understood that, for a single- phase converter with a duty cycle of 50%, the worst-case input RMS ripple current is typically rated at 50% of the output current. Figure 5 and Equation 3 indicate that, for a two-phase solution, the worst-case RMS ripple current occurs at duty cycles of 25 and 75% and is only 25% of the output current. Input _ norm mp(D) mp(D) 1 I (D) D D Phases Phases �� � � � � �� � � � � � (3) The value of a multiphase solution as compared to a single-phase solution is clear. Less input capacitance can be used to satisfy the RMS-ripple-current demands of the buck stage. Application example The LM3754 high-power-density evaluation board delivers 1.2 V at 40 A from a 12-V input supply. The board is 2 × 2 inches, and the area covered by the components is 1.4 × 1.3 inches. The switching frequency of each phase is set to 300 kHz. Table 1 provides a summary of these and other operating conditions. The components are placed on a 4-layer board, with 1 oz. of copper on all layers. Additional pins are included on this board for remote sensing, and a pin is used for margining the output voltage. Because the LM3754 evaluation board is designed to operate in high-power-density configurations, it utilizes the optimized input capacitors to provide the reduced RMS ripple current that is required. The evaluation board also has a low ripple voltage and good transient perform ance. The board layout shown in the LM3754 application note1 should be followed as closely as possible. However, if this is not possible, close attention should be paid to these considerations. Several more layout considerations will now be described, followed by the test results from a test board using the LM3754. These results are presented in Figures 6–11 on pages 12–13. They are typical of what one can expect to achieve or even improve upon in making the necessary modifications. Layout considerations High-current traces require enough copper to minimize voltage drops and temperature rises. The general rule of using a minimum of 7 mils per ampere was applied for the 2 oz. of copper used, and 14 mils per ampere for the inner layers for the 1 oz. of copper used. The input capacitors of each phase were placed as close as possible to the top MOSFET drain and the bottom MOSFET source to ensure minimal ground “bounce.” 0 10 20 30 40 50 60 70 80 90 100 Duty Cycle, D (%) 0.250 0.225 0.200 0.175 0.150 0.125 0.100 0.075 0.050 0.025 0 N o rm a li z e d I n p u t R M S R ip p le C u rr e n t Figure 5. Normalized input RMS ripple current as a function of duty cycle ઠຫLjट၌๼෇ RMS ࿖հۉୁᅃӯࠦۨྺ 50% ๼؜ ۉୁă཮ 5 ࢅݛײ๕ 3 ՗௽Lj๑ᆩܾ၎঴ਦݛӄ้Lj 25% ࢅ 75% ቞੣Բ้؜၄ट၌ RMS ࿖հۉୁLjഄৈ ྺ 25% ๼؜ۉୁă ၎Բڇ၎঴ਦݛӄLjܠ၎঴ਦݛӄڦኵ߸௽ඓăኻႴ ๑ᆩ߸ၭڦۉඹLjՍ੗஢ፁইუपڦ RMS ࿖հۉୁ Ⴔ൱ă ᆌᆩํ૩ LM3754 ߛࠀ୲௢܈ೠࠚӱཚࡗᅃ߲ 12-V ๼෇ۉᇸ ࠃۉLj༵ࠃۉუྺ 12VLjۉୁྺ 40Aă޿ೠࠚӱ༹ ओٷၭྺ 2 × 2 ᆈ٫Ljፇॲ቞ᆩ௬ओྺ 1.4 × 1.3 ᆈ ٫ă௅߲၎ڦਸ࠲ೕ୲ยۨྺ 300kHză՗ 1 ܔฉຎ तഄ໱߾ፕཉॲ৊ႜକ߁ઔăፇॲݣዃሞᅃ߲ 4 ֫ӱ ฉLj֫ฉཟྺ 1 Ӈິăӱฉ࣏ᆶᅃၵᆅগLjᆩᇀᇺײ ॠ֪Ljଷᆶᅃ߲ᆅগᆩᇀइڥ๼؜ۉუᇆଉă ߵ਍ยऺLjLM3754 ೠࠚӱᅜߛࠀ୲௢܈ದዃ߾ፕLj ᅺُ໲૧ᆩঢ়ࡗᆫࣅڦ๼෇ۉඹഗLjഄᄲ൱ڦRMS࿖ հۉୁ߸گăଷྔLjೠࠚӱ࣏ᆛᆶডگڦ࿖հۉუࢅ ডߛڦຨༀႠీăᆌ৑੗ీںፏთ LM3754 ᆌᆩຫ ௽঻ถڦӱքਆăڍ๟LjසࡕփీፏთኄዖքਆLjᆌ ௢ൎጀᅪฉຎ੊୯ᅺ໎ă၄ሞLj࿢்࣏ॽྺ౞ຫ௽ഄ ໱ᅃၵ੊୯ᅺ໎Ljኮࢫ๟๑ᆩ LM3754 ڦ֪๬ӱ֪ ๬঳ࡕăڼ 12-13 ᄻڦ཮ 6-11၂๖କኄၵ঳ࡕăሞ ৊ႜՂᄲڦႪ߀้Ljኄၵ঳ࡕՍ๟౞ႴᄲڥڟڦLjई ኁຫႴᄲ߀৊इڥڦణՔă ۉୟӱքਆ੊୯ ഽۉୁڞ၍ᄲ൱ᆶፁࠕڦཟLj֍ీፌၭࣅუইࢅ࿒ืă ᅃӯᇱሶ๟Lj2 Ӈິཟፌณ௅Ҿಢ 7 ௢ܺLjాև֫ 1 Ӈ ິཟፌณ௅Ҿಢ 14 ௢ܺă௅߲၎ڦ๼෇ۉඹഗۼᆌ৑ ੗ీں੍ৎۥև MOSFET ୑टࢅڹև MOSFET ᇸटݣ ዃLjᅜඓԍፌၭথںĐཌۯđă ૶থ዁ IC ڦ႑ࡽፇॲ ໯ᆶ૶থ዁ IC ڦၭ႑ࡽፇॲ਩৑੗ీں੍ৎ IC ݣዃă VREF ࢅ VCC ᳘ࢇۉඹഗᄺᄲ৑੗ీں੍ৎ ICăܔ႑ ๼෇ۉუ 10 .8 ڟ13 .2 V ๼؜ۉუ 1 .2 V ± 1% ๼؜ۉୁ 40 A (ፌٷ) ਸ࠲ೕ୲ 300 kHz ఇ੷༹ओ 2 × 2؅٫ ۉୟ௬ओ 1 .4 × 1 .3؅٫ ఇ੷ߛ܈ 0.5؅٫ ഘୁ 200 LFM ၎ຕ 2 ՗ 1 LM3754 ೠࠚӱ ߾ፕཉॲ ཮ 5 Քጚࣅ๼෇RMS࿖հۉୁྺ቞੣Բڦࡧຕ Texas Instruments Incorporated 11 Analog Applications Journal 1Q 2012 www.ti.com/aaj High-Performance Analog Products Power Management Signal components connected to the IC All small-signal components that connected to the IC were placed as close to it as possible. Decoupling capacitors for VREF and VCC were also placed as close as possible to the IC. The signal ground (SGND) was configured to ensure a low-impedance path from the ground of the signal compo- nents to the ground of the IC. SGND and PGND connections Good layout techniques include a dedicated ground plane; this board dedicated as much of inner-layer 2 as possible for the ground plane. Vias and signal lines were strategi- cally placed to avoid high-impedance points that could pinch off wide copper areas. The power ground (PGND) and SGND were kept separate, only connected to each other at the ground plane (inner layer 2). Gate drive The designer should ensure that a differential pair of traces is connected from the high-gate output to the top MOSFET gate and the return, which is the switch node. The distance between the controller and the MOSFET should be as short as possible. The same procedure should be followed for the LG and GND pins when the traces for the low-side MOSFET are routed. A differential pair of traces must also be routed from the CSM and CS2 pins to the RC network located across the output inductor. Notice in the layout in Reference 1 that, in order to provide additional noise suppression, the filter capacitor is split into two capacitors—one positioned by the inductor and the other close to the IC. These sense lines should not be run for long lengths in close proximity to the switch node. If possible, they should be shielded by using a ground plane. Minimizing the switch node To follow the common rules of keeping the switch-node area as small as possible but large enough to carry high currents, the switch node was built on multiple layers. Because the small evaluation board essentially folds back on itself from input to output, the switch node naturally sits on the outer layer, and the IC sits directly underneath the switch node. Therefore, it is essential to keep the switch node well away from the sense lines and also from the IC. Hence, the switch node was strategically placed facing outwards toward the edge of the board. Conclusion There are a number of benefits to using multiphase buck converters, such as higher efficiency from lower transi- tional losses; lower output ripple voltage; better transient performance; and lower ripple-current-rating requirements for the input capacitor. Some examples of multiphase buck converters that can deliver the full benefits described herein are the LM3754, LM5119, and LM25119 families. Reference 1. Robert Sheehan and Michael Null, “LM3753/54 evalua- tion board,” National Semiconductor Corp., Application Note 2021, Dec. 15, 2009 [Online]. Available: http:// www.national.com/an/AN/AN-2021.pdf Related Web sites power.ti.com www.ti.com/product/partnumber Replace partnumber with LM3754, LM5119, or LM25119 ࡽথں (SGND) ৊ႜದዃLjඓԍ႑ࡽፇॲথںڟICথں ኮक़ᆶᅃཉگፆੇཚୟă SGND ࢅ PGND ૶থ ডࡻڦքਆݛ݆Ԉઔጆᆩথں֫Ǘۉୟӱ৑੗ీܠںॽ ాև֫ 2 ጆᆩፕথں֫ăᆌٗࢢ࠵ฉܔཚ੥ࢅ႑ࡽ၍ ୟ৊ႜքਆLjՆ௨؜၄੗ీഞۖ੻ཟ൶ᇘڦᅃၵߛፆੇ ۅăඟۉᇸথں (PGND) ࢅ SGND ݴ૗ਸLjৈሞথں֫ DŽాև֫ 2Dž၎ࢻ૶থă ቆटൻۯ ยऺටᇵᆌඓԍߛቆट๼؜ڟۥև MOSFET ቆटڦ ઠ࣮ມၠֶۯܔڞ၍૶থLjഄྺਸ࠲বۅă੦዆ᇑ MOSFET ኮक़ڦਐ૗ᆌ৑੗ీں܌ăܔگ֨ MOSFET ڞ၍৊ႜքਆ้LjLG ࢅ GND ᆅগڦքਆᆌፏთ၎ཞڦ ߾ፕײႾă CSM ࢅ CS2 ᆅগڟحࡗ๼؜ۉߌڦ RC ྪஏኮक़Ljᄺ ՂႷ৊ႜֶۯܔք၍ăጀᅪĖ֖੊࿔၅ 1ėዐ঻ถڦք ਆLjྺକइڥ߸ߛڦሯำᅞ዆ႠీLj୳հഗۉඹԥݴָ ׯ 2 ߲ۉඹഗĊᅃ߲ݣዃᇀۉߌಖՉLjଷᅃ߲ሶ੍ৎ ICă੍ৎਸ࠲বۅ้Ljኄၵॠ֪၍ୟڦᆶၳ׊܈ড܌ă සࡕ੗ీLjᆌ๑ᆩᅃ߲থں֫ܔ໲்ํแೡԸă ፌၭࣅਸ࠲বۅ ᅃӯᇱሶ๟Ljඟਸ࠲বۅ௬ओ৑੗ీںၭLjڍᄲీࠕد ๼ഽۉୁLjᅺُਸ࠲বۅᄲ࿋ᇀܠ߲֫ฉăᆯᇀኄዖၭ ႙ೠࠚӱԨว੗ᅜٗ๼෇ڟ๼؜ችഐઠLj໯ᅜਸ࠲বۅ Ս࿋ᇀྔ֫ฉLjܸ IC ኱থ࿋ᇀਸ࠲বۅူ௬ăᅺُLj ՂႴඟਸ࠲বۅᇺ૗ॠ֪၍ୟLjཞ้ᄺᇺ૗ ICăኄᄣLj ਸ࠲বۅՍڥڟࢇ૙քਆLjၠྔוၠۉୟӱڦՉᇹă ঳ஃ ๑ᆩܠ၎ইუገ࣑ഗᆶႹܠࡻتLj૩සǖگࡗ܉໦ࡼټ ઠڦߛၳ୲Ăگ๼؜࿖հۉუĂߛຨༀႠీᅜत߸گڦ๼ ෇ۉඹഗ࿖հۉୁܮۨᄲ൱ڪăీࠕྺ౞ټઠฉຎዮܠࡻ تڦᅃၵܠ၎ইუገ࣑ഗ૩ጱԈઔ LM3754ĂLM5119 ࢅ LM25119 ဣଚׂ೗ă ֖੊࿔၅ ĐLM3753/54ೠࠚӱđLjፕኁǖRobert Sheehan ࢅ Michael NullLjெࡔࡔॆӷڞ༹ࠅິLj݀՗ᇀ 2009 ౎ 12ሆ਽ሞ၍ӲĖᆌᆩ๮֩2021ėLjူሜں኷ྺǖhttp:// www.national.com/an/AN/AN-2021.pdf ၎࠲ྪበ power.ti.com www.ti.com/product/partnumber ᆩ LM3754ĂLM5119 ईኁ LM25119 ༺࣑ں኷ዐڦ Đpartnumberđ Texas Instruments Incorporated 12 Analog Applications JournalHigh-Performance Analog Products www.ti.com/aaj 1Q 2012 Power Management Test results 4 8 12 I (A)OUT 16 20 24 28 32 36 40 90 85 80 75 70 65 E ff ic ie n c y ( % ) V = 1.2 VOUT V = 0.9 VOUT Figure 6. Efficiency plot with 12-V input 9.65 8.65 7.65 6.65 5.65 4.65 3.65 2.65 1.65 0.65 4 8 12 16 20 I (A)OUT 24 28 32 36 40 P o w e r L o s s ( W ) V = 1.2 VOUT V = 0.9 VOUT Figure 7. Power loss with 12-V input Figure 8. Switch-node voltages VIN = 12 V, VOUT = 1.2 V at 40 A ཮ 7 12-V ๼෇ࠀࡼ ཮ 8 ਸ࠲বۅۉუ ཮ 6 12-V ๼෇ၳ୲൸၍཮ Texas Instruments Incorporated 13 Analog Applications Journal 1Q 2012 www.ti.com/aaj High-Performance Analog Products Power Management Figure 9. Output voltage ripple VIN = 12 V, VOUT = 1.2 V at 40 A Figure 10. Transient response: 20 μs with 10-A load step (undershoot/overshoot ~ 27 mV) Figure 11. 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