键盘扫描及计算器VHDL仿真

------------------------------------------作者xxxx------------------------------------------日期xxxx键盘扫描及计算器VHDL仿真【精品文档】【精品文档】【精品文档】【精品文档】【精品文档】【精品文档】简易计算器设计——EDA实验 报告 软件系统测试报告下载sgs报告如何下载关于路面塌陷情况报告535n,sgs报告怎么下载竣工报告下载 实验内容实验要求：完成个位数的加减乘运算，输入用矩阵键盘，输出用数码管显示，每输入一次数据要显示在数码管上。矩阵键盘共16个按键，用其中10个做个位数的输入，用3个分别做加减乘运算，用其中1个做等于操作，各位数的运算结果最多两位，用动态扫描数码管显示运算结果。小组成员实现方法系统组成及连接原理如图所示，主要由由七个功能模块组成：分频模块（为键盘扫描模块和防抖模块提供时钟）、键盘扫描驱动模块（依次置零）、键盘按键值编码模块、键盘编码值防抖模块、运算模块，数码管显示驱动模块、动态扫描驱动模块。分频键值编码防抖键盘矩阵行驱动时钟数码管显示运算数码管动态显示1.分频模块由于FPGA实验板的原始时钟频率高达MHz，所以不能直接接入设计模块中使用，就需要用到分频模块。将分频到4KHz和10Hz来使用，一个用于行驱动扫描时钟，一个用于防抖模块。所以，采用写一个可变分频元件来调用。元件视图：主要代码如下（完整代码见附录，下同）：architectureRTLoffreq_divisioniscomponentfredivnisgeneric(n:positive);Port(clkin:inSTD_LOGIC;clkout:outSTD_LOGIC);endcomponent;beginU1:fredivngenericmap(n=>3)portmap(clkin=>clk,clkout=>clkout_kb);endRTL;仿真结果如下图：达到预期的目的2.行驱动模块（依次对行置零）：键盘扫描的原理就是 检测 工程第三方检测合同工程防雷检测合同植筋拉拔检测方案传感器技术课后答案检测机构通用要求培训 行列信号然后判断出具体是按下了哪一个按键。所以，对行依次置零，当置零频率较快时，按下某一个按键后，一定能得到某一列的信号输出为零，如下图：当行信号为1110时，若按下了0键，就会得到1110的列信号，立马就快可以译码出按键值，若按下4键、8键、C键则都不会有输出。主要代码如下：process(clkin)beginifclr='1'thencount<="00";elsifrising_edge(clkin)thenifcount="11"thencount<="00";elsecount<=count+1;endif;endif;endprocess;process(count)beginifcount="01"thenkeydrv<="1110";elsifcount="10"thenkeydrv<="1101";elsifcount="11"thenkeydrv<="1011";elsifcount="00"thenkeydrv<="0111";endif;endprocess;仿真结果如下图：达到预期的目的3.键值编码模块依据行驱动模块，当按下某一个按键后，立马可以根据行列和并位信号得到唯一的键盘编码值，用5位矢量来保存结果，当没有按键按下时，编码值一直保持着‘11111’不变，并在后端的模块中不对其做任何处理。以下列出部分编码 表 关于同志近三年现实表现材料材料类招标技术评分表图表与交易pdf视力表打印pdf用图表说话 pdf （完整编码表见附录）：十进制数行&列HEX七段码HEX011101110EE11111107E411011110DE011001133511011101DD10110115B主要代码如下：process(clk)beginifclr='0'thenifrising_edge(clk)theniftemp1="11101110"thenkeyvalue1<="00000";--0elsiftemp1="11101101"thenkeyvalue1<="00001";--1elsiftemp1="11101011"thenkeyvalue1<="00010";--2elsiftemp1="11100111"thenkeyvalue1<="00011";--3elsiftemp1="11011110"thenkeyvalue1<="00100";--4elsiftemp1="11011101"thenkeyvalue1<="00101";--5elsiftemp1="11011011"thenkeyvalue1<="00110";--6elsiftemp1="11010111"thenkeyvalue1<="00111";--7elsiftemp1="10111110"thenkeyvalue1<="01000";--8elsiftemp1="10111101"thenkeyvalue1<="01001";--9elsiftemp1="10111011"thenkeyvalue1<="01010";--10elsiftemp1="10110111"thenkeyvalue1<="01011";--11elsiftemp1="01111110"thenkeyvalue1<="01100";--12elsiftemp1="01111101"thenkeyvalue1<="01101";--13elsiftemp1="01111011"thenkeyvalue1<="01110";--14elsiftemp1="01110111"thenkeyvalue1<="01111";--15endif;endif;endif;endprocess;波形仿真如下图：4.防抖模块键盘按键物理模型如下：通常的按键所用开关为机械弹性开关，当机械触点断开、闭合时，由于机械触点的弹性作用，一个按键开关在闭合时不会马上稳定地接通，在断开时也不会一下子断开。因而在闭合及断开的瞬间均伴随有一连串的抖动，为了不产生这种现象而作的措施就是按键消抖。抖动时间的长短由按键的机械特性决定，一般为5ms～10ms。一般来说，软件消抖的方法是不断检测按键值，直到按键值稳定。实现方法：假设未按键时输入1，按键后输入为0，抖动时不定。可以做以下检测：检测到按键输入为0之后，延时5ms～10ms，再次检测，如果按键还为0，那么就认为有按键输入。延时的5ms～10ms恰好避开了抖动期。本模块是采用多次采样来达到防抖的，只有在给定的采样次数内，都保证采样结果一致时才会输出按键编码值。主要代码如下：casecountiswhen"0000"=>test1<=temp;when"0001"=>test2<=temp;when"0010"=>test3<=temp;when"0011"=>test4<=temp;when"0100"=>test5<=temp;when"0101"=>test6<=temp;when"0110"=>test7<=temp;when"0111"=>test8<=temp;when"1000"=>test9<=temp;when"1001"=>test10<=temp;when"1010"=>test11<=temp;when"1011"=>test12<=temp;when"1100"=>test13<=temp;when"1101"=>test14<=temp;when"1110"=>test15<=temp;when"1111"=>test16<=temp;whenothers=>null;endcase;iftest1=test5andtest2=test6andtest3=test7andtest4=test8andtest5=test9andtest6=test10andtest7=test11andtest8=test12andtest9=test13andtest10=test14andtest11=test15andtest12=test16andtest1/="UUUUUUUU"then仿真波形如下：从图中可以看出最终temp1从临时信号temp得到最终输出，达到防抖：5.运算模块当前段的模块经过防抖处理以后得到稳定的按键信号，比如1+2=3,转化为编码值就是11101101101110110111110111100111=>EDBBEB7DE7(具体编码表见附录)主要代码如下：ifysfh=0thenresult<=first+second;elsifysfh=1thenresult<=first-second;elsifysfh=2thenresult<=first*second;endif;n<=n+'1';elsifn="100"thenn<="000";endif;endif;endprocess;process(n)beginifn="001"thenkeyvaluein<=conv_std_logic_vector(first,8);elsifn="011"thenkeyvaluein<=conv_std_logic_vector(second,8);elsifn="100"thenkeyvaluein<=conv_std_logic_vector(result,8);endif;endprocess;仿真波形如下：以1+3=4和5x6=30为例：编码：01+03=0405X06=1E6.数码管显示模块以及动态扫描模块由于次两个模块是密切相关的，所以统一到一起验证。经过运算得到最终的显示结果后，要在七段数码管中显示，就必须有每一个数的七段码，同时，由于前面的运算模块的结果最大可以达到81，也就是需要8位二进制，两位十进制来表示，所以就必须通过显示模块来分离出十位和个位。分离出十位和个位以后，就必须要利用动态扫描使两个数都能显示出来。因为8个七段数码管的abcdefg位是连在一起的，只有利用分时间隔来显示，一次使能一个数码管，显示一位数，当频率较高时，就可以得到两位数的显示效果。数码管显示模块主要代码如下：ifnum=0thenten:=0;one:=10;elsifnum<10andnum>0thenten:=0;one:=num;elsifnum<20andnum>9thenten:=1;one:=num-10;elsifnum<30andnum>19thenten:=2;one:=num-20;elsifnum<40andnum>29thenten:=3;one:=num-30;elsifnum<50andnum>39thenten:=4;one:=num-40;elsifnum<60andnum>49thenten:=5;one:=num-50;elsifnum<70andnum>59thenten:=6;one:=num-60;elsifnum<80andnum>69thenten:=7;one:=num-70;elsifnum<90andnum>79thenten:=8;one:=num-80;elsifnum<100andnum>89thenten:=9;one:=num-90;endif;t<=conv_std_logic_vector(ten,4);o<=conv_std_logic_vector(one,4);动态扫描模块主要代码如下：ifcount="00"thenshowout<=show1;en<="00000010";elsifcount="01"thenshowout<=show2;en<="00000001";endif;仿真波形如下：数码显示模块Show1是十位数，show2是个位数，分别为7E(七段码十六进制)和30,即01。扫描显示模块数码管使能信号en依次在01和02中变化，翻译成八段码就是00000001和00000010模块调用将上述模块按照层次调用，就可以得到最顶层的文件，完成计算器的所有要求功能。调用图如下：扫描显示数码管显示运算模块后端处理防抖模块键盘编码行驱动顶层文件时钟模块：分频键盘最终的仿真波形如下：01=>showout01100003002=>showout11011016D03=>showout111100179由以上波形可以看出：01+02=03的计算完成了。 总结 初级经济法重点总结下载党员个人总结TXt高中句型全总结.doc高中句型全总结.doc理论力学知识点总结pdf 本次EDA设计实践，完成了从VHDL代码编写到硬件实现的整个 流程 快递问题件怎么处理流程河南自建厂房流程下载关于规范招聘需求审批流程制作流程表下载邮件下载流程设计 ，掌握了一些FPGA的相关概念以及ISE软件和Active-HDL软件的使用方法。最重要的就是组员之间的合作，因为VHDL程序是模块化编写的，所以不同模块是由不同人来完成编译的，要达到各个模块之间能够良好的衔接通信，就必须有一个很好的沟通交流，把大家的思路集中起来，一起讨论、编写、调试程序。【附录一】完整程序：分频：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entityfredivnisgeneric(n:integer:=3);Port(clkin:inSTD_LOGIC;clkout:outSTD_LOGIC);endfredivn;architectureBehavioraloffredivnissignalclk1:std_logic:='0';signalcounter:integerrange0ton;beginprocess(clkin)beginifrising_edge(clkin)thenifcounter=(n-1)/2thenclk1<=notclk1;counter<=0;elsecounter<=counter+1;endif;endif;endprocess;clkout<=clk1;endBehavioral;libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitykeyscanisPort(clr:instd_logic;clkin:inSTD_LOGIC;keydrv:outSTD_LOGIC_VECTOR(3downto0));endkeyscan;architecturebehavioralofkeyscanissignalcount:std_logic_vector(1downto0);beginprocess(clkin)beginifclr='1'thencount<="00";elsifrising_edge(clkin)thenifcount="11"thencount<="00";elsecount<=count+1;endif;endif;endprocess;process(count)beginifcount="01"thenkeydrv<="1110";elsifcount="10"thenkeydrv<="1101";elsifcount="11"thenkeydrv<="1011";elsifcount="00"thenkeydrv<="0111";endif;endprocess;endbehavioral;键值编码：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitykeydecoderisPort(clkin,clk,clr:instd_logic;keyin:inSTD_LOGIC_VECTOR(3downto0);keycode:outSTD_LOGIC_VECTOR(4downto0));endkeydecoder;architectureRtlofkeydecoderissignaltemp:STD_LOGIC_VECTOR(7downto0);signalkeydrv1:STD_LOGIC_VECTOR(3downto0);signalkeyvalue1:STD_LOGIC_VECTOR(4downto0);signaltemp1:STD_LOGIC_VECTOR(7downto0);componentkeyscanPort(clkin,clr:inSTD_LOGIC;keydrv:outSTD_LOGIC_VECTOR(3downto0));endcomponent;componentfandou1Port(clkin,clr:inSTD_LOGIC;temp:instd_logic_vector(7downto0);temp1:outSTD_LOGIC_VECTOR(7downto0));endcomponent;beginu1:keyscanportmap(clkin=>clkin,keydrv=>keydrv1,clr=>clr);temp<=keydrv1&keyin;u2:fandou1portmap(clkin=>clkin,temp=>temp,temp1=>temp1,clr=>clr);process(clk)beginifclr='0'thenifrising_edge(clk)theniftemp1="11101110"thenkeyvalue1<="00000";elsiftemp1="11101101"thenkeyvalue1<="00001";elsiftemp1="11101011"thenkeyvalue1<="00010";elsiftemp1="11100111"thenkeyvalue1<="00011";elsiftemp1="11011110"thenkeyvalue1<="00100";elsiftemp1="11011101"thenkeyvalue1<="00101";elsiftemp1="11011011"thenkeyvalue1<="00110";elsiftemp1="11010111"thenkeyvalue1<="00111";elsiftemp1="10111110"thenkeyvalue1<="01000";elsiftemp1="10111101"thenkeyvalue1<="01001";elsiftemp1="10111011"thenkeyvalue1<="01010";elsiftemp1="10110111"thenkeyvalue1<="01011";elsiftemp1="01111110"thenkeyvalue1<="01100";elsiftemp1="01111101"thenkeyvalue1<="01101";elsiftemp1="01111011"thenkeyvalue1<="01110";elsiftemp1="01110111"thenkeyvalue1<="01111";endif;endif;endif;endprocess;keycode<=keyvalue1;endrtl;防抖：libraryIEEE;useIEEE.STD_LOGIC_1164.all;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;useieee.numeric_std.all;entityfangdouisport(keycode:instd_logic_vector(4downto0);keycode1:outstd_logic_vector(4downto0);start:outstd_logic;clk_f,clr:instd_logic);endfangdou;architecturefangdouoffangdouissignalcount1:std_logic_vector(2downto0);signalkey1:std_logic_vector(4downto0);signalkey2:std_logic_vector(4downto0);signalkey3:std_logic_vector(4downto0);signalkey4:std_logic_vector(4downto0);signalkey5:std_logic_vector(4downto0);signalkey6:std_logic_vector(4downto0);signalkey7:std_logic_vector(4downto0);signalkey8:std_logic_vector(4downto0);signalstart_1:std_logic;beginprocess(clk_f)beginifclr='1'thenkey1<="00000";key2<="00001";key3<="00010";key4<="00011";key5<="00100";key6<="00101";key7<="00110";key8<="00111";count1<="000";start_1<='1';elseifrising_edge(clk_f)thenifcount1="111"thencount1<="000";elsecount1<=count1+'1';endif;endif;endif;casecount1iswhen"000"=>key1<=keycode;when"001"=>key2<=keycode;when"010"=>key3<=keycode;when"011"=>key4<=keycode;when"100"=>key5<=keycode;when"101"=>key6<=keycode;when"110"=>key7<=keycode;when"111"=>key8<=keycode;whenothers=>null;endcase;ifkey1=key2andkey2=key3andkey3=key4andkey4=key5andkey5=key6andkey6=key7andkey7=key8andkey1/="UUUUU"thenkeycode1<=key1;start_1<='0'after5ns;endif;endprocess;start<=start_1;endfangdou;运算：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;useieee.numeric_std.all;entityyunsuanisport(start:instd_logic;keycode1:instd_logic_vector(4downto0);keyvaluein:outstd_logic_vector(7downto0));endyunsuan;architectureBehavioralofyunsuanissignalfirst,second,result,ysfh:integerrange0to99;signaln:std_logic_vector(2downto0);beginprocess(start,keycode1)beginifstart='1'thenn<="000";elseifn="000"thenifkeycode1="00001"thenfirst<=1;elsifkeycode1="00010"thenfirst<=2;elsifkeycode1="00011"thenfirst<=3;elsifkeycode1="00100"thenfirst<=4;elsifkeycode1="00101"thenfirst<=5;elsifkeycode1="00110"thenfirst<=6;elsifkeycode1="00111"thenfirst<=7;elsifkeycode1="01000"thenfirst<=8;elsifkeycode1="01001"thenfirst<=9;elsifkeycode1="00000"thenfirst<=0;endif;n<=n+'1';elsifn="001"thenifkeycode1="01010"thenysfh<=0;elsifkeycode1="01011"thenysfh<=1;elsifkeycode1="01100"thenysfh<=2;endif;n<=n+'1';elsifn="010"thenifkeycode1="00001"thensecond<=1;elsifkeycode1="00010"thensecond<=2;elsifkeycode1="00011"thensecond<=3;elsifkeycode1="00100"thensecond<=4;elsifkeycode1="00101"thensecond<=5;elsifkeycode1="00110"thensecond<=6;elsifkeycode1="00111"thensecond<=7;elsifkeycode1="01000"thensecond<=8;elsifkeycode1="01001"thensecond<=9;elsifkeycode1="00000"thensecond<=0;endif;n<=n+'1';elsifn="011"andkeycode1="01101"thenifysfh=0thenresult<=first+second;elsifysfh=1thenresult<=first-second;elsifysfh=2thenresult<=first*second;endif;n<=n+'1';elsifn="100"thenn<="000";endif;endif;endprocess;process(n)beginifn="001"thenkeyvaluein<=conv_std_logic_vector(first,8);elsifn="011"thenkeyvaluein<=conv_std_logic_vector(second,8);elsifn="100"thenkeyvaluein<=conv_std_logic_vector(result,8);endif;endprocess;endBehavioral;数码管显示：libraryIEEE;useIEEE.STD_LOGIC_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entityshumaguanxianshiisport(keyvaluein:instd_logic_vector(7downto0);clk:instd_logic;show1,show2:outstd_logic_vector(6downto0));endshumaguanxianshi;architectureshumaguanxianshiofshumaguanxianshiissignalt:std_logic_vector(3downto0);signalo:std_logic_vector(3downto0);beginprocess(clk)variablenum:integerrange0to99;variableten,one:integerrange0to15;beginifrising_edge(clk)thennum:=conv_integer(keyvaluein);ifnum=0thenten:=0;one:=10;elsifnum<10andnum>0thenten:=0;one:=num;elsifnum<20andnum>9thenten:=1;one:=num-10;elsifnum<30andnum>19thenten:=2;one:=num-20;elsifnum<40andnum>29thenten:=3;one:=num-30;elsifnum<50andnum>39thenten:=4;one:=num-40;elsifnum<60andnum>49thenten:=5;one:=num-50;elsifnum<70andnum>59thenten:=6;one:=num-60;elsifnum<80andnum>69thenten:=7;one:=num-70;elsifnum<90andnum>79thenten:=8;one:=num-80;elsifnum<100andnum>89thenten:=9;one:=num-90;endif;t<=conv_std_logic_vector(ten,4);o<=conv_std_logic_vector(one,4);casetiswhen"0000"=>show1<="0000000";when"0001"=>show1<="0110000";when"0010"=>show1<="1101101";when"0011"=>show1<="1111001";when"0100"=>show1<="0110011";when"0101"=>show1<="1011011";when"0110"=>show1<="0011111";when"0111"=>show1<="1110000";when"1000"=>show1<="1111111";when"1001"=>show1<="1110011";whenothers=>show1<="0000000";endcase;caseoiswhen"0000"=>show2<="1111110";when"0001"=>show2<="0110000";when"0010"=>show2<="1101101";when"0011"=>show2<="1111001";when"0100"=>show2<="0110011";when"0101"=>show2<="1011011";when"0110"=>show2<="0011111";when"0111"=>show2<="1110000";when"1000"=>show2<="1111111";when"1001"=>show2<="1110011";whenothers=>show2<="0000000";endcase;endif;endprocess;endshumaguanxianshi;动态显示：libraryIEEE;useIEEE.STD_LOGIC_1164.all;useIEEE.STD_LOGIC_UNSIGNED.ALL;useieee.numeric_std.all;entityshaomiaoxianshiisport(clk,clr:instd_logic;show1:instd_logic_vector(6downto0);show2:instd_logic_vector(6downto0);showout:outstd_logic_vector(6downto0);en:outstd_logic_vector(7downto0));endshaomiaoxianshi;architectureshaomiaoxianshiofshaomiaoxianshiissignalcount:std_logic_vector(1downto0);beginprocess(clk)beginifclr='1'thencount<="00";elseifclk'eventandclk='1'thenifcount="01"thencount<="00";elsecount<=count+'1';endif;endif;ifcount="00"thenshowout<=show1;en<="00000010";elsifcount="01"thenshowout<=show2;en<="00000001";endif;endif;endprocess;endshaomiaoxianshi;键盘：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitykeyboardisPort(clr:instd_logic;clk:inSTD_LOGIC;keyin:inSTD_LOGIC_VECTOR(3downto0);keydrv1:outstd_logic_vector(3downto0);keyvalue:outSTD_LOGIC_VECTOR(4downto0);start:outstd_logic);endkeyboard;architectureRTLofkeyboardiscomponentkeyscanPort(clkin,clr:inSTD_LOGIC;keydrv:outSTD_LOGIC_VECTOR(3downto0));endcomponent;componentkeydecoderPort(clkin,clk,clr:instd_logic;keyin:inSTD_LOGIC_VECTOR(3downto0);keycode:outSTD_LOGIC_VECTOR(4downto0));endcomponent;componentfangdouport(keycode:instd_logic_vector(4downto0);keycode1:outstd_logic_vector(4downto0);start:outstd_logic;clk_f,clr:instd_logic);endcomponent;componentfredivngeneric(n:integer:=3);Port(clkin:inSTD_LOGIC;clkout:outSTD_LOGIC);endcomponent;signalkey2:std_logic_vector(4downto0);signalclk_temp1:std_logic;signalkey1:std_logic_vector(4downto0);signalclk_temp2:std_logic;signalstart1:std_logic;beginU1:keyscanportmap(clkin=>clk_temp1,keydrv=>keydrv1,clr=>clr);U2:keydecoderportmap(clkin=>clk_temp1,keyin=>keyin,keycode=>key1,clk=>clk,clr=>clr);U3:fredivngenericmap(n=>3)portmap(clkin=>clk,clkout=>clk_temp2);U4:fredivngenericmap(n=>9)portmap(clkin=>clk,clkout=>clk_temp1);U5:fangdouportmap(clr=>clr,clk_f=>clk_temp2,keycode=>key1,keycode1=>key2,start=>start1);process(clk)beginifrising_edge(clk)thenifclr='0'thenkeyvalue<=key2;start<=start1;endif;endif;endprocess;endRTL;顶层文件：libraryIEEE;useIEEE.STD_LOGIC_1164.all;entitydingcengisport(clk,clr:instd_logic;keyin:instd_logic_vector(3downto0);keydrv1:outstd_logic_vector(3downto0);showout:outstd_logic_vector(6downto0);en:outstd_logic_vector(7downto0));enddingceng;architecturedingcengofdingcengiscomponentkeyboardPort(clk,clr:inSTD_LOGIC;keyin:inSTD_LOGIC_VECTOR(3downto0);keydrv1:outstd_logic_vector(3downto0);start:outstd_logic;keyvalue:outSTD_LOGIC_VECTOR(4downto0));endcomponent;componentshumaguanxianshiisport(keyvaluein:instd_logic_vector(7downto0);clk:instd_logic;show1,show2:outstd_logic_vector(6downto0));endcomponent;componentyunsuanport(start:instd_logic;keycode1:instd_logic_vector(4downto0);keyvaluein:outstd_logic_vector(7downto0));endcomponent;componentshaomiaoxianshiport(clk,clr:instd_logic;show1:instd_logic_vector(6downto0);show2:instd_logic_vector(6downto0);showout:outstd_logic_vector(6downto0);en:outstd_logic_vector(7downto0));endcomponent;signalclkout_kb:std_logic;signalkeyvaluein:std_logic_vector(7downto0);signalkeycode:std_logic_vector(4downto0);signalshow1,show2:std_logic_vector(6downto0);signalstart:std_logic;beginu2:keyboardportmap(clk=>clk,keyin=>keyin,keyvalue=>keycode,keydrv1=>keydrv1,clr=>clr,start=>start);u3:yunsuanportmap(start=>start,keycode1=>keycode,keyvaluein=>keyvaluein);u4:shumaguanxianshiportmap(keyvaluein=>keyvaluein,show1=>show1,show2=>show2,clk=>clk);u5:shaomiaoxianshiportmap(clk=>clk,clr=>clr,show1=>show1,show2=>show2,showout=>showout,en=>en);enddingceng;按键编码表一：行列1110E1101D1011B011171110E01231101D45671011B89AB01117CDEF按键编码表二：十进制数行&列HEX-行列七段码HEX-七段码011101110EE11111107E111101101ED011000030211101011EB11011016D311100111E7111100179411011110DE011001133511011101DD10110115B611011011DB00111111F711010111D7111000070810111110BE11111117F910111101BD111001173A(+)10111011BBKEEPKEEPB(-)10110111B7KEEPKEEPC(*)011111107EKEEPKEEPD(=)011111017DRESULTRESULTE(null)011110117B000000000F(null)0111011177000000000【附录二】芯片参数及开发平台芯片参数类型SpartarⅡ型号XC2S50速率-4封装PQ208开发平台软件