[手把手教你学单片机C语言单片机开发教程].SP3232

1 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation True +3.0V to +5.5V RS-232 Transceivers SP3222E/3232E DESCRIPTION ■ Meets true EIA/TIA-232-F Standards from a +3.0V to +5.5V power supply ■ Minimum 120Kbps Data Rate Under Full Load ■ 1µA Low-Power Shutdown with Receivers Active (SP3222E) ■ Interoperable with RS-232 down to +2.7V power source ■ Enhanced ESD Specifications: ±15kV Human Body Model ±15kV IEC1000-4-2 Air Discharge ±8kV IEC1000-4-2 Contact Discharge The SP3222E/3232E series is an RS-232 transceiver solution intended for portable or hand- held applications such as notebook or palmtop computers. The SP3222E/3232E series has a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump allows the SP3222E/3232E series to deliver true RS-232 performance from a single power supply ranging from +3.3V to +5.0V. The SP3222E/3232E are 2-driver/2-receiver devices. This series is ideal for portable or hand-held applications such as notebook or palmtop computers. The ESD tolerance of the SP3222E/3232E devices are over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods. The SP3222E device has a low-power shutdown mode where the devices' driver outputs and charge pumps are disabled. During shutdown, the supply current falls to less than 1µA. SELECTION TABLE LEDOM seilppuSrewoP 232-SR srevirD srevirD srevirD srevirD srevirD 232-SR srevieceR srevieceR srevieceR srevieceR srevieceR lanretxE stnenopmoC stnenopmoC stnenopmoC stnenopmoC stnenopmoC nwodtuhS LTT etatS-3 etatS-3 etatS-3 etatS-3 etatS-3 fo.oN sniP sniP sniP sniP sniP 2223PS V5.5+otV0.3+ 2 2 4 seY seY 02,81 2323PS V5.5+otV0.3+ 2 2 4 oN oN 61 ® www.kingst.org Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2002 Sipex Corporation 2 RETEMARAP .NIM .PYT .XAM STINU SNOITIDNOC SCITSIRETCARAHCCD tnerruCylppuS 3.0 0.1 Am T,daolon BMA 52+= o V,C CC V3.3= tnerruCylppuSnwodtuhS 0.1 01 µA ,DNG=NDHS T BMA 52+= o V,C CC V3.3+= STUPTUOREVIECERDNASTUPNICIGOL WOLdlohserhTcigoLtupnI 8.0 V 2etoN,NDHS,NE,NIxT HGIHdlohserhTcigoLtupnI 0.2 4.2 V V CC 2etoN,V3.3= V CC 2etoN,V0.5= tnerruCegakaeLtupnI 10.0± 0.1± µA ,NDHS,NE,NIxT T BMA 52+= oC tnerruCegakaeLtuptuO 50.0± 01± µA delbasidsreviecer WOLegatloVtuptuO 4.0 V I TUO Am6.1= HGIHegatloVtuptuO V CC 6.0- V CC 1.0- V I TUO Am0.1-= STUPTUOREVIRD gniwSegatloVtuptuO 0.5± 4.5± V k3 Ω ,stuptuorevirdllatadnuorgotdaol T BMA 52+= oC ecnatsiseRtuptuO 003 Ω V CC T,V0=-V=+V= TUO = + V2 tnerruCtiucriC-trohStuptuO 53± 07± 06± 001± Am Am V TUO V0= V TUO = + V51 tnerruCegakaeLtuptuO 52± µA V TUO = + V,V21 CC delbasidsrevird,V5.5otV0= NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. VCC................................................................-0.3V to +6.0V V+ (NOTE 1)................................................-0.3V to +7.0V V- (NOTE 1)................................................+0.3V to -7.0V V+ + |V-| (NOTE 1)....................................................+13V ICC (DC VCC or GND current).................................±100mA Input Voltages TxIN, EN ................................................... -0.3V to +6.0V RxIN ..........................................................................±15V Output Voltages TxOUT ......................................................................±15V RxOUT ........................................... -0.3V to (VCC + 0.3V) Short-Circuit Duration TxOUT ............................................................ Continuous Storage Temperature .............................. -65°C to +150°C Power Dissipation Per Package 20-pin SSOP (derate 9.25mW/oC above +70oC) ..... 750mW 18-pin PDIP (derate 15.2mW/oC above +70oC) .... 1220mW 18-pin SOIC (derate 15.7mW/oC above +70oC) ... 1260mW 20-pin TSSOP (derate 11.1mW/oC above +70oC) .. 890mW 16-pin SSOP (derate 9.69mW/oC above +70oC) ..... 775mW 16-pin PDIP (derate 14.3mW/oC above +70oC) .... 1150mW 16-pin Wide SOIC (derate 11.2mW/oC above +70oC) 900mW 16-pin TSSOP (derate 10.5mW/oC above +70oC) .. 850mW 16-pin nSOIC (derate 13.57mW/°C above +70°C) .. 1086mW SPECIFICATIONS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX www.kingst.org 3 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation RETEMARAP .NIM .PYT .XAM STINU SNOITIDNOC STUPNIREVIECER egnaRegatloVtupnI 51- 51+ V WOLdlohserhTtupnI 6.0 8.0 2.1 5.1 V V CC V3.3= V CC V0.5= HGIHdlohserhTtupnI 5.1 8.1 4.2 4.2 V V CC V3.3= V CC V0.5= siseretsyHtupnI 3.0 V ecnatsiseRtupnI 3 5 7 kΩ SCITSIRETCARAHCGNIMIT etaRataDmumixaM 021 532 spbk RL k3= Ω C, L gnihctiwsrevirdeno,Fp0001= yaleDnoitagaporPrevirD 0.1 0.1 µs µs t LHP R, L K3= Ω C, L Fp0001= t HLP R, L K3= Ω C, L Fp0001= yaleDnoitagaporPrevieceR 3.0 3.0 µs t LHP C,TUOxRotNIxR, L Fp051= t HLP C,TUOxRotNIxR, L Fp051= emiTelbanEtuptuOrevieceR 002 sn emiTelbasiDtuptuOrevieceR 002 sn wekSrevirD 001 005 sn t| LHP t- HLP T,| BMA 52= oC wekSrevieceR 002 0001 sn t| LHP t- HLP | etaRwelSnoigeR-noitisnarT 03 /V µs V CC R,V3.3= L K3= Ω T, BMA 52= o ,C V0.3+otV0.3-morfnekatstnemerusaem V0.3-otV0.3+ro SPECIFICATIONS (continued) Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC. NOTE 2: Driver input hysteresis is typically 250mV. www.kingst.org Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2002 Sipex Corporation 4 Figure 1. Transmitter Output Voltage VS. Load Capacitance for the SP3222 and the SP3232 Figure 2. Slew Rate VS. Load Capacitance for the SP3222 and the SP3232 Figure 3. Supply Current VS. Load Capacitance when Transmitting Data for the SP3222 and the SP3232 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 14 12 10 8 6 4 2 0 Sl ew R at e [V /µs ] Load Capacitance [pF] +Slew -Slew 0 500 1000 1500 2000 2330 50 45 40 35 30 25 20 15 10 5 0 Su pp ly C ur re nt [m A] Load Capacitance [pF] 118KHz 60KHz 10KHz 0 500 1000 1500 2000 2330 6 4 2 0 -2 -4 -6 Tr an sm itt er O ut pu t V o lta ge [V ] Load Capacitance [pF] Vout+ Vout- 500 1000 1500 20000 www.kingst.org 5 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation EMAN NOITCNUF REBMUNNIP E2223PS E2323PS OS/PID -/POSS POSST POSST POSST POSST POSST NE .noitarepolamronrofWOLcigolylppA.elbanErevieceR .)etatsZ-hgih(stuptuoreviecerehtelbasidotHGIHcigolylppA 1 1 - +1C .roticapacpmup-egrahcrelbuodegatlovehtfolanimretevitisoP 2 2 1 +V .pmupegrahcehtybdetarenegV5.5+ 3 3 2 -1C .roticapacpmup-egrahcrelbuodegatlovehtfolanimretevitageN 4 4 3 +2C .roticapacpmup-egrahcgnitrevniehtfolanimretevitisoP 5 5 4 -2C .roticapacpmup-egrahcgnitrevniehtfolanimretevitageN 6 6 5 -V .pmupegrahcehtybdetarenegV5.5- 7 7 6 TUO1T .tuptuorevird232-SR 51 71 41 TUO2T .tuptuorevird232-SR 8 8 7 NI1R .tupnireviecer232-SR 41 61 31 NI2R .tupnireviecer232-SR 9 9 8 TUO1R .tuptuoreveicerSOMC/LTT 31 51 21 TUO2R .tuptuoreveicerSOMC/LTT 01 01 9 NI1T .tupnirevirdSOMC/LTT 21 31 11 NI2T .tupnirevirdSOMC/LTT 11 21 01 DNG .dnuorG 61 81 51 V CC egatlovylppusV5.5+otV0.3+ 71 91 61 NDHS .noitarepoecivedlamronrofHGIHevirD.tupnIlortnoCnwodtuhS -noehtdna)tuptuoZ-hgih(srevirdehtnwodtuhsotWOLevirD .ylppusrewopdraob 81 02 - .C.N .tcennoCoN - 41,11 - Table 1. Device Pin Description www.kingst.org Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2002 Sipex Corporation 6 V- 1 2 3 4 13 14 15 16 5 6 7 12 11 10 C1+ V+ C1- C2+ C2- R1IN R2IN GND VCC T1OUT T2IN 8 9 SP3232E T1IN R1OUT R2OUT T2OUT Figure 5. Pinout Configuration for the SP3232E Figure 4. Pinout Configurations for the SP3222E V- 1 2 3 4 17 18 19 20 5 6 7 16 15 14 SHDN C1+ V+ C1- C2+ C2- N.C. EN R1IN GND VCC T1OUT N.C. 8 9 10 11 12 13 R2IN R2OUT SP3222E T2OUT T1IN T2IN R1OUT SSOP/TSSOP V- 1 2 3 4 15 16 17 18 5 6 7 14 13 12 SHDN C1+ V+ C1- C2+ C2- EN R1IN GND VCC T1OUT 8 9 10 11 R2IN SP3222E T2OUT T2IN T1IN R1OUT DIP/SO R2OUT www.kingst.org 7 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation SP3232E 1 3 5 4 2 6 16 GND T1IN T2IN T1OUT T2OUT C1+ C1- C2+ C2- V+ V- VCC 11 10 0.1µF 0.1µF 0.1µF + C2 C5 C1 + + *C3 C4 + + 0.1µF 0.1µF 14 7 RS-232 OUTPUTS RS-232 INPUTS LOGIC INPUTS VCC 15 5kΩ R1INR1OUT12 13 5kΩ R2INR2OUT9 8 LOGIC OUTPUTS *can be returned to either VCC or GND Figure 6. SP3222E Typical Operating Circuits Figure 7. SP3232E Typical Operating Circuit SP3222E 2 4 6 5 3 7 19 GND T1IN T2IN T1OUT T2OUT C1+ C1- C2+ C2- V+ V- VCC 13 12 0.1µF 0.1µF 0.1µF + C2 C5 C1 + + *C3 C4 + + 0.1µF 0.1µF 8 17 RS-232 OUTPUTS RS-232 INPUTS LOGIC INPUTS VCC 18 1 5kΩ R1INR1OUT15 9 5kΩ R2INR2OUT10 16 LOGIC OUTPUTS EN 20SHDN *can be returned to either VCC or GND SSOP TSSOP SP3222E 2 4 6 5 3 7 17 GND T1IN T2IN T1OUT T2OUT C1+ C1- C2+ C2- V+ V- VCC 12 11 0.1µF 0.1µF 0.1µF + C2 C5 C1 + + *C3 C4 + + 0.1µF 0.1µF 8 15 RS-232 OUTPUTS RS-232 INPUTS LOGIC INPUTS VCC 16 1 5kΩ R1INR1OUT13 9 5kΩ R2INR2OUT10 14 LOGIC OUTPUTS EN 18SHDN *can be returned to either VCC or GND DIP/SOwww.kingst.org Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2002 Sipex Corporation 8 DESCRIPTION The SP3222E/3232E transceivers meet the EIA/ TIA-232 and V.28/V.24 communication proto- cols and can be implemented in battery-pow- ered, portable, or hand-held applications such as notebook or palmtop computers. The SP3222E/ 3232E devices all feature Sipex's proprietary on-board charge pump circuitry that generates 2 x VCC for RS-232 voltage levels from a single +3.0V to +5.5V power supply. This series is ideal for +3.3V-only systems, mixed +3.3V to +5.5V systems, or +5.0V-only systems that re- quire true RS-232 performance. The SP3222E/ 3232E series have drivers that operate at a typi- cal data rate of 235Kbps fully loaded. The SP3222E and SP3232E are 2-driver/2-re- ceiver devices ideal for portable or hand-held applications. The SP3222E features a 1µA shutdown mode that reduces power consump- tion and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1µA supply current. THEORY OF OPERATION The SP3222E/3232E series are made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. the Sipex proprietary charge pump. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to ±5.0V EIA/TIA-232 levels inverted relative to the in- put logic levels. Typically, the RS-232 output voltage swing is ±5.5V with no load and at least ±5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. Driver outputs will meet EIA/TIA-562 levels of ±3.7V with supply voltages as low as 2.7V. The drivers typically can operate at a data rate of 235Kbps. The drivers can guarantee a data rate of 120Kbps fully loaded with 3KΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC communication software. The slew rate of the driver output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Para- graph 5). The transition of the loaded output from HIGH to LOW also meets the monotonic- ity requirements of the standard. The SP3222E/3232E drivers can maintain high data rates up to 235Kbps fully loaded. Figure 8 shows a loopback test circuit used to test the RS-232 drivers. Figure 9 shows the test results of the loopback circuit with all drivers active at 120Kbps with RS-232 loads in parallel with 1000pF capacitors. Figure 10 shows the test results where one driver was active at 235Kbps and all drivers loaded with an RS-232 receiver in parallel with a 1000pF capacitor. A solid RS-232 data transmission rate of 120Kbps provides compatibility with many designs in personal computer peripherals and LAN applications. The SP3222E driver's output stages are turned off (tri-state) when the device is in shutdown mode. When the power is off, the SP3222E device permits the outputs to be driven up to ±12V. The driver's inputs do not have pull-up resistors. Designers should connect unused inputs to VCC or GND. In the shutdown mode, the supply current falls to less than 1µA, where SHDN = LOW. When the SP3222E device is shut down, the device's driver outputs are disabled (tri-stated) and the charge pumps are turned off with V+ pulled down to VCC and V- pulled to GND. The time required to exit shutdown is typically 100µs. Connect SHDN to VCC if the shutdown mode is not used. SHDN has no effect on RxOUT or RxOUTB. As they become active, the two driver outputs go to opposite RS-232 levels where one driver input is HIGH and the other LOW. Note that the drivers are enabled only when the magnitude of V- exceeds approximately 3V. www.kingst.org 9 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation Figure 9. Driver Loopback Test Results at 120kbps Figure 10. Driver Loopback Test Results at 235kbps Figure 8. SP3222E/3232E Driver Loopback Test Circuit SP3222E SP3232E GND TxIN TxOUT C1+ C1- C2+ C2- V+ V- VCC0.1µF 0.1µF 0.1µF + C2 C5 C1 + + C3 C4 + + 0.1µF 0.1µF LOGIC INPUTS VCC 5kΩ RxINRxOUTLOGIC OUTPUTS EN *SHDN 1000pF VCC * SP3222 only 3 1 2 T T T T[ ] T1 IN T1 OUT R1 OUT Ch1 Ch3 5.00V Ch2 5.00V M 5.00µs Ch1 0V 5.00V 3 1 2 T T T T[ ] T1 IN T1 OUT R1 OUT Ch1 Ch3 5.00V Ch2 5.00V M 2.50µs Ch1 0V 5.00V www.kingst.org Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2002 Sipex Corporation 10 Receivers The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. All receivers have an inverting tri-state output. These receiver outputs (RxOUT) are tri-stated when the enable control EN = HIGH. In the shutdown mode, the receivers can be active or inactive. EN has no effect on TxOUT. The truth table logic of the SP3222E/3232E driver and receiver outputs can be found in Table 2. Since receiver input is usually from a transmis- sion line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, a 5kΩ pulldown resistor to ground will commit the output of the receiver to a HIGH state. Charge Pump The charge pump is a Sipex–patented design (5,306,954) and uses a unique approach com- pared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. In most circumstances, decoupling the power supply can be achieved adequately using a 0.1µF bypass capacitor at C5 (refer to Figures 6 and 7). In applications that are sensitive to power-sup- ply noise, decouple VCC to ground with a capaci- tor of the same value as charge-pump capacitor C1. Physically connect bypass capacitors as close to the IC as possible. The charge pumps operate in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pumps are enabled. If the output voltage exceed a magnitude of 5.5V, the charge pumps are disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Phase 1 — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1– is trans- ferred to C2–. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. Phase 2 — VSS transfer — Phase two of the clock con- nects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C3. This generated voltage is regu- lated to a minimum voltage of -5.5V. Simulta- neous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. Table 2. Truth Table Logic for Shutdown and Enable Control NDHS NE TUOxT TUOxR 0 0 etats-irT evitcA 0 1 etats-irT etats-irT 1 0 evitcA evitcA 1 1 evitcA etats-irT www.kingst.org 11 Rev. 11/07/02 SP3222E/3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2001 Sipex Corporation Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the opera- tional conditions for the internal oscillator are present. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. ESD Tolerance The SP3222E/3232E series incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least ±15kV without damage nor latch-up. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact The Human Body Model has been the generall