200V Multi RESURF Trench MOSFET

ISPSD 2003, Aprll14-17, Cambridge, UK 200V Multi RESURF Trench MOSFET (MR-TMOS) T. Kurosaki*, H. Shishido*, M. Kitada, K. Oshima, S. Kunori and A. Sugai R & D Center, *Semiconductor Division SHINDENGEN ELECTRIC MFG.CO.,LTD. N0.10-13 &ami- cho Hannocity Saitama, 357-8585, Japan Phone:+81429-71-1400 FAX:+8 1429-71-1458 E-mail: shinjikunori@si.shiengen.co.jp Abstract. In thls paper, we propose a new structure of trench MOSFETs, named Multi RESURF Trench MOSFETsWR-TMOS). This structure has a deep p type pillar under the trench gate electrode. This p type pillars are formed by using the method of filling trenches with epitaxial sillcou. Using thls technique, we have developed a 2OOV class low on-resistance MOSFETs with Ron-A=4.8 n R * c d at VclOV and Vdss=245V . This experimental result shows superior characteristics and a relatively good agreement with the simulation result, RolrA=5.0 &.cd at V,=lOV and Vdss=252V. INTRODUCTION Many electrical equipments are remarkably becoming smaller and higher efficient by advance in power semiconductor devices. Especially, power MOSFETs are widely used as a key device in several fields such as communications, computers, cars, and consumer electronics. The improvement of power MOSFET characteristics basically deals with the on- resistance and the capacitance and has been achieved mainly by the fine pattern technologies. Many types of super junction devices have been developed to break through the silicon limit of unipolar devices, since Cool MOS was announced in 1998[1]. In the Cool MOS” structure, p type pillars and n type drifl regions are formed by repeating several epitaxial growths and doping processes for p type pillars. The concentration and width of the n type drift region are kept io the RESURF condition allowing of the low on-resistance of n type drifl regions. The charge balance between p type pillars and n type drift regions allows of a high blocking voltage. However, this structure has some problems such as many process steps and difficulty of reducing the cell pitch. To solve these problems, several trench structures, including the Super Trench structure, have been proposed [2][3][4]. Minato,et al. showed the superior characteristics of the Super Trench MOSFET. However, it se- difficult to realize high voltage MOSFETs with high aspect deep trench structures because ofusing the tilt Fig. 1 Cross-section of simulation structure ion implantation technique. In this paper, we propose a new structure of trench MOSFETs, named Multi RESURF Trench MOSFETs (MR-TMOS) , possible to overcome this problem, and show the characteristics ofthe device fabricated. DEVICE SIMULATION AND FABRICATION Figure 1 shows the simulation model of the MR- TMOS. This structure has a deep p type pillar under the trench gate electrode. The concentration and width of the n type drift region are kept in the RESURF condition allowing of the low on-resistance of n type drifl regions. The charge balance between p type pillars and n type drifl regions allows of a high blocking voltage. Moreover, it is possible to achieve lower on-resistance because of the trench gate structure which can make the cell pitch smaller. In this figure W,, W, , N. , and N, are the trench width, the mesa width , the acceptor concentration, and the donor concentration, respectively. When the charge of the p type pillar and the n type drifl region is balanced, that is, W, xN. = W, x N, , the complete depletion occurs. The simulation result of the relationship between the breakdown voltage and the 21 1 0-7803-7876-8/03/$17.00 8 2003 IEEE Authorized licensed use limited to: Jiangnan University. Downloaded on October 18, 2008 at 04:16 from IEEE Xplore. Restrictions apply. (a) @) Fig. 3 Potential distribution at the breakdown voltage (a) the device with the breakdown voltage of I23V @)the device with the breakdown voltage of 252V I 1 x 1 Y I Z pp-p-p-1 168 1.15 091 Table 1 PIB ratio of the fabticahd devices Boron concentration in P type pillar: X