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uart_r1p5.pdf

uart_r1p5.pdf

上传者: king 2014-03-27 评分 0 0 0 0 0 0 暂无简介 简介 举报

简介:本文档为《uart_r1p5pdf》,可适用于IT/计算机领域,主题内容包含PrimeCellUART(PL)Revision:rpTechnicalReferenceManualCopyright,,,ARMLimited符等。

PrimeCellUART(PL)Revision:rpTechnicalReferenceManualCopyright,,,ARMLimitedAllrightsreservedARMDDIGPrimeCellUART(PL)TechnicalReferenceManualCopyright,,,ARMLimitedAllrightsreservedReleaseInformationTheChangehistorytableliststhechangesmadetothismanualProprietaryNoticeWordsandlogosmarkedwithorareregisteredtrademarksortrademarksofARMLimitedintheEUandothercountries,exceptasotherwisestatedbelowinthisproprietarynoticeOtherbrandsandnamesmentionedhereinmaybethetrademarksoftheirrespectiveownersNeitherthewholenoranypartoftheinformationcontainedin,ortheproductdescribedin,thisdocumentmaybeadaptedorreproducedinanymaterialformexceptwiththepriorwrittenpermissionofthecopyrightholderTheproductdescribedinthisdocumentissubjecttocontinuousdevelopmentsandimprovementsAllparticularsoftheproductanditsusecontainedinthisdocumentaregivenbyARMingoodfaithHowever,allwarrantiesimpliedorexpressed,includingbutnotlimitedtoimpliedwarrantiesofmerchantability,orfitnessforpurpose,areexcludedThisdocumentisintendedonlytoassistthereaderintheuseoftheproductARMLimitedshallnotbeliableforanylossordamagearisingfromtheuseofanyinformationinthisdocument,oranyerrororomissioninsuchinformation,oranyincorrectuseoftheproductWherethetermARMisuseditmeans“ARMoranyofitssubsidiariesasappropriate”ConfidentialityStatusThisdocumentisNonConfidentialTherighttouse,copyanddisclosethisdocumentmaybesubjecttolicenserestrictionsinaccordancewiththetermsoftheagreemententeredintobyARMandthepartythatARMdeliveredthisdocumenttoChangehistoryDateIssueConfidentialityChangeJulyAOpenAccessFirstreleaseAugustBOpenAccessChangetosignalnamesinFig,changestobitsinFigs,FebruaryCOpenAccessChangetoFigureNoteaddedtoparaFebruaryDOpenAccessTextchangetopages,andDecemberEOpenAccessTextchangestopages,,andNovemberFNonconfidentialUpdatetoaddErrata,historyofproductrevision,fixfordefectDecemberGNonconfidentialUpdateforrpTextchangestoClocksignalsonpageandUARTTXINTRonpageBufferdepthofthereceiveandtransmitFIFOsincreasediiCopyright,,,ARMLimitedAllrightsreservedARMDDIGProductStatusTheinformationinthisdocumentisfinal,thatisforadevelopedproductWebAddresshttp:wwwarmcomARMDDIGCopyright,,,ARMLimitedAllrightsreservediiiivCopyright,,,ARMLimitedAllrightsreservedARMDDIGContentsPrimeCellUART(PL)TechnicalReferenceManualPrefaceAboutthismanualxiiFeedbackxviChapterIntroductionAbouttheUARTProductrevisionsChapterFunctionalOverviewOverviewARMDDIGCopyright,,,ARMLimitedAllrightsreservedvFunctionaldescriptionIrDASIRENDECfunctionaldescriptionOperationUARTmodemoperationUARThardwareflowcontrolUARTDMAinterfaceInterruptsChapterProgrammersModelAbouttheprogrammersmodelContentsSummaryofregistersRegisterdescriptionsChapterProgrammersModelforTestTestharnessoverviewScantestingSummaryoftestregistersTestregisterdescriptionsIntegrationtestingofblockinputsIntegrationtestingofblockoutputsIntegrationtestsummaryAppendixASignalDescriptionsAAMBAAPBsignalsAAOnchipsignalsAASignalstopadsAviCopyright,,,ARMLimitedAllrightsreservedARMDDIGListofTablesPrimeCellUART(PL)TechnicalReferenceManualChangehistoryiiTableReceiveFIFObitfunctionsTableFunctionofthemodeminputoutputsignalsinDTEandDCEmodesTableControlbitstoenableanddisablehardwareflowcontrolTableDMAtriggerpointsforthetransmitandreceiveFIFOsTableUARTregistersummaryTableUARTDRRegisterTableUARTRSRUARTECRRegisterTableUARTFRRegisterTableUARTILPRRegisterTableUARTIBRDRegisterARMDDIGCopyright,,,ARMLimitedAllrightsreservedviiTableUARTFBRDRegisterTableTypicalbaudratesandintegerdivisorswhenUARTCLK=MHzTableIntegerandfractionaldivisorsfortypicalbaudrateswhenUARTCLK=MHzTableUARTLCRHRegisterTableParitytruthtableTableUARTCRRegisterTableUARTIFLSRegisterTableUARTIMSCRegisterTableUARTRISRegisterTableUARTMISRegisterListofTablesTableUARTICRRegisterTableUARTDMACRRegisterTableUARTPeriphIDRegisterTableUARTPeriphIDRegisterTableUARTPeriphIDRegisterTableUARTPeriphIDRegisterTableUARTPCellIDRegisterTableUARTPCellIDRegisterTableUARTPCellIDRegisterTableUARTPCellIDRegisterTableTestregisterssummaryTableUARTTCRregisterTableUARTITIPregisterTableUARTITOPregisterTableUARTTDRregisterTableIntegrationteststrategyTableAAPBslaveinterfacesignalsATableAOnchipsignalsATableAPadsignaldescriptionsAviiiCopyright,,,ARMLimitedAllrightsreservedARMDDIGListofFiguresPrimeCellUART(PL)TechnicalReferenceManualKeytotimingdiagramconventionsxivFigureUARTblockdiagramFigureIrDASIRENDECblockdiagramFigureBaudratedivisorFigureUARTcharacterframeFigureIrDAdatamodulation()FigureHardwareflowcontrolbetweentwosimilardevicesFigureDMAtransferwaveformsFigurePeripheralIdentificationRegisterbitassignmentsFigurePrimeCellIdentificationRegisterbitassignmentsFigureInputintegrationtestharnessARMDDIGCopyright,,,ARMLimitedAllrightsreservedixFigureOutputintegrationtestharness,intrachipoutputsFigureOutputintegrationtestharness,primaryoutputsListofFiguresxCopyright,,,ARMLimitedAllrightsreservedARMDDIGPrefaceThisprefaceintroducesthePrimeCellUART(PL)TechnicalReferenceManualItcontainsthefollowingsections:•Aboutthismanualonpagexii•Additionalreadingonpagexv•FeedbackonpagexviARMDDIGCopyright,,,ARMLimitedAllrightsreservedxiPrefaceAboutthismanualThisistheTechnicalReferenceManual(TRM)forthePrimeCellUART(PL)ProductrevisionstatusThernpnidentifierindicatestherevisionstatusoftheproductdescribedinthismanual,where:rnIdentifiesthemajorrevisionoftheproductpnIdentifiestheminorrevisionormodificationstatusoftheproductIntendedaudienceThismanualhasbeenwrittenforhardwareandsoftwareengineersimplementingSystemonChipdesignsItprovidesinformationtoenabledesignerstointegratetheperipheralintoatargetsystemasquicklyaspossibleUsingthismanualThismanualisorganizedintothefollowingchapters:ChapterIntroductionReadthischapterforanintroductiontotheUARTChapterFunctionalOverviewReadthischapterforadescriptionofthemajorfunctionalblocksoftheUARTChapterProgrammersModelReadthischapterforadescriptionoftheUARTmemorymapandregistersChapterProgrammersModelforTestReadthischapterforadescriptionofthelogicintheUARTforintegrationtestingAppendixASignalDescriptionsReadthisappendixforadescriptionoftheUARTinputandoutputsignalsxiiCopyright,,,ARMLimitedAllrightsreservedARMDDIGPrefaceConventionsConventionsthatthismanualcanusearedescribedin:•Typographical•Timingdiagrams•Signalsonpagexiv•NumberingonpagexivTypographicalThetypographicalconventionsare:italicHighlightsimportantnotes,introducesspecialterminology,denotesinternalcrossreferences,andcitationsboldHighlightsinterfaceelements,suchasmenunamesDenotessignalnamesAlsousedfortermsindescriptivelists,whereappropriatemonospaceDenotestextthatyoucanenteratthekeyboard,suchascommands,fileandprogramnames,andsourcecodemonospaceDenotesapermittedabbreviationforacommandoroptionYoucanentertheunderlinedtextinsteadofthefullcommandoroptionnamemonospaceitalicDenotesargumentstomonospacetextwheretheargumentistobereplacedbyaspecificvaluemonospaceboldDenoteslanguagekeywordswhenusedoutsideexamplecode<and>EnclosereplaceabletermsforassemblersyntaxwheretheyappearincodeorcodefragmentsForexample:MRCp,<Rd>,<CRn>,<CRm>,<Opcode>TimingdiagramsThefigurenamedKeytotimingdiagramconventionsonpagexivexplainsthecomponentsusedintimingdiagramsVariations,whentheyoccur,haveclearlabelsYoumustnotassumeanytiminginformationthatisnotexplicitinthediagramsShadedbusandsignalareasareundefined,sothebusorsignalcanassumeanyvaluewithintheshadedareaatthattimeTheactuallevelisunimportantanddoesnotaffectnormaloperationARMDDIGCopyright,,,ARMLimitedAllrightsreservedxiiiPrefaceKeytotimingdiagramconventionsSignalsThesignalconventionsare:SignallevelThelevelofanassertedsignaldependsonwhetherthesignalisactiveHIGHoractiveLOWAssertedmeans:•HIGHforactiveHIGHsignals•LOWforactiveLOWsignalsLowercasenAtthestartorendofasignalnamedenotesanactiveLOWsignalPrefixHDenotesAdvancedHighperformanceBus(AHB)signalsPrefixPDenotesAdvancedPeripheralBus(APB)signalsNumberingThenumberingconventionis:<sizeinbits>'<base><number>ThisisaVerilogmethodofabbreviatingconstantnumbersForexample:•'hBisanunsizedhexadecimalvalue•'oisanunsizedoctalvalue•'disaneightbitwidedecimalvalueof•'hFisaneightbitwidehexadecimalvalueofxFThisisequivalenttob•'bisaneightbitwidebinaryvalueofbORFN,*WR:UDQVLHQW,*:WR,*XVVWDEOHXVWRKLJKLPSHGDQFHXVFKDQJHLJKLPSHGDQFHWRVWDEOHEXVxivCopyright,,,ARMLimitedAllrightsreservedARMDDIGPrefaceAdditionalreadingThissectionlistspublicationsbyARMandbythirdpartiesYoucanaccessARMdocumentationat:http:infocenterarmcomhelpindexjspARMpublicationsThismanualcontainsinformationthatisspecifictotheUARTSeethefollowingdocumentsforotherrelevantinformation:•AMBASpecification(Rev)(ARMIHI)•ARMPrimeCellUART(PL)DesignManual(PLDDES)•ARMPrimeCellUART(PL)IntegrationManual(PLINTM)OtherpublicationsThissectionlistsrelevantdocumentspublishedbythirdparties•InfraredDataAssociation,IrDAPhysicalLayerSpecificationv,obtainableathttp:wwwirdaorg•AgilentTechnologies,AgilentIrDADataLinkDesignGuide(EMarch),obtainableathttp:wwwagilentcomARMDDIGCopyright,,,ARMLimitedAllrightsreservedxvPrefaceFeedbackARMwelcomesfeedbackonthePrimeCellUART(PL)anditsdocumentationFeedbackonthisproductIfyouhaveanycommentsorsuggestionsaboutthisproduct,contactyoursupplierandgive:•theproductname•aconciseexplanationFeedbackonthismanualIfyouhaveanycommentsonthismanual,sendanemailtoerrataarmcomGive:•thetitle•thenumber•therelevantpagenumber(s)towhichyourcommentsapply•aconciseexplanationofyourcommentsARMalsowelcomesgeneralsuggestionsforadditionsandimprovementsxviCopyright,,,ARMLimitedAllrightsreservedARMDDIGChapterIntroductionThischapterintroducestheUART(PL)Itcontainsthefollowingsections:•AbouttheUARTonpage•ProductrevisionsonpageARMDDIGCopyright,,,ARMLimitedAllrightsreservedIntroductionAbouttheUARTTheUARTisanAdvancedMicrocontrollerBusArchitecture(AMBA)compliantSystemonChip(SoC)peripheralthatisdeveloped,tested,andlicensedbyARMTheUARTisanAMBAslavemodulethatconnectstotheAdvancedPeripheralBus(APB)TheUARTincludesanInfraredDataAssociation(IrDA)SerialInfraRed(SIR)protocolENcoderDECoder(ENDEC)ThefeaturesoftheUARTa

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