TLV431A-D

1 Publication Order Number: TLV431A/D © Semiconductor Components Industries, LLC, 2012 December, 2012 − Rev. 14 TLV431A, TLV431B, SCV431A, SCV431B Low Voltage Precision Adjustable Shunt Regulator The TLV431A and B series are precision low voltage shunt regulators that are programmable over a wide voltage range of 1.24 V to 16 V. The TLV431A series features a guaranteed reference accuracy of ±1.0% at 25°C and ±2.0% over the entire industrial temperature range of −40°C to 85°C. For TLV431B series, the accuracy is even higher, it’s ±0.5% and ±1.0% respectively. These devices exhibit a sharp low current turn−on characteristic with a low dynamic impedance of 0.20 � over an operating current range of 100 �A to 20 mA. This combination of features makes this series an excellent replacement for zener diodes in numerous applications circuits that require a precise reference voltage. When combined with an optocoupler, the TLV431A/B can be used as an error amplifier for controlling the feedback loop in isolated low output voltage (3.0 V to 3.3 V) switching power supplies. These devices are available in economica l TO−92−3 and mic ro s i ze TSOP−5 and SOT−23−3 packages. Features • Programmable Output Voltage Range of 1.24 V to 16 V • Voltage Reference Tolerance �1.0% for A Series and �0.5% for B Series • Sharp Low Current Turn−On Characteristic • Low Dynamic Output Impedance of 0.20 � from 100 �A to 20 mA • Wide Operating Current Range of 50 �A to 20 mA • Micro Miniature TSOP−5, SOT−23−3 and TO−92−3 Packages • These are Pb−Free and Halide−Free Devices • SCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable Applications • Low Output Voltage (3.0 V to 3.3 V) Switching Power Supply Error Amplifier • Adjustable Voltage or Current Linear and Switching Power Supplies • Voltage Monitoring • Current Source and Sink Circuits • Analog and Digital Circuits Requiring Precision References • Low Voltage Zener Diode Replacements - + 1.24 Vref Reference (R) Cathode (K) Anode (A) Figure 1. Representative Block Diagram TO−92 LP SUFFIX CASE 29 TSOP−5 SN SUFFIX CASE 483 1 2 3 5 4 SOT−23−3 SN1 SUFFIX CASE 3181 2 3 See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. ORDERING INFORMATION See general marking information in the device marking section on page 10 of this data sheet. DEVICE MARKING INFORMATION AND PIN CONNECTIONS http://onsemi.com 1 2 3 1 2 BENT LEAD TAPE & REEL AMMO PACK STRAIGHT LEAD BULK PACK 3 TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 2 Reference (R) Cathode (K) Anode (A) Anode (A) Reference (R) Cathode (K) The device contains 13 active transistors. Device Symbol Figure 2. Representative Device Symbol and Schematic Diagram MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted) Rating Symbol Value Unit Cathode to Anode Voltage VKA 18 V Cathode Current Range, Continuous IK −20 to 25 mA Reference Input Current Range, Continuous Iref �0.05 to 10 mA Thermal Characteristics LP Suffix Package, TO−92−3 Package Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Case SN Suffix Package, TSOP−5 Package Thermal Resistance, Junction−to−Ambient SN1 Suffix Package, SOT−23−3 Package Thermal Resistance, Junction−to−Ambient R�JA R�JC R�JA R�JA 178 83 226 491 °C/W Operating Junction Temperature TJ 150 °C Operating Ambient Temperature Range TA �40 to 85 °C Storage Temperature Range Tstg �65 to 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015. Machine Model Method 200 V. PD � TJ(max)� TA R �JA RECOMMENDED OPERATING CONDITIONS Condition Symbol Min Max Unit Cathode to Anode Voltage VKA Vref 16 V Cathode Current IK 0.1 20 mA TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 3 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol TLV431A/SCV431A TLV431B/SCV431B UnitMin Typ Max Min Typ Max Reference Voltage (Figure 3) (VKA = Vref, IK = 10 mA, TA = 25°C) (TA = Tlow to Thigh, Note 1) Vref 1.228 1.215 1.240 − 1.252 1.265 1.234 1.228 1.240 − 1.246 1.252 V Reference Input Voltage Deviation Over Temperature (Figure 3) (VKA = Vref, IK= 10 mA, TA = Tlow to Thigh, Note 1) �Vref − 7.2 20 − 7.2 20 mV Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4) (VKA = Vref to 16 V, IK= 10 mA) �Vref �VKA − −0.6 −1.5 − −0.6 −1.5 mV V Reference Terminal Current (Figure 4) (IK = 10 mA, R1 = 10 k�, R2 = open) Iref − 0.15 0.3 − 0.15 0.3 �A Reference Input Current Deviation Over Temperature (Figure 4) (IK = 10 mA, R1 = 10 k�, R2 = open, Notes 1, 2) �Iref − 0.04 0.08 − 0.04 0.08 �A Minimum Cathode Current for Regulation (Figure 3) IK(min) − 55 80 − 55 80 �A Off−State Cathode Current (Figure 5) (VKA = 6.0 V, Vref = 0) (VKA = 16 V, Vref = 0) IK(off) − − 0.01 0.012 0.04 0.05 − − 0.01 0.012 0.04 0.05 �A Dynamic Impedance (Figure 3) (VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 3) |ZKA| − 0.25 0.4 − 0.25 0.4 � 1. Ambient temperature range: Tlow = �40°C, Thigh = 85°C. 2. The deviation parameters �Vref and �Iref are defined as the difference between the maximum value and minimum value obtained over the full operating ambient temperature range that applied. Vref Max Vref Min T1 T2Ambient Temperature �Vref = Vref Max − Vref Min �TA = T2 − T1 The average temperature coefficient of the reference input voltage, �Vref is defined as: αVref �ppm °C � � � (�Vref ) Vref (TA� 25°C) � 106� �TA �Vref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8. Example: �Vref = 7.2 mV and the slope is positive, Example: Vref @ 25°C = 1.241 V Example: �TA = 125°C αVref �ppm °C � � 0.0072 1.241 125 � 46 ppm�°C � 106 3. The dynamic impedance ZKA is defined as: ⏐ZKA⏐ � �VKA �IK When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by: ⏐ZKA′⏐ � ⏐ZKA⏐� �1 R1R2� TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 4 Figure 3. Test Circuit for VKA = Vref Figure 4. Test Circuit for VKA Vref Figure 5. Test Circuit for IK(off) IK Input VKA Vref IK(off) Input VKA IK Input VKA Vref Iref R2 R1 VKA � Vref� ��1 R1 R2 �� Iref���R1 Vref(min) Vref(typ) Figure 6. Cathode Current vs. Cathode Voltage Figure 7. Cathode Current vs. Cathode Voltage Figure 8. Reference Input Voltage versus Ambient Temperature Figure 9. Reference Input Current versus Ambient Temperature VKA, CATHODE VOLTAGE (V) 30 20 10 0 2.01.51.00.50−0.5−1.0 I K , C AT H O D E C U R R EN T (m A) VKA, CATHODE VOLTAGE (V) 1.41.21.00.80.60.40.20 90 70 50 30 10 −10 −30 I K , C AT H O D E C U R R EN T ( A ) −10 110 � TA, AMBIENT TEMPERATURE (°C) 1.25 1.23 3510−15−40 V r ef , R EF ER EN C E IN PU T VO LT AG E (V ) TA, AMBIENT TEMPERATURE (°C) 85603510−15−40 0.14 0.13 0.12 I re f, R EF ER EN C E IN PU T C U R R EN T ( A ) 1.22 0.15 8560 1.24 IK Input VKA VKA = Vref TA = 25°C IK Input VKA VKA = Vref TA = 25°C IK Input VKA IK = 10 mA 10 k Iref VKA = Vref IK = 10 mA Input IK VKA Vref(max) � IK(min) TLV431A Typ. TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 5 Figure 10. Reference Input Voltage Change versus Cathode Voltage Figure 11. Off−State Cathode Current versus Cathode Voltage Figure 12. Off−State Cathode Current versus Ambient Temperature Figure 13. Dynamic Impedance versus Frequency Figure 14. Dynamic Impedance versus Ambient Temperature Figure 15. Open−Loop Voltage Gain versus Frequency VKA, CATHODE VOLTAGE (V) 0 −2.0 −6.0 −8.0 128.04.00V re f, R EF ER EN C E IN PU T VO LT AG E C H AN G E (m V) VKA, CATHODE VOLTAGE (V) 20128.04.00 3.0 2.0 1.0 0 I K (o ff) , C AT H O D E C U R R EN T ( A ) −10 4.0 � � −4.0 16 TA, AMBIENT TEMPERATURE (°C) 0.4 0.3 3510−15−40 I o ff, O FF -S TA TE C AT H O D E C U R R EN T ( A ) f, FREQUENCY (Hz) 10 M10 k1.0 k 0.1 | , D YN AM IC IM PE D AN C E (O H M ) 0 10 0.1 100 k 1.0 M60 85 1.0 Za | TA, AMBIENT TEMPERATURE (°C) 0.23 0.21 0.20 3510−15−40 |Z a| , D YN AM IC IM PE D AN C E (O H M ) f, FREQUENCY (Hz) 1.0 M1.0 k100 50 40 30 20 10 0 A vo l, O PE N L O O P VO LT AG E G AI N (d B) 0.19 60 0.22 10 k 100 k8560 0.24 Ioff Input VKA VKA = 16 V Vref = 0 V Ioff Input VKA VKA = 16 V Vref = 0 V IK Input VKA R1 R2 Vref 8.25 k 15 k IK 230 Output 9 F� 50 + − Output IK + − IK = 10 mA TA = 25°C IK = 0.1 mA to 20 mA TA = 25°C IK = 10 mA TA = 25°C � 0.2 IK = 0.1 mA to 20 mA f = 1.0 kHz 50 + − Output IK TA = 25°C 16 TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 6 TA = 25°C CL, LOAD CAPACITANCE 10 pF 100 pF 20 15 10 5.0 0 I K , C AT H O D E C U R R EN T (m A) 25 1.0 nF 0.01 �F 0.1 �F 100 �F 1.0 �F 10 �F C A B D Stable Stable Stable Figure 16. Spectral Noise Density Figure 17. Pulse Response f, FREQUENCY (Hz) 350 275 10 k1.0 k10010 N O IS E VO LT AG E (n V/ 250 300 100 k 325 Figure 18. Stability Boundary Conditions IK VKA = Vref IK = 10 mA TA = 25°C Iref Input Output 50P ul se G en er at or f = 1 00 k H z Output Input H z) √ Figure 19. Test Circuit for Figure 18 CL IK 1.0 k V+ Output Input 1.8 k 0 2.0 4.0 6.0 8.0 10.0 0 2.0 0 0.5 (V O LT S ) 1.0 1.5 t, TIME (�s) TA = 25°C � 1.0 3.0 5.0 7.0 9.0 Unstable Regions VKA (V) R1 (k�) A, C Vref B, D 5.0 0 30.4 R2 R1 R2 (k�) ∞ 10 Stability Figures 18 and 19 show the stability boundaries and circuit configurations for the worst case conditions with the load capacitance mounted as close as possible to the device. The required load capacitance for stable operation can vary depending on the operating temperature and capacitor equivalent series resistance (ESR). Ceramic or tantalum surface mount capacitors are recommended for both temperature and ESR. The application circuit stability should be verified over the anticipated operating current and temperature ranges. TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 7 Figure 20. Shunt Regulator Figure 21. High Current Shunt Regulator Vout � �1 R1R2� Vref Vout � �1 R1R2� Vref R1 R2 VoutVin R1 R2 VoutVin TYPICAL APPLICATIONS Figure 22. Output Control for a Three Terminal Fixed Regulator Figure 23. Series Pass Regulator Vout � �1 R1R2� Vref Vout(min) � Vref 5.0 V Vout � �1 R1R2� Vref Vout(min) � Vref Vin Vout R1 R2 Vin Vout R1 R2 OutIn MC7805 Common Vin(min) � Vout Vbe TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 8 Figure 24. Constant Current Source Figure 25. Constant Current Sink Iout � Vref RCL Isink � Vref RS Figure 26. TRIAC Crowbar Vout(trip) � �1 R1R2� Vref Figure 27. SCR Crowbar Vout(trip) � �1 R1R2� Vref Vin Vout RCL Vin RS Isink Vin Vout R2 Vin Vout R1 R2 R1 Iout TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 9 Figure 28. Voltage Monitor Figure 29. Linear Ohmmeter Figure 30. Simple 400 mW Phono Amplifier Lower limit� �1 R1 R2 � Vref L.E.D. indicator is ‘ON’ when Vin is between the upper and lower limits, Upper limit� �1 R3 R4 � Vref LED R1 R2 R3 R4 Vin 10 k Calibrate - + 25 V −5.0 V Vout 25 V 2.0 mA 5 k 1% 50 k 1% 1.0 M 1% Range Rx 1N5305 1.0 k� V 1.0 M� V 10 k� V 500 k 1% 100 k� V 360 k 56 k 10 k 330 T1 8.0 � 38 V 470 �F 1.0 �F 0.05 �F + 25 k Volume 47 k T1 = 330 � to 8.0 � Rx � Vout���� � V � Range * Thermalloy * THM 6024 * Heatsink on * LP Package. * Tone TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 10 Figure 31. Isolated Output Line Powered Switching Power Supply The above circuit shows the TLV431A/B as a compensated amplifier controlling the feedback loop of an isolated output line powered switching regulator. The output voltage is programmed to 3.3 V by the resistors values selected for R1 and R2. The minimum output voltage that can be programmed with this circuit is 2.64 V, and is limited by the sum of the reference voltage (1.24 V) and the forward drop of the optocoupler light emitting diode (1.4 V). Capacitor C1 provides loop compensation. Gate Drive VCC Controller VFB GND Current Sense DC Output 3.3 V R1 3.0 k R2 1.8 k 100 AC Input C1 0.1 �F Anode Reference NC NC Cathode 5 4 1 2 3 TLV43 1XXX ALYWW� � PIN CONNECTIONS AND DEVICE MARKING (Top View) 1 2 3 Cathode Anode Reference 1 2 3 (Top View) XXX = Specific Device Code A = Assembly Location Y = Year L = Wafer Lot WW, W = Work Week � = Pb−Free Package (Note: Microdot may be in either location) 1. Reference 2. Anode 3. Cathode TO−92 TSOP−5 SOT−23−3 XXX = Specific Device Code M = Date Code � = Pb−Free Package (Note: Microdot may be in either location) X X X M � � X X X AY W � � TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 11 ORDERING INFORMATION Device Device Code Package Shipping† TLV431ALPG ALP TO−92−3 (Pb−Free) 6000/Box TLV431ALPRAG ALP TO−92−3 (Pb−Free) 2000/Tape & Reel TLV431ALPREG ALP TO−92−3 (Pb−Free) 2000/Tape & Reel TLV431ALPRMG ALP TO−92−3 (Pb−Free) 2000/Ammo Pack TLV431ALPRPG ALP TO−92−3 (Pb−Free) 2000/Ammo Pack TLV431ASNT1G RAA TSOP−5 (Pb−Free, Halide−Free) 3000/Tape & Reel TLV431ASN1T1G RAF SOT−23−3 (Pb−Free, Halide−Free) 3000/Tape & Reel TLV431BLPG BLP TO−92−3 (Pb−Free) 6000/Box TLV431BLPRAG BLP TO−92−3 (Pb−Free) 2000/Tape & Reel TLV431BLPREG BLP TO−92−3 (Pb−Free) 2000/Tape & Reel TLV431BLPRMG BLP TO−92−3 (Pb−Free) 2000/Ammo Pack TLV431BLPRPG BLP TO−92−3 (Pb−Free) 2000/Ammo Pack TLV431BSNT1G RAH TSOP−5 (Pb−Free, Halide−Free) 3000/Tape & Reel TLV431BSN1T1G RAG SOT−23−3 (Pb−Free, Halide−Free) 3000/Tape & Reel SCV431ASN1T1G* RAE SOT−23−3 (Pb−Free, Halide−Free) 3000/Tape & Reel SCV431BSN1T1G* RAC SOT−23−3 (Pb−Free, Halide−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *SCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 12 PACKAGE DIMENSIONS TO−92 (TO−226) LP SUFFIX CASE 29−11 ISSUE AM NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. R A P J L B K G H SECTION X−X CV D N N X X SEATING PLANE DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.175 0.205 4.45 5.20 B 0.170 0.210 4.32 5.33 C 0.125 0.165 3.18 4.19 D 0.016 0.021 0.407 0.533 G 0.045 0.055 1.15 1.39 H 0.095 0.105 2.42 2.66 J 0.015 0.020 0.39 0.50 K 0.500 --- 12.70 --- L 0.250 --- 6.35 --- N 0.080 0.105 2.04 2.66 P --- 0.100 --- 2.54 R 0.115 --- 2.93 --- V 0.135 --- 3.43 ---1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. R A P J B K G SECTION X−X C V D N X X SEATING PLANE DIM MIN MAX MILLIMETERS A 4.45 5.20 B 4.32 5.33 C 3.18 4.19 D 0.40 0.54 G 2.40 2.80 J 0.39 0.50 K 12.70 --- N 2.04 2.66 P 1.50 4.00 R 2.93 --- V 3.43 --- 1 T STRAIGHT LEAD BULK PACK BENT LEAD TAPE & REEL AMMO PACK TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 13 PACKAGE DIMENSIONS SOT−23−3 SN1 SUFFIX CASE 318−08 ISSUE AN *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* SOT−23−3 D A1 3 1 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318−01 THRU −07 AND −09 OBSOLETE, NEW STANDARD 318−08. VIEW C L 0.25 L1 � e E E b A SEE VIEW C DIM A MIN NOM MAX MIN MILLIMETERS 0.89 1.00 1.11 0.035 INCHES A1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 D 2.80 2.90 3.04 0.110 E 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 L 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 NOM MAX L1 H 2.10 2.40 2.64 0.083 0.094 0.104HE 0.35 0.54 0.69 0.014 0.021 0.029 c � mm inches �SCALE 10:1 0.8 0.031 0.9 0.035 0.95 0.0370.95 0.037 2.0 0.079 TLV431A, TLV431B, SCV431A, SCV431B http://onsemi.com 14 PACKAGE DIMENSIONS TSOP−5 SN SUFFIX CASE 483−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM MIN MAX MILLIMETERS A 3.00 BSC B 1.50 BSC C 0.90 1.10 D 0.25 0.50 G 0.95 BSC H 0.01 0.10 J 0.10 0.26 K 0.20 0.60 L 1.25 1.55 M 0 10 S 2.50 3.00 1 2 3 5 4 S A G L B D H C J � � 0.7 0.028 1.0 0.039 � mm inches �SCALE 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* 0.20 5X C A BT0.102X 2X T0.20 NOTE 5 T SEATING PLANE0.05 K M DETAIL Z DETAIL Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. 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