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TLV70033.pdf

TLV70033.pdf

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简介:本文档为《TLV70033pdf》,可适用于硬件技术领域,主题内容包含TLVxxGNDENINOUTVINVOUTOnOffCINCOUTFCeramicmENNCNCINGNDOUTTLVxxDSE,mmx,mmSO符等。

TLV700xx GND EN IN OUTVIN VOUT On Off CIN COUT 1 F Ceramic m EN N/C N/C 6 5 4 IN GND OUT 1 2 3 TLV700xxDSE 1,5-mmx1,5-mmSON (TOPVIEW) TLV700xxDDC TSOT23-5 (TOPVIEW) OUT N/C IN GND EN 1 2 3 5 4 TLV700xxDCK SC70-5PACKAGE (TOPVIEW) OUT N/C IN GND EN 1 2 3 4 5 TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 200-mA, Low-IQ, Low-Dropout Regulator for Portable Devices 1FEATURES DESCRIPTION The TLV700xx series of low-dropout (LDO) linear 234• Very Low Dropout: regulators are low quiescent current devices with– 43 mV at IOUT = 50 mA, VOUT = 2.8 V excellent line and load transient performance. These – 85 mV at IOUT = 100 mA, VOUT = 2.8 V LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides– 175 mV at IOUT = 200 mA, VOUT = 2.35 V overall 2% accuracy. Low output noise, very high• 2% Accuracy power-supply rejection ratio (PSRR), and low dropout • Low IQ: 31 μA voltage make this series of devices ideal for most battery-operated handheld equipment. All device• Available in Fixed-Output Voltages from 1.2 V versions have thermal shutdown and current limit forto 4.8 V safety.• High PSRR: 68 dB at 1 kHz Furthermore, these devices are stable with an• Stable with Effective Capacitance of 0.1 μF(1) effective output capacitance of only 0.1 μF. This• Thermal Shutdown and Overcurrent Protection feature enables the use of cost-effective capacitors • Available in 1,5-mm 1,5-mm SON-6, SOT23-5, that have higher bias voltages and temperature and SC-70 Packages derating. The devices regulate to specified accuracy with no output load.(1) See the Input and Output Capacitor Requirements in the Application Information section. The TLV700xx series of LDOs are available in 1,5-mm x 1,5-mm SON-6, TSOT23-5, and SC-70 APPLICATIONS packages. • Wireless Handsets space • Smart Phones, PDAs space • MP3 Players • ZigBee Networks • Bluetooth Devices • Li-Ion Operated Handheld Products • WLAN and Other PC Add-on Cards Typical Application Circuit (Fixed-Voltage Versions) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2Bluetooth is a registered trademark of Bluetooth SIG. 3ZigBee is a registered trademark of the ZigBee Alliance. 4All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright 2009–2011, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT VOUT (2) TLV700xx yyy z XX is nominal output voltage (for example, 28 = 2.8 V). YYY is the package designator. Z is tape and reel quantity (R = 3000, T = 250). (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Output voltages from 1.2 V to 4.8 V in 50-mV increments are available. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS (1) At TJ = –40C to +125C (unless otherwise noted). All voltages are with respect to GND. PARAMETER TLV700xx UNIT Input voltage range, VIN –0.3 to +6.0 V Enable voltage range, VEN –0.3 to +6.0 (2) V Output voltage range, VOUT –0.3 to +6.0 V Maximum output current, IOUT Internally limited Output short-circuit duration Indefinite Total continuous power dissipation, PDISS See Dissipation Ratings Table Human body model (HBM) 2 kV ESD rating Charged device model (CDM) 500 V Operating junction temperature range, TJ –55 to +150 C Storage temperature range, TSTG –55 to +150 C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) VEN absolute maximum rating is VIN + 0.3 V or 6.0 V, whichever is less. DISSIPATION RATINGS DERATING FACTOR BOARD PACKAGE RθJC RθJA ABOVE TA = +25C TA < +25C TA = +70C TA = +85C Low-K (1) DCK 165C/W 395C/W 2.5 mW/C 250 mW 140 mW 100 mW High-K (2) DCK 165C/W 315C/W 3.2 mW/C 320 mW 175 mW 130 mW High-K (2) DSE 67C/W 180C/W 4.55 mW/C 555 mW 305 mW 222 mW Low-K (1) DDC 90C/W 280C/W 3.6 mW/C 360 mW 200 mW 145 mW High-K (2) DDC 90C/W 200C/W 5.0 mW/C 500 mW 275 mW 200 mW (1) The JEDEC low-K (1s) board used to derive this data was a 3-inch 3-inch, two-layer board with 2-ounce copper traces on top of the board. (2) The JEDEC high-K (2s2p) board used to derive this data was a 3-inch 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 Copyright 2009–2011, Texas Instruments Incorporated TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 ELECTRICAL CHARACTERISTICS At VIN = VOUT(Typ) + 0.3 V or 2.0 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1.0 μF, and TJ = –40C to +125C, unless otherwise noted. Typical values are at TJ = +25C. space PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage range 2.0 5.5 V VOUT DC output accuracy –40C TJ +125C –2 +2 % VOUT(NOM) + 0.3 V VIN 5.5 V,ΔVO/ΔVIN Line regulation 1 5 mVIOUT = 10 mA ΔVO/ΔIOUT Load regulation 0 mA IOUT 200 mA 1 15 mV VIN = 0.98 VOUT(NOM), IOUT = 50 mA, 43 mVVOUT = 2.8 V VIN = 0.98 VOUT(NOM), IOUT = 100 mA,VDO Dropout voltage (1) 85 mVVOUT = 2.8 V VIN = 0.98 VOUT(NOM), IOUT = 200 mA, 175 250 mVVOUT = 2.35 V ICL Output current limit VOUT = 0.9 VOUT(NOM) 220 860 mA IOUT = 0 mA 31 55 μAIGND Ground pin current IOUT = 200 mA, VIN = VOUT + 0.5 V 270 μA VEN 0.4 V, VIN = 2.0 V 400 nAISHDN Ground pin current (shutdown) VEN 0.4 V, 2.0 V VIN 4.5 V 1 2 μA VIN = 2.3 V, VOUT = 1.8 V,PSRR Power-supply rejection ratio 68 dBIOUT = 10 mA, f = 1 kHz BW = 100 Hz to 100 kHz,VN Output noise voltage 48 μVRMSVIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA tSTR Startup time (2) COUT = 1.0 μF, IOUT = 200 mA 100 μs VEN(HI) Enable pin high (enabled) 0.9 VIN V VEN(LO) Enable pin low (disabled) 0 0.4 V IEN Enable pin current VIN = VEN = 5.5 V 0.04 0.5 μA UVLO Undervoltage lockout VIN rising 1.9 V Shutdown, temperature increasing +160 C TSD Thermal shutdown temperature Reset, temperature decreasing +140 C TJ Operating junction temperature –40 +125 C (1) VDO is measured for devices with VOUT(NOM) 2.35 V.(2) Startup time = time from EN assertion to 0.98 VOUT(NOM). Copyright 2009–2011, Texas Instruments Incorporated 3 Thermal Shutdown Current Limit UVLO Bandgap IN EN OUT LOGIC GND TLV700xxSeries TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM Figure 1. TLV700xx 4 Copyright 2009–2011, Texas Instruments Incorporated OUT N/C(1) IN GND EN 1 2 3 4 5OUT N/C(1) IN GND EN 1 2 3 5 4 EN N/C(1) N/C(1) 6 5 4 IN GND OUT 1 2 3 TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 PIN CONFIGURATIONS DDC PACKAGE DCK PACKAGE TSOT23-5 SC70-5(TOP VIEW) (TOP VIEW) DSE PACKAGE SON-6 (TOP VIEW) (1) No connection. PIN DESCRIPTIONS SON-6 SC70-5 TSOT23-5 NAME DSE DCK DDC DESCRIPTION Input pin. A small 1-μF ceramic capacitor is recommended from this pin to ground IN 1 1 1 to assure stability and good transient performance. See Input and Output Capacitor Requirements in the Application Information section for more details. GND 2 2 2 Ground pin Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V EN 6 3 3 puts the regulator into shutdown mode and reduces operating current to 1 μA, nominal. NC 4, 5 4 4 No connection. This pin can be tied to ground to improve thermal dissipation. Regulated output voltage pin. A small 1-μF ceramic capacitor is needed from this OUT 3 5 5 pin to ground to assure stability. See Input and Output Capacitor Requirements in the Application Information section for more details. Copyright 2009–2011, Texas Instruments Incorporated 5 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 InputVoltage(V) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 O ut pu tV o lta ge (V ) +125 C +85 C +25 C 40 C- I =10mAOUT 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 InputVoltage(V) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 O ut pu tV o lta ge (V ) +125 C +85 C +25 C 40 C- I =200mAOUT 0 40 60 100 120 140 180 200 OutputCurrent(mA) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 O ut pu tV o lta ge (V ) +125 C +85 C +25 C 40 C- 20 80 160 250 200 150 100 50 0 D ro po ut V o lta ge (m V) 2.25 2.75 3.25 3.75 4.25 4.75 InputVoltage(V) +125 C +85 C +25 C 40 C- I =200mAOUT 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 O ut pu tV o lta ge (V ) -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature( C) I =200mA I =10mA I =150mA OUT OUT OUT 0 30 60 90 120 150 180 210 OutputCurrent(mA) 180 160 140 120 100 80 60 40 20 0 D ro po ut V o lta ge (V ) +125 C +85 C +25 C 40 C- TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS Over operating temperature range (TJ = –40C to +125C), VIN = VOUT(TYP) + 0.5 V or 2.0 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1.0 μF, unless otherwise noted. Typical values are at TJ = +25C. TLV70018 TLV70018 LINE REGULATION LINE REGULATION Figure 2. Figure 3. TLV70018 DROPOUT VOLTAGE LOAD REGULATION vs INPUT VOLTAGE Figure 4. Figure 5. DROPOUT VOLTAGE vs OUTPUT CURRENT TLV70018 VOUT = 4.8V OUTPUT VOLTAGE vs TEMPERATURE Figure 6. Figure 7. 6 Copyright 2009–2011, Texas Instruments Incorporated +125 C +85 C +25 C 40 C- 300 250 200 150 100 50 0 G ro un d Pi n Cu rre nt ( A) m 0 20 40 60 80 100 120 140 160 180 200 OutputCurrent(mA) 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 InputVoltage(V) 50 45 40 35 30 25 20 15 10 5 0 G ro un d Pi n Cu rre nt ( A) m +125 C +85 C +25 C 40 C- I =0mAOUT 40 35 30 25 20 15 10 5 0 G ro un d Pi n Cu rre nt ( A) m -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature( C) I =0mAOUT 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6 InputVoltage(V) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 Sh ut do wn C ur re nt ( A) m +125 C +85 C +25 C 100 90 80 70 60 50 40 30 20 10 0 PS RR (d B) 10 100 1k 10k 100k 1M 10M Frequency(Hz) I =150mAOUT I =10mAOUT V V =0.5VIN OUT- 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 InputVoltage(V) 80 70 60 50 40 30 20 10 0 PS RR (d B) 10kHz 100kHz 1kHz TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ = –40C to +125C), VIN = VOUT(TYP) + 0.5 V or 2.0 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1.0 μF, unless otherwise noted. Typical values are at TJ = +25C. TLV70018 TLV70018 GROUND PIN CURRENT vs INPUT VOLTAGE GROUND PIN CURRENT vs LOAD Figure 8. Figure 9. TLV70018 TLV70018 GROUND PIN CURRENT vs TEMPERATURE SHUTDOWN CURRENT vs INPUT VOLTAGE Figure 10. Figure 11. TLV70018 TLV70018 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY POWER-SUPPLY RIPPLE REJECTION vs INPUT VOLTAGE Figure 12. Figure 13. Copyright 2009–2011, Texas Instruments Incorporated 7 10 0 m A/ di v 50 m V/ di v 10 s/divm VOUT VIN =2.1V IOUT 200mA 0mA t =t =1 sR F m 10 1 0.1 0.01 0O ut pu tS pe ct ra lN oi se D en sit y ( V / ) m H z Ö 10 100 1k 10k 100k 1M 10M Frequency(Hz) I =10mA C =C =1 F OUT mIN OUT 20 m A/ di v 5 m V/ di v 10 s/divm VOUT VIN =2.3V IOUT 10mA 0mA t =t =1 sR F m 50 m A/ di v 20 m V/ di v 10 s/divm VOUT VIN =2.3V IOUT 50mA 0mA t =t =1 sR F m 1 V/ di v 5 m V/ di v 1ms/div VOUT SlewRate=1V/ sm VIN2.9V 2.3V I 200mAOUT = 1 V/ di v 5 m V/ di v 1ms/div VOUT VIN 2.7V 2.3V I 1mAOUT = SlewRate=1V/ sm TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ = –40C to +125C), VIN = VOUT(TYP) + 0.5 V or 2.0 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1.0 μF, unless otherwise noted. Typical values are at TJ = +25C. TLV70018 OUTPUT SPECTRAL NOISE DENSITY TLV70018 vs OUTPUT VOLTAGE LOAD TRANSIENT RESPONSE Figure 14. Figure 15. TLV70018 TLV70018 LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE Figure 16. Figure 17. TLV70018 TLV70018 LINE TRANSIENT RESPONSE LINE TRANSIENT RESPONSE Figure 18. Figure 19. 8 Copyright 2009–2011, Texas Instruments Incorporated 1 V/ di v 10 m V/ di v 1ms/div VOUT VIN5.5V 2.1V I 200mAOUT = SlewRate=1V/ sm 1 V/ di v 200ms/div VOUT VIN I 1mAOUT = TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ = –40C to +125C), VIN = VOUT(TYP) + 0.5 V or 2.0 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1.0 μF, unless otherwise noted. Typical values are at TJ = +25C. TLV70018 TLV70018 LINE TRANSIENT RESPONSE VIN RAMP UP, RAMP DOWN RESPONSE Figure 20. Figure 21. Copyright 2009–2011, Texas Instruments Incorporated 9 TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com APPLICATION INFORMATION The TLV700xx belongs to a new family of next-generation value LDO regulators. These devices Board Layout Recommendations to Improve consume low quiescent current and deliver excellent PSRR and Noise Performance line and load transient performance. These Input and output capacitors should be placed ascharacteristics, combined with low noise, very good close to the device pins as possible. To improve acPSRR with little (VIN – VOUT) headroom, make this performance such as PSRR, output noise, andfamily of devices ideal for RF portable applications. transient response, it is recommended that the boardThis family of regulators offers current limit and be designed with separate ground planes for VIN andthermal protection, and is specified from –40C to VOUT, with the ground plane connected only at the+125C. GND pin of the device. In addition, the ground connection for the output capacitor should beInput and Output Capacitor Requirements connected directly to the GND pin of the device. High 1.0-μF X5R- and X7R-type ceramic capacitors are ESR capacitors may degrade PSRR performance. recommended because these capacitors have minimal variation in value and equivalent series Internal Current Limit resistance (ESR) over temperature. The TLV700xx internal current limit helps to protect However, the TLV700xx is designed to be stable with the regulator during fault conditions. During current an effective capacitance of 0.1 μF or larger at the limit, the output sources a fixed amount of current output. Thus, the device is stable with capacitors of that is largely independent of the output voltage. In other dielectric types as well, as long as the effective such a case, the output voltage is not regulated, and capacitance under operating bias voltage and is VOUT = ILIMIT RLOAD. The PMOS pass transistor temperature is greater than 0.1 μF. This effective dissipates (VIN – VOUT) ILIMIT until thermal shutdown capacitance refers to the capacitance that the LDO is triggered and the device turns off. As the device sees under operating bias voltage and temperature cools down, it is turned on by the internal thermal conditions; that is, the capacitance after taking both shutdown circuit. If the fault condition continues, the bias voltage and temperature derating into device cycles between current limit and thermal consideration. In addition to allowing the use of shutdown. See the Thermal Information section for cheaper dielectrics, this capability of being stable with more details. 0.1-μF effective capacitance also enables the use of The PMOS pass element in the TLV700xx has asmaller footprint capacitors that have higher derating built-in body diode that conducts current when thein size- and space-constrained applications. voltage at OUT exceeds the voltage at IN. This Note that using a 0.1-μF rated capacitor at the output current is not limited, so if extended reverse voltage of the LDO does not ensure stability because the operation is anticipated, external limiting to 5% of the effective capacitance under the specified operating rated output current is recommended. conditions would be less than 0.1 μF. Maximum ESR should be less than 200 mΩ. Shutdown Although an input capacitor is not required for The enable pin (EN) is active high. The device is stability, it is good analog design practice to connect enabled when voltage at EN pin goes above 0.9V. a 0.1-μF to 1.0-μF, low ESR capacitor across the IN This relatively lower value of voltage required to turn pin and GND in of the regulator. This capacitor the LDO on can be exploited to power the LDO with a counteracts reactive input sources and improves GPIO of recent processors whose GPIO Logic 1 transient response, noise rejection, and ripple voltage level is lower than traditional microcontrollers. rejection. A higher-value capacitor may be necessary The device is turned OFF when the EN pin is held at if large, fast rise-time load transients are anticipated, less than 0.4V. When shutdown capability is not or if the device is not located close to the power required, EN can be connected to the IN pin. source. If source impedance is more than 2 Ω, a 0.1-μF input capacitor may be necessary to ensure stability. 10 Copyright 2009–2011, Texas Instruments Incorporated P =(V V ) I- D IN OUT OUT TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 Dropout Voltage For good reliability, thermal protection should trigger at least +35C above the maximum expected ambientThe TLV700xx uses a PMOS pass transistor to condition of the particular application. This achieve low dropout. When (VIN – VOUT) is less than configuration produces a worst-case junctionthe dropout voltage (VDO), the PMOS pass device is temperature of +125C at the highest expectedin the linear region of operation and the ambient temperature and worst-case load.input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with output The internal protection circuitry of the TLV700xx has current because the PMOS device behaves as a been designed to protect against overload conditions. resistor in dropout. It was not intended to replace proper heatsinking. Continuously running the TLV700xx into thermalAs with any linear regulator, PSRR and transient shutdown degrades device reliability. response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in Figure 13 in the Power DissipationTypical Characteristics section. The ability to remove heat from the die is different for Transient Response each package type, presenting different considerations in the printed circuit board (PCB)As with any regulator, increasing the size of the layout. The PCB area around the device that is free output capacitor reduces over-/undershoot magnitude of other components moves the heat from the devicebut increases the duration of th

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