Semiconductor Components Industries, LLC, 2004
September, 2004 − Rev. 10
1 Publication Order Number:
NCP1010/D
NCP1010, NCP1011,
NCP1012, NCP1013,
NCP1014
Self-Supplied Monolithic
Switcher for Low Standby-
Power Offline SMPS
The NCP101X series integrates a fixed−frequency current−mode
controller and a 700 V MOSFET. Housed in a PDIP−7,
PDIP−7 Gull Wing, or SOT−223 package, the NCP101X offers
everything needed to build a rugged and low−cost power supply,
including soft−start, frequency jittering, short−circuit protection,
skip−cycle, a maximum peak current setpoint and a Dynamic
Self−Supply (no need for an auxiliary winding).
Unlike other monolithic solutions, the NCP101X is quiet by nature:
during nominal load operation, the part switches at one of the available
frequencies (65 − 100 − 130 kHz). When the current setpoint falls
below a given value, e.g. the output power demand diminishes, the IC
automatically enters the so−called skip−cycle mode and provides
excellent efficiency at light loads. Because this occurs at typically 1/4
of the maximum peak value, no acoustic noise takes place. As a result,
standby power is reduced to the minimum without acoustic noise
generation.
Short−circuit detection takes place when the feedback signal fades
away, e.g. in true short−circuit conditions or in broken Optocoupler
cases. External disabling is easily done either simply by pulling the
feedback pin down or latching it to ground through an inexpensive
SCR for complete latched−off. Finally soft−start and frequency
jittering further ease the designer task to quickly develop low−cost and
robust offline power supplies.
For improved standby performance, the connection of an auxiliary
winding stops the DSS operation and helps to consume less than
100 mW at high line. In this mode, a built−in latched overvoltage
protection prevents from lethal voltage runaways in case the
Optocoupler would brake. These devices are available in economical
8−pin dual−in−line and 4−pin SOT−223 packages.
Features
• Built−in 700 V MOSFET with Typical RDSon of 11 �
and 22 �
• Large Creepage Distance Between High−Voltage Pins
• Current−Mode Fixed Frequency Operation:
65 kHz – 100 kHz − 130 kHz
• Skip−Cycle Operation at Low Peak Currents Only:
No Acoustic Noise!
• Dynamic Self−Supply, No Need for an Auxiliary
Winding
• Internal 1.0 ms Soft−Start
• Latched Overvoltage Protection with Auxiliary
Winding Operation
• Frequency Jittering for Better EMI Signature
• Auto−Recovery Internal Output Short−Circuit
Protection
• Below 100 mW Standby Power if Auxiliary Winding
is Used
• Internal Temperature Shutdown
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Pb−Free Packages are Available*
Typical Applications
• Low Power AC/DC Adapters for Chargers
• Auxiliary Power Supplies (USB, Appliances,
TVs, etc.)
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
PDIP−7
CASE 626A
AP SUFFIX
1
8
MARKING DIAGRAMS
P101xAPyy
AWL
YYWW
1
See detailed ordering and shipping information in the package
dimensions section on page 22 of this data sheet.
ORDERING INFORMATION
SOT−223
CASE 318E
ST SUFFIX1
4
101xy
ALYW
1
4
x = Current Limit (0, 1, 2, 3, 4)
yy = 06 (65 kHz), 10 (100 kHz), 13 (130 kHz)
y = Oscillator Frequency
A (65 kHz), B (100 kHz), C (130 kHz)
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
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1
PDIP−7
(Gull Wing)
CASE 626AA
APL SUFFIX
1
101xAPLyy
AWL
YYWW
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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2
1VCC 8 GND
2NC
3NC
4FB
7 NC
5 DRAIN
(Top View)
PIN CONNECTIONS
PDIP−7 SOT−223
(Top View)
1
2
3
4
VCC
FB
DRAIN
GND
1VCC 8 GND
2NC
3NC
4FB
7 NC
5 DRAIN
(Top View)
PDIP−7
(Gull Wing)
Indicative Maximum Output Power from NCP1014
RDSon − Ip 230 Vac 100 − 250 Vac
11 � − 450 mA DSS 14 W 6.0 W
11 � − 450 mA Auxiliary Winding 19 W 8.0 W
1. Informative values only, with: Tamb = 50°C, Fswitching = 65 kHz, circuit mounted on minimum copper area as recommended.
Figure 1. Typical Application Example
2 7
3
4 5
1 8
100−250 Vac
+
+
NCP101X
Vout
+
GND
Quick Selection Table
NCP1010 NCP1011 NCP1012 NCP1013 NCP1014
RDSon [�] 22 11
Ipeak [mA] 100 250 250 350 450
Freq [kHz] 65 100 130 65 100 130 65 100 130 65 100 130 65 100
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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PIN FUNCTION DESCRIPTION
Pin No.
(SOT−223)
Pin No.
(PDIP−7,
PDIP−7/Gull Wing) Pin Name Function Description
1 1 VCC Powers the Internal Circuitry This pin is connected to an external capacitor of typi-
cally 10 �F. The natural ripple superimposed on the
VCC participates to the frequency jittering. For im-
proved standby performance, an auxiliary VCC can be
connected to Pin 1. The VCC also includes an active
shunt which serves as an opto fail−safe protection.
− 2 NC − −
− 3 NC − −
2 4 FB Feedback Signal Input By connecting an optocoupler to this pin, the peak
current setpoint is adjusted accordingly to the output
power demand.
3 5 Drain Drain Connection The internal drain MOSFET connection.
− − − − −
− 7 NC − This unconnected pin ensures adequate creepage
distance.
4 8 GND The IC Ground −
65, 100 or
130 kHz
Clock
Overload?
UVLO
Management
NC
NC
VCC
FB Drain
NC
GND
Figure 2. Simplified Internal Circuit Architecture
2
1
3
4
IVCC I?
Vclamp*
4 V
18 k
Error flag armed?
EMI Jittering
VCC Startup Source
Drain
Flip−Flop
DCmax = 65%
Reset
Reset
High when VCC � 3 V
Driver
S
Q
R
−
+
Iref = 7.4 mA
IVCC
Set Q
VCC
8
Rsense
250 ns
L.E.B.
7
5
−
+
+
-
Soft−Start
Startup Sequence
Overload
− +
0.5 V
Drain
*Vclamp = VCCOFF + 200 mV (8.7 V Typical)
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MAXIMUM RATINGS
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Rating ÁÁÁÁÁ
ÁÁÁÁÁ
Symbol ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
Value ÁÁÁÁ
ÁÁÁÁ
Unit
Power Supply Voltage on all pins, except Pin 5 (Drain) VCC −0.3 to 10 V
Drain Voltage − −0.3 to 700 V
Drain Current Peak during Transformer Saturation IDS(pk) 2 x Ilim max A
Maximum Current into Pin 1 when Activating the 8.7 V Active Clamp I_VCC 15 mA
Thermal Characteristics
P Suffix, Case 626A and PL Suffix (Gull Wing), Case 626AA
Junction−to−Lead
Junction−to−Air, 2.0 oz Printed Circuit Copper Clad
0.36 Sq. Inch
1.0 Sq. Inch
ST Suffix, Plastic Package Case 318E
Junction−to−Lead
Junction−to−Air, 2.0 oz Printed Circuit Copper Clad
0.36 Sq. Inch
1.0 Sq. Inch
R�JL
R�JA
R�JL
R�JA
9.0
77
60
14
74
55
°C/W
Maximum Junction Temperature TJmax 150 °C
Storage Temperature Range − −60 to +150 °C
ESD Capability, Human Body Model (All pins except HV) − 2.0 kV
ESD Capability, Machine Model − 200 V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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5
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C,
VCC = 8.0 V unless otherwise noted.)
Rating Pin Symbol Min Typ Max Unit
SUPPLY SECTION AND VCC MANAGEMENT
VCC Increasing Level at which the Current Source Turns−off 1 VCCOFF 7.9 8.5 9.1 V
VCC Decreasing Level at which the Current Source Turns−on 1 VCCON 6.9 7.5 8.1 V
VCC Decreasing Level at which the Latch−off Phase Ends 1 VCClatch 4.4 4.7 5.1 V
VCC Decreasing Level at which the Internal Latch is Released 1 VCCreset − 3.0 − V
Internal IC Consumption, MOSFET Switching at 65 kHz 1 ICC1 − 0.92 1.1
(Note 2)
mA
Internal IC Consumption, MOSFET Switching at 100 kHz 1 ICC1 − 0.95 1.15
(Note 2)
mA
Internal IC Consumption, MOSFET Switching at 130 kHz 1 ICC1 − 0.98 1.2
(Note 2)
mA
Internal IC Consumption, Latch−off Phase, VCC = 6.0 V 1 ICC2 − 290 − �A
Active Zener Voltage Positive Offset to VCCOFF 1 Vclamp 140 200 300 mV
Latch−off Current
NCP1012/13/14
NCP1010/11
1 ILatch
6.3
5.8
7.4
7.3
9.2
9.0
mA
POWER SWITCH CIRCUIT
Power Switch Circuit On−state Resistance
NCP1012/13/14 (Id = 50 mA)
TJ = 25°C
TJ = 125°C
NCP1010/11 (Id = 50 mA)
TJ = 25°C
TJ = 125°C
5 RDSon −
11
19
22
38
16
24
35
50
�
Power Switch Circuit and Startup Breakdown Voltage
(ID(off) = 120 �A, TJ = 25°C)
5 BVdss 700 − − V
Power Switch and Startup Breakdown Voltage Off−state
Leakage Current
TJ = 25°C (Vds = 700 V)
TJ = 125°C (Vds = 700 V)
5
5
IDS(OFF)
−
−
50
30
−
−
�A
Switching Characteristics
(RL = 50 �, Vds Set for Idrain = 0.7 x Ilim)
Turn−on Time (90%−10%)
Turn−off Time (10%−90%) 55
ton
toff
−
−
20
10
−
−
ns
INTERNAL STARTUP CURRENT SOURCE
High−voltage Current Source, VCC = 8.0 V
NCP1012/13/14
NCP1010/11
1 IC1
5.0
5.0
8.0
8.5
10
10.3
mA
High−voltage Current Source, VCC = 0 1 IC2 − 10 − mA
CURRENT COMPARATOR TJ = 25°C (Note 2)
Maximum Internal Current Setpoint, NCP1010 (Note 3) 5 Ipeak (22) 90 100 110 mA
Maximum Internal Current Setpoint, NCP1011 (Note 3) 5 Ipeak (22) 225 250 275 mA
Maximum Internal Current Setpoint, NCP1012 (Note 3) 5 Ipeak (11) 225 250 275 mA
Maximum Internal Current Setpoint, NCP1013 (Note 3) 5 Ipeak (11) 315 350 385 mA
Maximum Internal Current Setpoint, NCP1014 (Note 3) 5 Ipeak (11) 405 450 495 mA
Default Internal Current Setpoint for Skip−Cycle Operation,
Percentage of Max Ip
− ILskip − 25 − %
Propagation Delay from Current Detection to Drain OFF State − TDEL − 125 − ns
Leading Edge Blanking Duration − TLEB − 250 − ns
2. See characterization curves for temperature evolution.
3. Adjust di/dt to reach Ipeak in 3.2 �sec.
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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ELECTRICAL CHARACTERISTICS (continued) (For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C,
Max TJ = 150°C, VCC= 8.0 V unless otherwise noted.)
Rating Pin Symbol Min Typ Max Unit
INTERNAL OSCILLATOR
Oscillation Frequency, 65 kHz Version, TJ = 25°C (Note 4) − fOSC 59 65 71 kHz
Oscillation Frequency, 100 kHz Version, TJ = 25°C (Note 4) − fOSC 90 100 110 kHz
Oscillation Frequency, 130 kHz Version, TJ = 25°C (Note 4) − fOSC 117 130 143 kHz
Frequency Dithering Compared to Switching Frequency
(with active DSS)
− fdither − �3.3 − %
Maximum Duty−cycle − Dmax 62 67 72 %
FEEDBACK SECTION
Internal Pull−up Resistor 4 Rup − 18 − k�
Internal Soft−Start (Guaranteed by Design) − Tss − 1.0 − ms
SKIP−CYCLE GENERATION
Default Skip Mode Level on FB Pin 4 Vskip − 0.5 − V
TEMPERATURE MANAGEMENT
Temperature Shutdown − TSD − 150 − °C
Hysteresis in Shutdown − − − 50 − °C
4. See characterization curves for temperature evolution.
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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TYPICAL CHARACTERISTICS
Figure 3. IC1 @ VCC = 8.0 V, FB = 1.5 V
vs. Temperature
−10.0
−9.0
−8.0
−7.0
−6.0
−5.0
−4.0
−3.0
−2.0
−25 0 25 50 75 100 125
TEMPERATURE (°C)
IC
1
( m
A)
Figure 4. ICC1 @ VCC = 8.0 V, FB = 1.5 V
vs. Temperature
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
1.40
1.50
−25 0 25 50 75 100 125
TEMPERATURE (°C)
IC
C1
(m
A)
Figure 5. ICC2 @ VCC = 6.0 V, FB = Open
vs. Temperature
0.20
0.22
0.24
0.26
0.28
0.30
0.32
0.34
0.36
0.38
0.40
−25 0 25 50 75 100 125
TEMPERATURE (°C)
IC
C2
(m
A)
Figure 6. VCC OFF, FB = 1.5 V vs.
Temperature
8.20
8.30
8.40
8.50
8.60
8.70
8.80
8.90
9.00
−25 0 25 50 75 100 125
TEMPERATURE (°C)
VC
C−
O
FF
( V
)
Figure 7. VCC ON, FB = 3.5 V vs. Temperature
7.00
7.10
7.20
7.30
7.40
7.50
7.60
7.70
7.80
7.90
8.00
−25 0 25 50 75 100 125
TEMPERATURE (°C)
VC
C−
O
N
( V
)
Figure 8. Duty Cycle vs. Temperature
65
66
66
67
67
68
68
−25 0 25 50 75 100 125
TEMPERATURE (°C)
D
UT
Y
CY
CL
E
(%
)
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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TYPICAL CHARACTERISTICS
Figure 9. ILatch, FB = 1.5 V vs. Temperature
7.00
7.20
7.40
7.60
7.80
8.00
8.20
8.40
8.60
8.80
9.00
−25 0 25 50 75 100 125
TEMPERATURE (°C)
I_
La
tc
h
(m
A)
Figure 10. Ipeak−RR, VCC = 8.0 V, FB = 3.5 V
vs. Temperature
300
320
340
360
380
400
420
440
460
480
500
−25 0 25 50 75 100 125
TEMPERATURE (°C)
Ip
ea
k
(m
A)
Figure 11. Frequency vs. Temperature
40
60
80
100
120
140
160
−25 0 25 50 75 100 125
TEMPERATURE (°C)
100 kHz
130 kHz
Figure 12. ON Resistance vs. Temperature,
NCP1012/1013
0.00
5.00
10.00
15.00
20.00
25.00
−25 0 25 50 75 100 125
TEMPERATURE (°C)
R
D
So
n
(�
)
f O
SC
(kH
z)
NCP1013
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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9
APPLICATION INFORMATION
Introduction
The NCP101X offers a complete current−mode control
solution (actually an enhanced NCP1200 controller section)
together with a high−voltage power MOSFET in a
monolithic structure. The component integrates everything
needed to build a rugged and low−cost Switch−Mode Power
Supply (SMPS) featuring low standby power. The Quick
Selection Table on Page 2, details the differences between
references, mainly peak current setpoints and operating
frequency.
No need for an auxiliary winding: ON Semiconductor
Very High Voltage Integrated Circuit technology lets you
supply the IC directly from the high−voltage DC rail. We call
it Dynamic Self−Supply (DSS). This solution simplifies the
transformer design and ensures a better control of the SMPS
in difficult output conditions, e.g. constant current
operations. However, for improved standby performance,
an auxiliary winding can be connected to the VCC pin to
disable the DSS operation.
Short−circuit protection: By permanently monitoring the
feedback line activity, the IC is able to detect the presence of
a short−circuit, immediately reducing the output power for
a total system protection. Once the short has disappeared, the
controller resumes and goes back to normal operation.
Fail−safe optocoupler and OVP: When an auxiliary
winding is connected to the VCC pin, the device stops its
internal Dynamic Self−Supply and takes its operating power
from the auxiliary winding. A 8.7 V active clamp is
connected between VCC and ground. In case the current
injected in this clamp exceeds a level of 7.4 mA (typical),
the controller immediately latches off and stays in this
position until VCC cycles down to 3.0 V (e.g. unplugging the
converter from the wall). By adjusting a limiting resistor in
series with the VCC terminal, it becomes possible to
implement an overvoltage protection function, latching off
the circuit in case of broken optocoupler or feedback loop
problems.
Low standby−power: If SMPS naturally exhibits a good
efficiency at nominal load, it begins to be less efficient when
the output power demand diminishes. By skipping unneeded
switching cycles, the NCP101X drastically reduces the
power wasted during light load conditions. An auxiliary
winding can further help decreasing the standby power to
extremely low levels by invalidating the DSS operation.
Typical measurements show results below 80 mW @
230 Vac for a typical 7.0 W universal power supply.
No acoustic noise while operating: Instead of skipping
cycles at high peak currents, the NCP101X waits until the
peak current demand falls below a fixed 1/4 of the maximum
limit. As a result, cycle skipping can take place without
having a singing transformer … You can thus select cheap
magnetic components free of noise problems.
SPICE model: A dedicated model to run transient
cycle−by−cycle simulations is available but also an
averaged version to help close the loop. Ready−to−use
templates can be downloaded in OrCAD’s PSpice, and
INTUSOFT’s IsSpice4 from ON Semiconductor web site,
NCP101X related section.
Dynamic Self−Supply
When the power supply is first powered from the mains
outlet, the internal current source (typically 8.0 mA) is
biased and charges up the VCC capacitor from the drain pin.
Once the voltage on this VCC capacitor reaches the VCCOFF
level (typically 8.5 V), the current source turns off and
pulses are delivered by the output stage: the circuit is awake
and activates the power MOSFET. Figure 13 details the
internal circuitry.
Figure 13. The Current Source Regulates VCC
by Introducing a Ripple
Vref OFF = 8.5 V
Vref ON = 7.5 V
Vref Latch = 4.7 V*
-
+
Internal Supply
+
Vref VCCOFF
+200 mV
(8.7 V Typ.)
VCC
+
CVCC
Startup Source
Drain
*In fault condition
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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10
Figure 14. The Charge/Discharge Cycle Over a 10 �F VCC Capacitor
Vcc
8.5 V
7.5 V
Device
Internally
Pulses
Startup Period
8.00
6.00
4.00
2.00
0
The protection burst duty−cycle can easily be computed
through the various timing events as portrayed by Figure 16.
Being loaded by the circuit consumption, the voltage on
the VCC capacitor goes down. When the DSS controller
detects that VCC has reached 7.5 V (VCCON), it activates the
internal current source to bring VCC toward 8.5 V and stops
again: a cycle takes place whose low frequency depends on
the VCC capacitor and the IC consumption. A 1.0 V ripple
takes place on the VCC pin whose average value equals
(VCCOFF + VCCON)/2. Figure 14 portrays a typical
operation of the DSS.
As one can see, the VCC capacitor shall be dimensioned to
offer an adequate startup time, i.e. ensure regulation is
reached before VCC crosses 7.5 V (otherwise the part enters
the fault condition mode). If we know that �V = 1.0 V
and ICC1 (max) is 1.1 mA (for instance we selected an 11 �
device switching at 65 kHz), then the VCC capacitor can
be calculated using: C ICC1 · tstartup
�V
(eq. 1)
. Let’s
suppose that the SMPS needs 10 ms to startup, then we will
calculate C to offer a 15 ms period. As a result, C should be
greater than 20 �F thus the selection of a 33 �F/16 V
capacitor is appropriate.
Short Circuit Protection
The internal protection circuitry involves a patented
arrangement that permanently monitors the assertion of an
internal error flag. This error flag is, in fact, a signal that
instructs the controller that the internal maximum peak
current limit is reached. This naturally occurs during the
startup period (Vout is not stabilized to the target value) or
when the optocoupler LED is no longer biased, e.g. in a
short−circuit condition or when the feedback network is
broken. When the DSS normally operates, the logic checks
for the presence of the error flag every time VCC crosses
VCCON. If the error flag is low (peak limit not active) then
the IC works normally. If the error signal is active, then the
NCP101X immediately stops the output pulses, reduces its
internal current consumption and does not allow the startup
source to activate: VCC drops toward ground until it reaches
the so−called latch−off level, where the current source
activates again to attempt a new restart. When the error is
gone, the IC automatically resumes its operation. If the
default is still there, the IC pulses during 8.5 V down to 7.5 V
and enters a new latch−off phase. The resulting burst
operation guarantees a low average power dissipation and
lets the SMPS sustain a permanent short−circuit. Figure 15
shows the corresponding diagram.
Figure 15. Simplified NCP101X Short−Circuit
Detection Circuitry
−
+
4 V
FB
Division
Max
Ip
Flag
VCC VCCON
Signal
To
Latch
Reset
Current Sense
Information
Clamp
Active?
NCP1010, NCP1011, NCP1012, NCP1013, NCP1014
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11
Figure 16. NCP101X Facing a Fault Condition (Vin = 150 Vdc)
Tstart
Tsw
TLatch
1 V Ripple
Latch−off
Level
The rising slope from the latch−off level up to 8.5 V
is expressed by: Tstart� �V1 · CIC1 . The time during which
the IC actually pulses is given by tsw� �V2 · CICC1 .
Finally, the latch−off time can be derived
using the same formula topology: TLatch� �V3 · CICC2 .
From these three definitions, the burst duty−cycle
can be com
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