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74AHCT245PW.pdf

74AHCT245PW.pdf

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简介:本文档为《74AHCT245PWpdf》,可适用于硬件技术领域,主题内容包含AHCAHCTOctalbustransceiverstateGeneraldescriptionTheAHCAHCTisahighspeedSig符等。

74AHC245; 74AHCT245 Octal bus transceiver; 3-state 1. General description The 74AHC245; 74AHCT245 is a high-speed Si-gate CMOS device. The 74AHC245; 74AHCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74AHC245; 74AHCT245 features an output enable input (OE), for easy cascading, and a send and receive direction control input (DIR). OE controls the outputs so that the buses are effectively isolated. 2. Features n Balanced propagation delays n All inputs have Schmitt-trigger actions n Inputs accept voltages higher than VCC n Input levels: u For 74AHC245: CMOS level u For 74AHCT245: TTL level n ESD protection: u HBM EIA/JESD22-A114E exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V u CDM EIA/JESD22-C101C exceeds 1000 V n Multiple package options n Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Rev. 05 — 28 April 2009 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC245D 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74AHCT245D 74AHC245PW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74AHCT245PW 74AHC245BQ 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 4.5 0.85 mm SOT764-1 74AHCT245BQ NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 4. Functional diagram Fig 1. Logic symbol Fig 2. IEC logic symbol 2 1 DIR 18 19 B0 B1 B2 B3 B4 B5 B6 B7 3 17 4 16 5 15 6 14 7 13 8 12 9 A0 A1 A2 A3 A4 A5 A6 A7 11 OE mna174 173 1 19 2 1 164 155 146 137 128 119 18 G3 3EN1 3EN2 2 mna175 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 2 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 3. Pin configuration SO20, TSSOP20 Fig 4. Pin configuration DHVQFN20 74AHC245 74AHCT245 DIR VCC A0 OE A1 B0 A2 B1 A3 B2 A4 B3 A5 B4 A6 B5 A7 B6 GND B7 001aak037 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 001aak038 74AHC245 74AHCT245 Transparent top view B6 A6 A7 B5 A5 B4 A4 B3 A3 B2 A2 B1 A1 B0 A0 OE G ND B 7 D IR V C C 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 10 11 1 20 terminal 1 index area GND(1) Table 2. Pin description Symbol Pin Description DIR 1 direction control input A0 2 data input/output A1 3 data input/output A2 4 data input/output A3 5 data input/output A4 6 data input/output A5 7 data input/output A6 8 data input/output A7 9 data input/output GND 10 ground (0 V) B7 11 data input/output B6 12 data input/output B5 13 data input/output B4 14 data input/output 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 3 of 16 B3 15 data input/output B2 16 data input/output NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 6. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO20 packages: above 70 C the value of Ptot derates linearly at 8 mW/K. For TSSOP20 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K. B1 17 data input/output B0 18 data input/output OE 19 output enable input (active LOW) VCC 20 supply voltage Table 2. Pin description …continued Symbol Pin Description Table 3. Function table[1] Control Input/output OE DIR An Bn L L A = B inputs L H inputs B = A H X Z Z Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +7.0 V VI input voltage 0.5 +7.0 V IIK input clamping current VI < 0.5 V [1] 20 - mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] 20 +20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) 25 +25 mA ICC supply current - +75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C [2] - 500 mW 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 4 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 8. Recommended operating conditions 9. Static characteristics Table 5. Operating conditions Symbol Parameter Conditions Min Typ Max Unit 74AHC245 VCC supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V 74AHCT245 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate VCC = 4.5 V to 5.5 V - - 20 ns/V Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74AHC245 VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VIL LOW-level input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V VOH HIGH-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 3.94 - - 3.80 - 3.70 - V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 5 of 16 IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 0.25 - 2.5 - 10.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA CI input capacitance VI = VCC or GND - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF 74AHCT245 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 50 µA 4.4 4.5 - 4.4 - 4.4 - V IO = 8.0 mA 3.94 - - 3.80 - 3.70 - V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 50 µA - 0 0.1 - 0.1 - 0.1 V IO = 8.0 mA - - 0.36 - 0.44 - 0.55 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 0.25 - 2.5 - 10.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA ICC additional supply current per input pin; VI = VCC 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance VI = VCC or GND - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 6 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max 74AHC245 tpd propagation delay An to Bn; Bn to An; see Figure 5 [2] VCC = 3.0 V to 3.6 V CL = 15 pF - 5.0 8.4 1.0 10.0 1.0 10.5 ns CL = 50 pF - 6.5 11.9 1.0 13.5 1.0 15.0 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF 5.0 7.5 1.0 8.5 1.0 9.5 ns ten enable time OE to An; OE to Bn; signal name DIR; see Figure 6 [3] VCC = 3.0 V to 3.6 V CL = 15 pF - 6.5 13.2 1.0 15.5 1.0 16.5 ns CL = 50 pF - 9.0 16.7 1.0 19.0 1.0 21.0 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 4.0 8.5 1.0 10.0 1.0 11.0 ns CL = 50 pF - 5.0 10.6 1.0 12.0 1.0 13.5 ns tdis disable time OE to An; OE to Bn; signal name DIR; see Figure 6 [4] VCC = 3.0 V to 3.6 V CL = 15 pF - 7.5 12.5 1.0 15.5 1.0 16.0 ns CL = 50 pF - 10.0 15.8 1.0 18.0 1.0 20.0 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 4.5 7.8 1.0 9.2 1.0 10.0 ns CL = 50 pF - 6.0 9.7 1.0 11.0 1.0 12.5 ns CPD power dissipation capacitance fi = 1 MHz; VI = GND to VCC [5] - 12 - - - - - pF 74AHCT245; VCC = 4.5 V to 5.5 V tpd propagation delay An to Bn; Bn to An; see Figure 5 [2] CL = 15 pF - 3.5 7.7 1.0 8.5 1.0 10.0 ns CL = 50 pF - 4.5 8.7 1.0 9.5 1.0 11.0 ns ten enable time OE to An; OE to Bn; signal name DIR; see Figure 6 [3] 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 7 of 16 CL = 15 pF - 5.0 13.8 1.0 15.0 1.0 17.5 ns CL = 50 pF - 6.0 14.8 1.0 16.0 1.0 18.5 ns NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZL and tPZH. [4] tdis is the same as tPLZ and tPHZ. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD VCC2 fi N + Σ(CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL VCC2 fo) = sum of the outputs. 10.1 Waveforms tdis disable time OE to An; OE to Bn; signal name DIR; see Figure 6 [4] CL = 15 pF - 5.0 14.4 1.0 15.5 1.0 18.0 ns CL = 50 pF - 6.0 15.4 1.0 16.5 1.0 19.5 ns CPD power dissipation capacitance fi = 1 MHz; VI = GND to VCC [5] - 15 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Input to output propagation delays mna176 An, Bn input Bn, An output tPLH tPHL GND VI VM VM VM VM VOH VOL 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 8 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Enable and disable times mna367 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Table 8. Measurement points Type Input Output VM VM VX VY 74AHC245 0.5 VCC 0.5 VCC VOL + 0.3 V VOH 0.3 V 74AHCT245 1.5 V 0.5 VCC VOL + 0.3 V VOH 0.3 V 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 9 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 7. Load circuitry for measuring switching times VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aad983 DUT VCC VCC VI VO RT RL S1 CL openG Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74AHC245 VCC 3.0 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHCT245 3.0 V 3.0 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 10 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 11. Package outline UNIT Amax. A1 A2 A3 bp c D (1) E (1) (1)e HE L Lp Q Zywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 2.65 0.30.1 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.1 0.4 SOT163-1 10 20 w M bp detail X Z e 11 1 D y 0.25 075E04 MS-013 pin 1 index 0.1 0.0120.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.05 1.4 0.0550.4190.394 0.043 0.039 0.035 0.0160.01 0.25 0.01 0.0040.0430.0160.01 0 5 10 mm scale X q A A1 A2 HE Lp Q E c L v M A (A )3 A SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 99-12-27 03-02-19 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 11 of 16 Fig 8. Package outline SOT163-1 (SO20) NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state UNIT A1 A2 A3 bp c D (1) E (2) (1)e HE L Lp Q Zywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.150.05 0.95 0.80 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.5 0.2 8 0 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT360-1 MO-153 99-12-2703-02-19 w M bp D Z e 0.25 1 10 20 11 pin 1 index q AA1 A2 Lp Q detail X L (A )3 HE E c v M A X A y 0 2.5 5 mm scale TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 A max. 1.1 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 12 of 16 Fig 9. Package outline SOT360-1 (TSSOP20) NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state terminal 1 index area 0.51 A1 EhbUNIT ye 0.2 c REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 4.6 4.4 Dh 3.15 2.85 y1 2.6 2.4 1.15 0.85 e1 3.50.300.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) SOT764-1 MO-241 - - -- - - 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT764-1 DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm A(1) max. A A1 c detail X yy1 Ce L Eh Dh e e1 b 2 9 19 12 11 101 20 X D E C B A terminal 1 index area AC C Bv M w M E(1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D(1) 02-10-17 03-01-27 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 13 of 16 Fig 10. Package outline SOT764-1 (DHVQFN20) NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 12. Abbreviations 13. Revision history Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT245_5 20090428 Product data sheet - 74AHC_AHCT245_4 Modifications: • Section 3: DHVQFN20 package added. • Section 7: derating values added for DHVQFN20 package. • Section 11: outline drawing added for DHVQFN20 package. 74AHC_AHCT245_4 20080425 Product data sheet - 74AHC_AHCT245_N_3 74AHC_AHCT245_N_3 20070925 Product data sheet - 74AHC_AHCT245_2 74AHC_AHCT245_2 19990928 Product specification - 74AHC_AHCT245_1 74AHC_AHCT245_1 19980921 Product specification - - 74AHC_AHCT245_5 NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 28 April 2009 14 of 16 NXP Semiconductors 74AHC245; 74AHCT245 Octal bus transceiver; 3-state 14. Legal information 14.1 Data sheet status [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 14.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no r

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