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MPU6050寄存器操作 InvenSense Inc. 1197 Borregas Ave, Sunnyvale, CA 94089 U.S.A. Tel: +1 (408) 988-7339 Fax: +1 (408) 988-8104 Website: www.invensense.com Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY ...

MPU6050寄存器操作
InvenSense Inc. 1197 Borregas Ave, Sunnyvale, CA 94089 U.S.A. Tel: +1 (408) 988-7339 Fax: +1 (408) 988-8104 Website: www.invensense.com Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 1 of 50 MPU-6000 and MPU-6050 Register Map and Descriptions Revision 3.2 MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 2 of 50 CONTENTS 1 REVISION HISTORY ................................................................................................................................... 4 2 PURPOSE AND SCOPE ............................................................................................................................. 5 3 REGISTER MAP .......................................................................................................................................... 6 4 REGISTER DESCRIPTIONS ....................................................................................................................... 9 4.1 REGISTER 1 – AUXILIARY I2C SUPPLY SELECTION ................................................................................. 9 4.2 REGISTER 25 – SAMPLE RATE DIVIDER .............................................................................................. 10 4.3 REGISTER 26 – CONFIGURATION ........................................................................................................ 11 4.4 REGISTER 27 – GYROSCOPE CONFIGURATION .................................................................................... 12 4.5 REGISTER 28 – ACCELEROMETER CONFIGURATION ............................................................................. 13 4.6 REGISTER 29 – FREE FALL ACCELERATION THRESHOLD...................................................................... 14 4.7 REGISTER 30 – FREE FALL DURATION ................................................................................................ 14 4.8 REGISTER 31 – MOTION DETECTION THRESHOLD ............................................................................... 16 4.9 REGISTER 32 – MOTION DETECTION DURATION .................................................................................. 16 4.10 REGISTER 33 – ZERO MOTION DETECTION THRESHOLD ...................................................................... 17 4.11 REGISTER 34 – ZERO MOTION DETECTION DURATION ......................................................................... 17 4.12 REGISTER 35 – FIFO ENABLE ............................................................................................................ 18 4.13 REGISTER 36 – I2C MASTER CONTROL ............................................................................................... 19 4.14 REGISTERS 37 TO 39 – I2C SLAVE 0 CONTROL ................................................................................... 21 4.15 REGISTERS 40 TO 42 – I2C SLAVE 1 CONTROL ................................................................................... 24 4.16 REGISTERS 43 TO 45 – I2C SLAVE 2 CONTROL ................................................................................... 24 4.17 REGISTERS 46 TO 48 – I2C SLAVE 3 CONTROL ................................................................................... 24 4.18 REGISTERS 49 TO 53 – I2C SLAVE 4 CONTROL ................................................................................... 25 4.19 REGISTER 54 – I2C MASTER STATUS .................................................................................................. 27 4.20 REGISTER 55 – INT PIN / BYPASS ENABLE CONFIGURATION ................................................................ 28 4.21 REGISTER 56 – INTERRUPT ENABLE ................................................................................................... 29 4.22 REGISTER 58 – INTERRUPT STATUS ................................................................................................... 30 4.23 REGISTERS 59 TO 64 – ACCELEROMETER MEASUREMENTS ................................................................. 31 4.24 REGISTERS 65 AND 66 – TEMPERATURE MEASUREMENT ..................................................................... 32 4.25 REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENTS ........................................................................ 33 4.26 REGISTERS 73 TO 96 – EXTERNAL SENSOR DATA ............................................................................... 34 4.27 REGISTER 97 – MOTION DETECTION STATUS ...................................................................................... 36 4.28 REGISTER 99 – I2C SLAVE 0 DATA OUT .............................................................................................. 37 4.29 REGISTER 100 – I2C SLAVE 1 DATA OUT ............................................................................................ 37 MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 3 of 50 4.30 REGISTER 101 – I2C SLAVE 2 DATA OUT ............................................................................................ 38 4.31 REGISTER 102 – I2C SLAVE 3 DATA OUT ............................................................................................ 38 4.32 REGISTER 103 – I2C MASTER DELAY CONTROL .................................................................................. 39 4.33 REGISTER 104 – SIGNAL PATH RESET ................................................................................................ 40 4.34 REGISTER 105 – MOTION DETECTION CONTROL ................................................................................. 41 4.35 REGISTER 106 – USER CONTROL ....................................................................................................... 42 4.36 REGISTER 107 – POWER MANAGEMENT 1 .......................................................................................... 44 4.37 REGISTER 108 – POWER MANAGEMENT 2 .......................................................................................... 46 4.38 REGISTER 114 AND 115 – FIFO COUNT REGISTERS ........................................................................... 47 4.39 REGISTER 116 – FIFO READ WRITE .................................................................................................. 48 4.40 REGISTER 117 – WHO AM I ................................................................................................................ 49 MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 4 of 50 1 Revision History Revision Date Revision Description 11/29/2010 1.0 Initial Release 04/20/2011 1.1 Updated register map and descriptions to reflect enhanced register functionality. 05/19/2011 2.0 Updates for Rev C silicon: Edits for readability (section 2.1) Edits for changes in functionality (section 3, 4.4, 4.6, 4.7, 4.8, 4.21, 4.22, 4.23, 4.37) 10/07/2011 3.0 Updates for Rev D silicon: Updated accelerometer sensitivity specifications (sections 4.6, 4.8, 4.10, 4.23) 10/24/2011 3.1 Edits for clarity 11/14/2011 3.2 Updated reset value for register 107 (section 3) Updated register 27 with gyro self-test bits (section 4.4) Provided gyro self-test instructions and register bits (section 4.4) Provided accel self-test instructions (section 4.5) MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 5 of 50 2 Purpose and Scope This document provides preliminary information regarding the register map and descriptions for the Motion Processing Units™ MPU-6000™ and MPU-6050™, collectively called the MPU-60X0™ or MPU™. The MPU devices provide the world’s first integrated 6-axis motion processor solution that eliminates the package-level gyroscope and accelerometer cross-axis misalignment associated with discrete solutions. The devices combine a 3-axis gyroscope and a 3-axis accelerometer on the same silicon die together with an onboard Digital Motion Processor™ (DMP™) capable of processing complex 9-axis sensor fusion algorithms using the field-proven and proprietary MotionFusion™ engine. The MPU-6000 and MPU-6050’s integrated 9-axis MotionFusion algorithms access external magnetometers or other sensors through an auxiliary master I 2 C bus, allowing the devices to gather a full set of sensor data without intervention from the system processor. The devices are offered in the same 4x4x0.9 mm QFN footprint and pinout as the current MPU-3000™ family of integrated 3-axis gyroscopes, providing a simple upgrade path and facilitating placement on already space constrained circuit boards. For precision tracking of both fast and slow motions, the MPU-60X0 features a user-programmable gyroscope full-scale range of ±250, ±500, ±1000, and ±2000°/sec (dps). The parts also have a user- programmable accelerometer full-scale range of ±2g, ±4g, ±8g, and ±16g. The MPU-6000 family is comprised of two parts, the MPU-6000 and MPU-6050. These parts are identical to each other with two exceptions. The MPU-6050 supports I 2 C communications at up to 400kHz and has a VLOGIC pin that defines its interface voltage levels; the MPU-6000 supports SPI at up to 20MHz in addition to I 2 C, and has a single supply pin, VDD, which is both the device’s logic reference supply and the analog supply for the part. For more detailed information for the MPU-60X0 devices, please refer to the “MPU-6000 and MPU-6050 Product Specification”. MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 6 of 50 3 Register Map The register map for the MPU-60X0 is listed below. Addr (Hex) Addr (Dec.) Register Name Serial I/F Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 01 1 AUX_VDDIO R/W AUX _VDDIO - - - - - - - 19 25 SMPLRT_DIV R/W SMPLRT_DIV[7:0] 1A 26 CONFIG R/W - - EXT_SYNC_SET[2:0] DLPF_CFG[2:0] 1B 27 GYRO_CONFIG R/W - - - FS_SEL [1:0] - - - 1C 28 ACCEL_CONFIG R/W XA_ST YA_ST ZA_ST AFS_SEL[1:0] ACCEL_HPF[2:0] 1D 29 FF_THR R/W FF_THR[7:0] 1E 30 FF_DUR R/W FF_DUR[7:0] 1F 31 MOT_THR R/W MOT_THR[7:0] 20 32 MOT_DUR R/W MOT_DUR[7:0] 21 33 ZRMOT_THR R/W ZRMOT_THR[7:0] 22 34 ZRMOT_DUR R/W ZRMOT_DUR[7:0] 23 35 FIFO_EN R/W TEMP _FIFO_EN XG _FIFO_EN YG _FIFO_EN ZG _FIFO_EN ACCEL _FIFO_EN SLV2 _FIFO_EN SLV1 _FIFO_EN SLV0 _FIFO_EN 24 36 I2C_MST_CTRL R/W MULT _MST_EN WAIT _FOR_ES SLV_3 _FIFO_EN I2C_MST _P_NSR I2C_MST_CLK[3:0] 25 37 I2C_SLV0_ADDR R/W I2C_SLV0 _RW I2C_SLV0_ADDR[6:0] 26 38 I2C_SLV0_REG R/W I2C_SLV0_REG[7:0] 27 39 I2C_SLV0_CTRL R/W I2C_SLV0 _EN I2C_SLV0 _BYTE_SW I2C_SLV0 _REG_DIS I2C_SLV0 _GRP I2C_SLV0_LEN[3:0] 28 40 I2C_SLV1_ADDR R/W I2C_SLV1 _RW I2C_SLV1_ADDR[6:0] 29 41 I2C_SLV1_REG R/W I2C_SLV1_REG[7:0] 2A 42 I2C_SLV1_CTRL R/W I2C_SLV1 _EN I2C_SLV1 _BYTE_SW I2C_SLV1 _REG_DIS I2C_SLV1 _GRP I2C_SLV1_LEN[3:0] 2B 43 I2C_SLV2_ADDR R/W I2C_SLV2 _RW I2C_SLV2_ADDR[6:0] 2C 44 I2C_SLV2_REG R/W I2C_SLV2_REG[7:0] 2D 45 I2C_SLV2_CTRL R/W I2C_SLV2 _EN I2C_SLV2 _BYTE_SW I2C_SLV2 _REG_DIS I2C_SLV2 _GRP I2C_SLV2_LEN[3:0] 2E 46 I2C_SLV3_ADDR R/W I2C_SLV3 _RW I2C_SLV3_ADDR[6:0] 2F 47 I2C_SLV3_REG R/W I2C_SLV3_REG[7:0] 30 48 I2C_SLV3_CTRL R/W I2C_SLV3 _EN I2C_SLV3 _BYTE_SW I2C_SLV3 _REG_DIS I2C_SLV3 _GRP I2C_SLV3_LEN[3:0] 31 49 I2C_SLV4_ADDR R/W I2C_SLV4 _RW I2C_SLV4_ADDR[6:0] 32 50 I2C_SLV4_REG R/W I2C_SLV4_REG[7:0] 33 51 I2C_SLV4_DO R/W I2C_SLV4_DO[7:0] 34 52 I2C_SLV4_CTRL R/W I2C_SLV4 _EN I2C_SLV4 _INT_EN I2C_SLV4 _REG_DIS I2C_MST_DLY[4:0] 35 53 I2C_SLV4_DI R I2C_SLV4_DI[7:0] 36 54 I2C_MST_STATUS R PASS_ THROUGH I2C_SLV4 _DONE I2C_LOST _ARB I2C_SLV4 _NACK I2C_SLV3 _NACK I2C_SLV2 _NACK I2C_SLV1 _NACK I2C_SLV0 _NACK 37 55 INT_PIN_CFG R/W INT_LEVEL INT_OPEN LATCH _INT_EN INT_RD _CLEAR FSYNC_ INT_LEVEL FSYNC _INT_EN I2C _BYPASS _EN CLKOUT _EN MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 7 of 50 Addr (Hex) Addr (Dec.) Register Name Serial I/F Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 38 56 INT_ENABLE R/W FF_EN MOT_EN ZMOT_EN FIFO _OFLOW _EN I2C_MST _INT_EN - - DATA _RDY_EN 3A 58 INT_STATUS R FF_INT MOT_INT ZMOT _INT FIFO _OFLOW _INT I2C_MST _INT - - DATA _RDY_INT 3B 59 ACCEL_XOUT_H R ACCEL_XOUT[15:8] 3C 60 ACCEL_XOUT_L R ACCEL_XOUT[7:0] 3D 61 ACCEL_YOUT_H R ACCEL_YOUT[15:8] 3E 62 ACCEL_YOUT_L R ACCEL_YOUT[7:0] 3F 63 ACCEL_ZOUT_H R ACCEL_ZOUT[15:8] 40 64 ACCEL_ZOUT_L R ACCEL_ZOUT[7:0] 41 65 TEMP_OUT_H R TEMP_OUT[15:8] 42 66 TEMP_OUT_L R TEMP_OUT[7:0] 43 67 GYRO_XOUT_H R GYRO_XOUT[15:8] 44 68 GYRO_XOUT_L R GYRO_XOUT[7:0] 45 69 GYRO_YOUT_H R GYRO_YOUT[15:8] 46 70 GYRO_YOUT_L R GYRO_YOUT[7:0] 47 71 GYRO_ZOUT_H R GYRO_ZOUT[15:8] 48 72 GYRO_ZOUT_L R GYRO_ZOUT[7:0] 49 73 EXT_SENS_DATA_00 R EXT_SENS_DATA_00[7:0] 4A 74 EXT_SENS_DATA_01 R EXT_SENS_DATA_01[7:0] 4B 75 EXT_SENS_DATA_02 R EXT_SENS_DATA_02[7:0] 4C 76 EXT_SENS_DATA_03 R EXT_SENS_DATA_03[7:0] 4D 77 EXT_SENS_DATA_04 R EXT_SENS_DATA_04[7:0] 4E 78 EXT_SENS_DATA_05 R EXT_SENS_DATA_05[7:0] 4F 79 EXT_SENS_DATA_06 R EXT_SENS_DATA_06[7:0] 50 80 EXT_SENS_DATA_07 R EXT_SENS_DATA_07[7:0] 51 81 EXT_SENS_DATA_08 R EXT_SENS_DATA_08[7:0] 52 82 EXT_SENS_DATA_09 R EXT_SENS_DATA_09[7:0] 53 83 EXT_SENS_DATA_10 R EXT_SENS_DATA_10[7:0] 54 84 EXT_SENS_DATA_11 R EXT_SENS_DATA_11[7:0] 55 85 EXT_SENS_DATA_12 R EXT_SENS_DATA_12[7:0] 56 86 EXT_SENS_DATA_13 R EXT_SENS_DATA_13[7:0] 57 87 EXT_SENS_DATA_14 R EXT_SENS_DATA_14[7:0] 58 88 EXT_SENS_DATA_15 R EXT_SENS_DATA_15[7:0] 59 89 EXT_SENS_DATA_16 R EXT_SENS_DATA_16[7:0] 5A 90 EXT_SENS_DATA_17 R EXT_SENS_DATA_17[7:0] 5B 91 EXT_SENS_DATA_18 R EXT_SENS_DATA_18[7:0] 5C 92 EXT_SENS_DATA_19 R EXT_SENS_DATA_19[7:0] 5D 93 EXT_SENS_DATA_20 R EXT_SENS_DATA_20[7:0] 5E 94 EXT_SENS_DATA_21 R EXT_SENS_DATA_21[7:0] 5F 95 EXT_SENS_DATA_22 R EXT_SENS_DATA_22[7:0] 60 96 EXT_SENS_DATA_23 R EXT_SENS_DATA_23[7:0] MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 8 of 50 Addr (Hex) Addr (Dec.) Register Name Serial I/F Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 61 97 MOT_DETECT_STAT US R MOT _XNEG MOT _XPOS MOT _YNEG MOT _YPOS MOT _ZNEG MOT _ZPOS - MOT _ZRMOT 63 99 I2C_SLV0_DO R/W I2C_SLV0_DO[7:0] 64 100 I2C_SLV1_DO R/W I2C_SLV1_DO[7:0] 65 101 I2C_SLV2_DO R/W I2C_SLV2_DO[7:0] 66 102 I2C_SLV3_DO R/W I2C_SLV3_DO[7:0] 67 103 I2C_MST_DELAY_CT RL R/W DELAY_ES _SHADOW - - I2C_SLV4 _DLY_EN I2C_SLV3 _DLY_EN I2C_SLV2 _DLY_EN I2C_SLV1 _DLY_EN I2C_SLV0 _DLY_EN 68 104 SIGNAL_PATH_RES ET R/W - - - - - GYRO _RESET ACCEL _RESET TEMP _RESET 69 105 MOT_DETECT_CTRL R/W - - ACCEL_ON_DELAY[1:0] FF_COUNT[1:0] MOT_COUNT[1:0] 6A 106 USER_CTRL R/W - FIFO_EN I2C_MST _EN I2C_IF _DIS - FIFO _RESET I2C_MST _RESET SIG_COND _RESET 6B 107 PWR_MGMT_1 R/W DEVICE _RESET SLEEP CYCLE - TEMP_DIS CLKSEL[2:0] 6C 108 PWR_MGMT_2 R/W LP_WAKE_CTRL[1:0] STBY_XA STBY_YA STBY_ZA STBY_XG STBY_YG STBY_ZG 72 114 FIFO_COUNTH R/W FIFO_COUNT[15:8] 73 115 FIFO_COUNTL R/W FIFO_COUNT[7:0] 74 116 FIFO_R_W R/W FIFO_DATA[7:0] 75 117 WHO_AM_I R - WHO_AM_I[6:1] - Note: Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value. In the detailed register tables that follow, register names are in capital letters, while register values are in capital letters and italicized. For example, the ACCEL_XOUT_H register (Register 59) contains the 8 most significant bits, ACCEL_XOUT[15:8], of the 16-bit X-Axis accelerometer measurement, ACCEL_XOUT. The reset value is 0x00 for all registers other than the registers below.  Register 107: 0x40.  Register 117: 0x68. MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 9 of 50 4 Register Descriptions This section describes the function and contents of each register within the MPU-60X0. Note: The device will come up in sleep mode upon power-up. 4.1 Register 1 – Auxiliary I 2 C Supply Selection AUX_VDDIO Type: Read/Write Register (Hex) Register (Decimal) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 01 1 AUX _VDDIO - - - - - - - Description: This register specifies the auxiliary I 2 C supply voltage level. For MPU-6050: AUX_VDDIO configures the high logic level of the auxiliary I 2 C bus to be either VLOGIC or VDD. For MPU-6000: AUX_VDDIO should be written as 0. Bits 6 through 0 are reserved. Parameters: AUX_VDDIO MPU-6050: When set to 1, the auxiliary I 2 C bus high logic level is VDD. When cleared to 0, the auxiliary I 2 C bus high logic level is VLOGIC MPU-6000: Write 0 for AUX_VDDIO. MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 10 of 50 4.2 Register 25 – Sample Rate Divider SMPRT_DIV Type: Read/Write Register (Hex) Register (Decimal) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 19 25 SMPLRT_DIV[7:0] Description: This register specifies the divider from the gyroscope output rate used to generate the Sample Rate for the MPU-60X0. The sensor register output, FIFO output, DMP sampling, Motion detection, Zero Motion detection, and Free Fall detection are all based on the Sample Rate. The Sample Rate is generated by dividing the gyroscope output rate by SMPLRT_DIV: Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV) where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or 7), and 1kHz when the DLPF is enabled (see Register 26). Note: The accelerometer output rate is 1kHz. This means that for a Sample Rate greater than 1kHz, the same accelerometer sample may be output to the FIFO, DMP, and sensor registers more than once. For a diagram of the gyroscope and accelerometer signal paths, see Section 8 of the MPU- 6000/MPU-6050 Product Specification document. Parameters: SMPLRT_DIV 8-bit unsigned value. The Sample Rate is determined by dividing the gyroscope output rate by this value. MPU-6000/MPU-6050 Register Map and Descriptions Document Number: RM-MPU-6000A-00 Revision: 3.2 Release Date: 11/14/2011 CONFIDENTIAL & PROPRIETARY 11 of 50 4.3 Register 26 – Configuration CONFIG Type: Read/Write Register (Hex) Register (Decimal) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1A 26 - - EXT_SYNC_SET[2:0] DLPF_CFG[2:0] Description: This register configures the external Frame Synchronization (FSYNC) pin sampling and the Digital Low Pass Filter (DLPF) setting for both the gyroscopes and accelerometers. An external signal connected to the FSYNC pin can be sampled by configuring EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short strobes
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