75C185

SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 � Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 � Single Chip With Easy Interface Between UART and Serial-Port Connector � Less Than 9-mW Power Consumption � Wide Driver Supply Voltage . . . 4.5 V to 13.2 V � Driver Output Slew Rate Limited to 30 V/m s Max � Receiver Input Hysteresis . . . 1100 mV Typ � Push-Pull Receiver Outputs � On-Chip Receiver 1-m s Noise Filter � Functionally Interchangeable With Texas Instruments SN75185 � Operates Up to 120 kbit/s Over a 3-Meter Cable (See Application Information for Conditions) description The SN75C185 is a low-power BiMOS device containing three independent drivers and five receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). Typically, the SN75C185 replaces one SN75188 and two SN75189 devices. This device conforms to TIA/EIA-232-F. The drivers and receivers of the SN75C185 are similar to those of the SN75C188 and SN75C189A, respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/m s, and the receivers have filters that reject input noise pulses that are shorter than 1 m s. Both these features eliminate the need for external components. The SN75C185 uses the low-power BiMOS technology. In most applications, the receivers contained in this device interface to single inputs of peripheral devices such as ACEs, UARTS, or microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN75C185 receiver outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families. The SN75C185 is characterized for operation from 0°C to 70°C. Copyright  2000, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VDD RA1 RA2 RA3 DY1 DY2 RA4 DY3 RA5 VSS VCC RY1 RY2 RY3 DA1 DA2 RY4 DA3 RY5 GND DW OR N PACKAGE (TOP VIEW) SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic symbol† 9 8 7 6 5 4 3 2 RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 12 13 14 15 16 17 18 19 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) RY1RA1 RY2RA2 RY3RA3 DA1DY1 DA2DY2 RY4RA4 DA3DY3 RY5RA5 SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 equivalent schematics of inputs and outputs GND Input DA Internal 1.4-V Ref to GND VSS VDD EQUIVALENT DRIVER INPUT EQUIVALENT DRIVER OUTPUT GND VSS 74 W 160 W 72 W EQUIVALENT RECEIVER INPUT Input RA 3.4 kW 1.5 kW 530 k W GND EQUIVALENT RECEIVER OUTPUT VCC GND Output DY Output RY VDD ESD Protection ESD Protection All resistor values are nominal. SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VSS –13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI: Driver VSS to VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver –30 V to 30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO: Driver VSS– 6 V to VDD + 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver –0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, q JA (see Note 2): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions MIN NOM MAX UNIT VDD 4.5 12 13.2 V Supply voltage VSS –4.5 –12 –13.2 V VCC 4.5 5 6 V VI Input voltage (see Note 3) Drivers VSS+2 VDD VVI Input voltage (see Note 3) Receivers –25 25 V VIH High-level input voltage Drivers 2 V VIL Low-level input voltage Drivers 0.8 V IOH High-level output current Receivers –1 mA IOL High-level output current Receivers 3.2 mA TA Operating free-air temperature 0 70 °C NOTE 3: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage. supply currents PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IDD Supply current from VDD No load, VDD = 5 V, VSS = –5 V 115 200 m AIDD Supply current from VDD , All inputs at 2 V or 0.8 V VDD = 12 V, VSS = –12 V 115 200 m A ISS Supply current from VSS No load, VDD = 5 V, VSS = –5 V –115 –200 m AISS Supply current from VSS , All inputs at 2 V or 0.8 V VDD = 12 V, VSS = –12 V –115 –200 m A ICC Supply current from VCC No load VDD = 5 V, VSS = –5 V 750 m AICC Supply current from VCC All inputs at 0 or 5 V VDD = 12 V, VSS = –12 V 750 m A SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DRIVER SECTION electrical characteristics over operating free-air temperature range, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10% (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High level output voltage VIL = 0.8 V, RL = 3 k W , VDD = 5 V, VSS = –5 V 4 4.5 VVOH High-level output voltage IL , See Figure 1 L , VDD = 12 V VSS = –12 V 10 10.8 V VOL Low-level output voltage VIH = 0.8 V, RL = 3 k W, VDD = 5 V, VSS = –5 V –4.4 –4 VVOL g (see Note 3) IH , See Figure 1 L , VDD = 12 V VSS = –12 V –10.7 –10 V IIH High-level input current VI = 5 V, See Figure 2 1 m A IIL Low-level input current VI = 0, See Figure 2 –1 m A IOS(H) High-level short-circuit VI = 0.8 V, VO = 0 or VO = VSS, 4 5 12 19 5 mAIOS(H) goutput current (see Note 4) I , See FIgure 1 O O SS, –4.5 –12 –19.5 mA IOS(L) Low-level short-circuit VI = 2 V, VO = 0 or VO = VDD, 4 5 12 19 5 mAIOS(L) output current (see Note 4) I , See Figure 1 O O DD, 4.5 12 19.5 mA ro Output resistance VDD = VSS = VCC = 0, See Note 5 VO = – 2 V to 2 V, 300 400 W † All typical values are at TA = 25 °C. NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage. 4. Not more than one output should be shorted at one time. 5. Test conditions are those specified by TIA/EIA-232-F. switching characteristics, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10%, TA = 25°C (unless otherwise noted) (see Figure 3) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output (see Note 6) 1.2 3 m s tPHL Propagation delay time, high- to low-level output (see Note 6) RL = 3 k W to 7 k W, CL = 15 pF 2.5 3.5 m s tTLH Transition time, low- to high-level output 0.53 2 3.2 m s tTHL Transition time, high- to low-level output 0.53 2 3.2 m s tTLH Transition time, low- to high-level output (see Note 7) RL = 3 kW to 7 kW CL = 2500 pF 1 m s tTHL Transition time, high- to low-level output (see Note 7) RL = 3 kW to 7 kW , CL = 2500 pF 1 m s SR Output slew rate (see Note 7) RL = 3 k W to 7 k W , CL = 15 pF 4 10 30 V/m s NOTES: 6. tPHL and tPLH include the additional time due to on-chip slew rate and are measured at the 50% points. 7. Measured between 3-V and –3-V points of output waveform TIA/EIA-232-F conditions), and all unused inputs are tied either high or low. SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RECEIVER SECTION electrical characteristics over operating free-air temperature range, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10% (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going input threshhold voltage See Figure 5 1.6 2.1 2.55 V VIT– Negative-going input threshhold voltage See Figure 5 0.65 1 1.25 V Vhys Input hysteresis voltage (VIT+ – VIT–) 600 1100 mV VI = 0.75 V, IOH = –20 m A, See Figure 5 and Note 8 3.5 VOH High level output voltage VI = 0.75 V, VCC = 4.5 V 2.8 4.4 VVOH High-level output voltage VI = 0.75 V,IOH = –1 mA, VCC = 5 V 3.8 4.9 V See Figure 5 VCC = 5.5 V 4.3 5.4 VOL Low-level output voltage VI = 3 V, IOL = 3.2 mA, See Figure 5 0.17 0.4 V IIH High level input current VI = 3 V 0.43 0.55 1 mAIIH High-level input current VI = 25 V 3.6 4.6 8.3 mA IIL Low level input current VI = –3 V –0.43 –0.55 –1 mAIIL Low-level input current VI = –25 V –3.6 –5.0 –8.3 mA IOS(H) Short-circuit output at high level VI = 0.75 V, VO = 0, See Figure 4 –8 –15 mA IOS(L) Short-circuit output at low level VI = VCC, VO = VCC, See Figure 4 13 25 mA † All typical values are at TA = 25 °C. NOTE 8: If the inputs are left unconnected, the receiver interprets this as an input low, and the receiver outputs remain in the high state. switching characteristics, VDD = 12 V, VSS = –12 V, VCC = 5 V ±10%, TA = 25°C (unless otherwise noted) (see Figure 6) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output 3 4 m s tPHL Propagation delay time, high- to low-level output RL = 5 kW CL = 50 pF 3 4 m s tTLH Transition time, low- to high-level output RL = 5 kW , CL = 50 pF 300 450 ns tTHL Transition time, high- to low-level output 100 300 ns tw(N) Duration of longest pulse rejected as noise (see Note 9) RL = 5 k W , CL = 50 pF 1 4 m s NOTE 9: The receiver ignores any postive- or negative-going pulse that is less than the minimum value of tw(N) and accepts any positive- or negative-going pulse greater than the maximum of tw(N). SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION IOS(L) – IOS(H) VI VO VDD or GND VSS or GND RL = 3 k W (for VOH and VOL tests only) Figure 1. Driver Test Circuit for VOH, VOL, IOS(H), and IOS(L) – IIL IIH VI VI Figure 2. Driver Test Circuit for IIH and IIL 3 V 0 V 1.5 V 1.5 VInput tPHL tPLH 90% 50% 10% 50% 10% 90% tTHL tTLH VOH VOL TEST CIRCUIT VOLTAGE WAVEFORMS Output NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: tw = 25 m s, PRR = 20 kHz, ZO = 50 W , tr = tf < 50 ns. CL(see Note A)RL Input Output Pulse Generator (See Note B) Figure 3. Driver Test Circuit and Voltage Waveforms SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VI IOS(L) – IOS(H) Figure 4. Receiver Test Circuit for IOS(H) and IOS(L) VIT, VI IOL VOH –IOH VOL Figure 5. Receiver Test Circuit for VIT, VOH, and VOL 4 V 0 V 50% 50%Input tPHL tPLH 90% 50% 10% 50% 10% 90% tTHL tTLH VOH VOL TEST CIRCUIT VOLTAGE WAVEFORMS Output NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: tw = 25 m s, PRR = 20 kHz, ZO = 50 W , tr = tf < 50 ns. Pulse Generator (See Note B) RL Input Output CL(see Note A) Figure 6. Receiver Propagation and Transition Times SN75C185 LOW-POWER MULTIPLE DRIVERS AND RECEIVERS SLLS065F – AUGUST 1989 – REVISED JANUARY 2000 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION 11 12 13 14 15 16 17 18 19 20 GND RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 VCC VSS RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 VDD 10 9 8 7 6 5 4 3 2 1 43 37 40 13 36 11 41 42 RI DTR CTS SO RTS SI DSR DCD R1 DTR CTS TX RTS RX DSR DCD SN75C185 5 V TL16C450 ACE 1 5 6 9 12 V –12 V TIA/EIA-232-F DB9S Connector Figure 7. Typical Connection The SN75C185 supports data rates up to 120 kbit/s over a 3-meter cable. Laboratory experiments show that, with CL= 500 pF and RL = 3 k W (minimum RS-232 input resistance load), the device can support this data rate. The 500-pF load approximates a typical 3-meter cable because the maximum RS-232 specification is 2500 pF (or about 15 meters). Figure 8 shows the test circuit used. Temperature was varied from 0°C to 70°C for the experiment. NOTES: A. The pulse generator has the following characteristics: PRR = 60 kHz (120 kbit/s), ZO = 50 W . B. VCC = 5 V, VDD = 12 V, VSS = –12 V. CLRL Input Output Pulse Generator (See Note A) VSS VCC VDD Figure 8. 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