AD637_DataSheet

FUNCTIONAL BLOCK DIAGRAMS REV. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a High Precision,Wide-Band RMS-to-DC Converter AD637 The AD637 is available in two accuracy grades (J, K) for com- mercial (0° C to +70° C) temperature range applications; two accuracy grades (A, B) for industrial (–40° C to +85 ° C) applica- tions; and one (S) rated over the –55° C to +125 ° C temperature range. All versions are available in hermetically-sealed, 14-lead side-brazed ceramic DIPs as well as low cost cerdip packages. A 16-lead SOIC package is also available. PRODUCT HIGHLIGHTS 1. The AD637 computes the true root-mean-square, mean square, or absolute value of any complex ac (or ac plus dc) input waveform and gives an equivalent dc output voltage. The true rms value of a waveform is more useful than an average rectified signal since it relates directly to the power of the signal. The rms value of a statistical signal is also related to the standard deviation of the signal. 2. The AD637 is laser wafer trimmed to achieve rated perfor- mance without external trimming. The only external compo- nent required is a capacitor which sets the averaging time period. The value of this capacitor also determines low fre- quency accuracy, ripple level and settling time. 3. The chip select feature of the AD637 permits the user to power down the device down during periods of nonuse, thereby, decreasing battery drain in remote or hand-held applications. 4. The on-chip buffer amplifier can be used as either an input buffer or in an active filter configuration. The filter can be used to reduce the amount of ac ripple, thereby, increasing the accuracy of the measurement. PRODUCT DESCRIPTION The AD637 is a complete high accuracy monolithic rms-to-dc converter that computes the true rms value of any complex waveform. It offers performance that is unprecedented in inte- grated circuit rms-to-dc converters and comparable to discrete and modular techniques in accuracy, bandwidth and dynamic range. A crest factor compensation scheme in the AD637 per- mits measurements of signals with crest factors of up to 10 with less than 1% additional error. The circuit’s wide bandwidth per- mits the measurement of signals up to 600 kHz with inputs of 200 mV rms and up to 8 MHz when the input levels are above 1 V rms. As with previous monolithic rms converters from Analog Devices, the AD637 has an auxiliary dB output available to the user. The logarithm of the rms output signal is brought out to a separate pin allowing direct dB measurement with a useful range of 60 dB. An externally programmed reference current allows the user to select the 0 dB reference voltage to correspond to any level between 0.1 V and 2.0 V rms. A chip select connection on the AD637 permits the user to decrease the supply current from 2.2 mA to 350 m A during periods when the rms function is not in use. This feature facili- tates the addition of precision rms measurement to remote or hand-held applications where minimum power consumption is critical. In addition when the AD637 is powered down the out- put goes to a high impedance state. This allows several AD637s to be tied together to form a wide-band true rms multiplexer. The input circuitry of the AD637 is protected from overload voltages that are in excess of the supply levels. The inputs will not be damaged by input signals if the supply voltages are lost. FEATURES High Accuracy 0.02% Max Nonlinearity, 0 V to 2 V RMS Input 0.10% Additional Error to Crest Factor of 3 Wide Bandwidth 8 MHz at 2 V RMS Input 600 kHz at 100 mV RMS Computes: True RMS Square Mean Square Absolute Value dB Output (60 dB Range) Chip Select-Power Down Feature Allows: Analog “3-State” Operation Quiescent Current Reduction from 2.2 mA to 350 mA Side-Brazed DIP, Low Cost Cerdip and SOIC One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 BUFFER AD637 ABSOLUTE VALUE SQUARER/DIVIDER BIAS SECTION FILTER 25kV 25kV 1 2 3 4 5 6 7 14 13 12 11 10 98 16 15 SOIC (R) Package BUFFER AD637 ABSOLUTE VALUE SQUARER/DIVIDER BIAS SECTION FILTER 25kV 25kV 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Ceramic DIP (D) and Cerdip (Q) Packages AD637–SPECIFICATIONS (@ +258C, and 615 V dc unless otherwise noted) REV. E–2– AD637J/A AD637K/B AD637S Model Min Typ Max Min Typ Max Min Typ Max Units TRANSFER FUNCTION VOUT = avg . (VIN ) 2 VOUT = avg . (VIN ) 2 VOUT = avg . (VIN ) 2 CONVERSION ACCURACY Total Error, Internal Trim1 (Fig. 2) 61 6 0.5 60.5 6 0.2 61 6 0.5 mV – % of Reading TMIN to TMAX 63.0 6 0.6 62.0 6 0.3 66 6 0.7 mV – % of Reading vs. Supply, + VIN = +300 mV 30 150 30 150 30 150 m V/V vs. Supply, – VIN = –300 mV 100 300 100 300 100 300 m V/V DC Reversal Error at 2 V 0.25 0.1 0.25 % of Reading Nonlinearity 2 V Full Scale2 0.04 0.02 0.04 % of FSR Nonlinearity 7 V Full Scale 0.05 0.05 0.05 % of FSR Total Error, External Trim – 0.5 – 0.1 – 0.25 – 0.05 – 0.5 – 0.1 mV – % of Reading ERROR VS. CREST FACTOR3 Crest Factor 1 to 2 Specified Accuracy Specified Accuracy Specified Accuracy Crest Factor = 3 – 0.1 – 0.1 – 0.1 % of Reading Crest Factor = 10 – 1.0 – 1.0 – 1.0 % of Reading AVERAGING TIME CONSTANT 25 25 25 ms/ m F CAV INPUT CHARACTERISTICS Signal Range, – 15 V Supply Continuous RMS Level 0 to 7 0 to 7 0 to 7 V rms Peak Transient Input – 15 – 15 – 15 V p-p Signal Range, – 5 V Supply Continuous rms Level 0 to 4 0 to 4 0 to 4 V rms Peak Transient Input – 6 – 6 – 6 V p-p Maximum Continuous Nondestructive Input Level (All Supply Voltages) – 15 – 15 – 15 V p-p Input Resistance 6.4 8 9.6 6.4 8 9.6 6.4 8 9.6 k W Input Offset Voltage – 0.5 – 0.2 – 0.5 mV FREQUENCY RESPONSE4 Bandwidth for 1% Additional Error (0.09 dB) VIN = 20 mV 11 11 11 kHz VIN = 200 mV 66 66 66 kHz VIN = 2 V 200 200 200 kHz – 3 dB Bandwidth VIN = 20 mV 150 150 150 kHz VIN = 200 mV 1 1 1 MHz VIN = 2 V 8 8 8 MHz OUTPUT CHARACTERISTICS Offset Voltage 61 60.5 61 mV vs. Temperature – 0.05 60.089 – 0.04 60.056 – 0.04 60.07 mV/ ° C Voltage Swing, – 15 V Supply, 2 kW Load 0 to +12.0 +13.5 0 to +12.0 +13.5 0 to +12.0 +13.5 V Voltage Swing, – 3 V Supply, 2 kW Load 0 to +2 +2.2 0 to +2 +2.2 0 to +2 +2.2 V Output Current 6 6 6 mA Short Circuit Current 20 20 20 mA Resistance, Chip Select “High” 0.5 0.5 0.5 W Resistance, Chip Select “Low” 100 100 100 k W dB OUTPUT Error, VIN 7 mV to 7 V rms, 0 dB = 1 V rms – 0.5 – 0.3 – 0.5 dB Scale Factor –3 –3 –3 mV/dB Scale Factor Temperature Coefficient +0.33 +0.33 +0.33 % of Reading/° C –0.033 –0.033 –0.033 dB/ ° C IREF for 0 dB = 1 V rms 5 20 80 5 20 80 5 20 80 m A IREF Range 1 100 1 100 1 100 m A BUFFER AMPLIFIER Input Output Voltage Range –VS to (+VS –VS to (+VS –VS to (+VS – 2.5 V) – 2.5 V) – 2.5 V) V Input Offset Voltage – 0.8 62 – 0.5 61 – 0.8 62 mV Input Current – 2 610 – 2 65 – 2 610 nA Input Resistance 108 108 108 W Output Current (+5 mA, (+5 mA, (+5 mA, –130 m A) –130 m A) –130 m A) Short Circuit Current 20 20 20 mA Small Signal Bandwidth 1 1 1 MHz Slew Rate5 5 5 5 V/ m s DENOMINATOR INPUT Input Range 0 to +10 0 to +10 0 to +10 V Input Resistance 20 25 30 20 25 30 20 25 30 k W Offset Voltage – 0.2 – 0.5 – 0.2 – 0.5 – 0.2 – 0.5 mV CHIP SELECT PROVISION (CS) RMS “ON” Level Open or +2.4 V < VC < +VS Open or +2.4 V < VC < +VS Open or +2.4 V < VC < +VS RMS “OFF” Level VC < +0.2 V VC < +0.2 V VC < +0.2 V IOUT of Chip Select CS “LOW” 10 10 10 m A CS “HIGH” Zero Zero Zero On Time Constant 10 m s + ((25 kW ) · CAV) 10 m s + ((25 kW ) · CAV) 10 m s + ((25 kW ) · CAV) Off Time Constant 10 m s + ((25 kW ) · CAV) 10 m s + ((25 kW ) · CAV) 10 m s + ((25 kW ) · CAV) POWER SUPPLY Operating Voltage Range 63.0 618 63.0 618 63.0 618 V Quiescent Current 2.2 3 2.2 3 2.2 3 mA Standby Current 350 450 350 450 350 450 m A TRANSISTOR COUNT 107 107 107 Administrator 高亮 Administrator 高亮 NOTES 1Accuracy specified 0-7 V rms dc with AD637 connected as shown in Figure 2. 2Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V. 3Error vs. crest factor is specified as additional error for 1 V rms. 4Input voltages are expressed in volts rms. % are in % of reading. 5With external 2 k W pull down resistor tied to –VS. Specifications subject to change without notice. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. ABSOLUTE MAXIMUM RATINGS ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 18 V dc Internal Quiescent Power Dissipation . . . . . . . . . . . . 108 mW Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range . . . . . . . . . . . . –65° C to +150° C Lead Temperature Range (Soldering 10 secs) . . . . . . . +300 ° C Rated Operating Temperature Range AD637J, K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 ° C to +70° C AD637A, B . . . . . . . . . . . . . . . . . . . . . . . . –40 ° C to +85 ° C AD637S, 5962-8963701CA . . . . . . . . . . . –55° C to +125° C ORDERING GUIDE Temperature Package Package Model Range Description Option AD637AR –40 ° C to +85 ° C SOIC R-16 AD637BR –40° C to +85 ° C SOIC R-16 AD637AQ –40 ° C to +85 ° C Cerdip Q-14 AD637BQ –40 ° C to +85 ° C Cerdip Q-14 AD637JD 0° C to +70 ° C Side Brazed Ceramic DIP D-14 AD637JD/+ 0° C to +70 ° C Side Brazed Ceramic DIP D-14 AD637KD 0° C to +70 ° C Side Brazed Ceramic DIP D-14 AD637KD/+ 0° C to +70 ° C Side Brazed Ceramic DIP D-14 AD637JQ 0° C to +70 ° C Cerdip Q-14 AD637KQ 0° C to +70 ° C Cerdip Q-14 AD637JR 0° C to +70 ° C SOIC R-16 AD637JR-REEL 0° C to +70 ° C SOIC R-16 AD637JR-REEL7 0° C to +70 ° C SOIC R-16 AD637KR 0° C to +70 ° C SOIC R-16 AD637SD –55° C to +125 ° C Side Brazed Ceramic DIP D-14 AD637SD/883B –55° C to +125 ° C Side Brazed Ceramic DIP D-14 AD637SQ/883B –55° C to +125 ° C Cerdip Q-14 AD637SCHIPS 0° C to +70 ° C Die 5962-8963701CA* –55° C to +125 ° C Cerdip Q-14 *A standard microcircuit drawing is available. FILTER/AMPLIFIER 24kV 24kV ONE QUADRANT SQUARER/DIVIDER BUFFER AMPLIFIER Q1 Q2 Q3 Q4 125V 6kV6kV 12kV 24kV A5 A1 A2 ABSOLUTE VALUE VOLTAGE – CURRENT CONVERTER I1 I3 I4 A4 A3 BIASQ5 CAV +VS RMS OUT COM CS DEN INPUT OUTPUT OFFSET dB OUT AD637VIN BUFF OUT BUFF IN –VS Figure 1. Simplified Schematic CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD637 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. AD637 REV. E –3– WARNING! ESD SENSITIVE DEVICE AD637 REV. E–4– the AD637 can be ac coupled through the addition of a non- polar capacitor in series with the input as shown in Figure 2. BUFFER AD637 ABSOLUTE VALUE SQUARER/DIVIDER BIAS SECTION FILTER 25kV 25kV 1 2 3 4 5 6 7 14 13 12 11 10 9 8 CAV –VS +VS NC VIN NC OPTIONAL AC COUPLING CAPACITOR VO = VIN3 Figure 2. Standard RMS Connection The performance of the AD637 is tolerant of minor variations in the power supply voltages, however, if the supplies being used exhibit a considerable amount of high frequency ripple it is advisable to bypass both supplies to ground through a 0.1 m F ceramic disc capacitor placed as close to the device as possible. The output signal range of the AD637 is a function of the sup- ply voltages, as shown in Figure 3. The output signal can be used buffered or nonbuffered depending on the characteristics of the load. If no buffer is needed, tie buffer input (Pin 1) to common. The output of the AD637 is capable of driving 5 mA into a 2 kW load without degrading the accuracy of the device. SUPPLY VOLTAGE – DUAL SUPPLY – Volts 20 15 0 0 61865 M A X V O UT – Vo lts 2 kV Lo ad 610 10 5 61563 Figure 3. AD637 Max VOUT vs. Supply Voltage CHIP SELECT The AD637 includes a chip select feature which allows the user to decrease the quiescent current of the device from 2.2 mA to 350 m A. This is done by driving the CS, Pin 5, to below 0.2 V dc. Under these conditions, the output will go into a high im- pedance state. In addition to lowering power consumption, this feature permits bussing the outputs of a number of AD637s to form a wide bandwidth rms multiplexer. If the chip select is not being used, Pin 5 should be tied high. FUNCTIONAL DESCRIPTION The AD637 embodies an implicit solution of the rms equation that overcomes the inherent limitations of straightforward rms computation. The actual computation performed by the AD637 follows the equation V rms = Avg V IN2 V rms Ø º Œ Œ ø ß œ œ Figure 1 is a simplified schematic of the AD637, it is subdivided into four major sections; absolute value circuit (active rectifier), square/divider, filter circuit and buffer amplifier. The input volt- age VIN which can be ac or dc is converted to a unipolar current I1 by the active rectifier A1, A2. I1 drives one input of the squarer divider which has the transfer function I4 = I1 2 I3 The output current of the squarer/divider, I4 drives A4 which forms a low-pass filter with the external averaging capacitor. If the RC time constant of the filter is much greater than the long- est period of the input signal than A4s output will be propor- tional to the average of I4. The output of this filter amplifier is used by A3 to provide the denominator current I3 which equals Avg. I4 and is returned to the squarer/divider to complete the implicit rms computation. I4 = Avg I1 2 I4 Ø º Œ Œ ø ß œ œ = I1 rms and VOUT = VIN rms If the averaging capacitor is omitted, the AD637 will compute the absolute value of the input signal. A nominal 5 pF capacitor should be used to insure stability. The circuit operates identically to that of the rms configuration except that I3 is now equal to I4 giving I4 = I1 2 I4 I4 = I1 The denominator current can also be supplied externally by pro- viding a reference voltage, VREF, to Pin 6. The circuit operates identically to the rms case except that I3 is now proportional to VREF. Thus: I4 = Avg I1 2 I3 and VO = V IN 2 VDEN This is the mean square of the input signal. STANDARD CONNECTION The AD637 is simple to connect for a majority of rms measure- ments. In the standard rms connection shown in Figure 2, only a single external capacitor is required to set the averaging time constant. In this configuration, the AD637 will compute the true rms of any input signal. An averaging error, the magnitude of which will be dependent on the value of the averaging capaci- tor, will be present at low frequencies. For example, if the filter capacitor CAV, is 4 m F this error will be 0.1% at 10 Hz and in- creases to 1% at 3 Hz. If it is desired to measure only ac signals, REV. E –5– AD637 OPTIONAL TRIMS FOR HIGH ACCURACY The AD637 includes provisions to allow the user to trim out both output offset and scale factor errors. These trims will result in significant reduction in the maximum total error as shown in Figure 4. This remaining error is due to a nontrimmable input offset in the absolute value circuit and the irreducible non- linearity of the device. The trimming procedure on the AD637 is as follows: l. Ground the input signal, VIN and adjust R1 to give 0 V out- put from Pin 9. Alternatively R1 can be adjusted to give the correct output with the lowest expected value of VIN. 2. Connect the desired full scale input to VIN, using either a dc or a calibrated ac signal, trim R3 to give the correct output at Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a 2 V peak-to-peak sine wave should give 0.707 V dc output. Remaining errors are due to the nonlinearity. INPUT LEVEL – Volts 5.0 2.5 5.0 0 2.00.5 ER R O R – m V 1.0 0 2.5 1.5 AD637K MAX INTERNAL TRIM AD637K EXTERNAL TRIM AD637K: 0.5mV 60.2% 0.25mV 60.05% EXTERNAL Figure 4. Max Total Error vs. Input Level AD637K Internal and External Trims BUFFER AD637 SQUARER/DIVIDER BIAS SECTION FILTER 25kV 25kV 1 2 3 4 5 6 7 14 13 12 11 10 9 8 CAV –VS +VS V rms OUT R4 147V + R3 1kV SCALE FACTOR ADJUST, 62% R2 1MV R1 50kV –VS +VS VIN OUTPUT OFFSET ADJUST ABSOLUTE VALUE Figure 5. Optional External Gain and Offset Trims CHOOSING THE AVERAGING TIME CONSTANT The AD637 will compute the true rms value of both dc and ac input signals. At dc the output will track the absolute value of the input exactly; with ac signals the AD637’s output will ap- proach the true rms value of the input. The deviation from the ideal rms value is due to an averaging error. The averaging error is comprised of an ac and dc component. Both components are functions of input signal frequency f, and the averaging time constant t ( t : 25 ms/ m F of averaging capacitance). As shown in Figure 6, the averaging error is defined as the peak value of the ac component, ripple, plus the value of the dc error. The peak value of the ac ripple component of the averaging er- ror is defined approximately by the relationship: 50 6.3 t f in % of reading where (t > 1/f) DC ERROR = AVERAGE OF OUTPUT–IDEAL DOUBLE-FREQUENCY RIPPLE EO TIME AVERAGE ERROR IDEAL EO Figure 6. Typical Output Waveform for a Sinusoidal Input This ripple can add a significant amount of uncertainty to the accuracy of the measurement being made. The uncertainty can be significantly reduced through the use of a post filtering net- work or by increasing the value of the averaging capacitor. The dc error appears as a frequency dependent offset at the output of the AD637 and follows the equation: 1 0.16 + 6.4 t 2 f 2 in % of reading Since the averaging time constant, set by CAV, directly sets the time that the rms converter “holds” the input signal during computation, the magnitude of the dc error is determined only by CAV and will not be affected by post filtering. SINEWAVE INPUT FREQUENCY – Hz 100 0.1 1.0 10 10k D C ER RO R O R RI PP LE % O F RE AD IN G 1k100 10 DC ERROR PEAK RIPPLE Figure 7. Comparison of Percent DC Error to the Percent Peak Ripple over Frequency Using the AD637 in the Stan- dard RMS Connection with a 1 · m F CAV The ac ripple component of averaging error can be greatly reduced by increasing the value of the averaging capacitor. There are two major disadvantages to this: first, the value of the averaging capacitor will become extremely large and second, the settling time of the AD637 increases in direct proportion to the value of the averaging capacitor (Ts = 115 ms/m F of averaging capacitance). A preferable method of reducing the ripple is through the use of the post filter network, shown in Figure 8. This network can be used in either a one or two pole configura- tion. For most applications the single pole filter will give the best overall compromise between ripple and settling time. AD637 REV. E–6– BUFFER AD637 SQUARER/DIVIDER BIAS SECTION FILTER 25kV 25kV 1 2 3 4 5 6 7 14 13 12 11 10 9 8 CAV –VS