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首页 fully differential OTA design

fully differential OTA design.pdf

fully differential OTA design

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2013-07-13 0人阅读 举报 0 0 暂无简介

简介:本文档为《fully differential OTA designpdf》,可适用于高等教育领域

AFullyDifferentialTransconductanceAmplifierEEfinalproject,SpringShiyingXiong(xiongsyeecsberkeleyedu)MinShe(mshetfteecsberkeleyedu)DepartmentofElectricalEngineeringandComputerScienceUniversityofCaliforniaatBerkeley,CAAbstractInthisproject,wedesignafullydifferentialoperationaltransconductanceamplifiertobeusedinthefirststageofahighresolutionpipelinedADconverterThecircuitisrealizedwithatwostageamplifierdesignThefirststageisatelescopiccascodestage,followedbyacommonsourcesecondstageIt’sdemonstratedthatthiscircuitmeetsallthedesignspecificationwhileachievinglowpowerconsumption,whichislessthanmWThisOTAachievealargeDCgainandhighswingoutputofaboveVThecircuitperformanceissummarizedbelow:DevicemodelslownominalfastOutputswingVo,max±V±V±VTotalnoiseVo,noise(uV)Dynamicrange(dB)OpenlooppeakgainKKKSettlingtimensnsnsOTApowerdissipationmWmWmWCMFBpowermWmWmWBiascircuitpowermWmWmWPhasemarginUnitgainbandwidthMHzMHzMHzTablecircuitperformancesummaryIntroductionThedesignspecificationoftheOTAwithVpowersupplyis:·Dynamicrangeatoutput,DR³dB·SettlingAccuracy£·Settingtime£nsThedesignshouldalsominimizethepowerconsumptionwhilemeetingalltherequirementsWhenselectinganoptimalcircuitarchitecture,anumberoffundamentalissueandtradeoffshouldbeconsideredbasedonthedesignrequirementFirst,ThereischoicebetweensinglestagecircuitandmultistagecircuitInthisamplifier,thefeedbackfactorisverysmall(lessthan)duetotheverysmallfeedbackcapacitorTomeetthesettlingaccuracy,westillneedhighDCgainwhichshouldbeatleast,AsinglestagetopologyofeithersimplefoldedcascodeortelescopiccascodecircuitmightnotachievethedesiredDCgainAlthoughtelescopictriplecascodecircuitcanmeettheDCgain,VpowersupplymaylimittheoutputswingandthenthedynamicrangeSecond,wecompletelyeliminatethepossibilityofusingthreeormorethanthreestageamplifierssincethecircuitwillbebothslowandpowerconsumingAlthoughDCgainrequirementseemstorequireatwostagedesign,weshouldnoteliminatethepossibilityofrealizingthecircuitwithonestageSomeanalysisisdoneheretofinalizethechoiceInfact,wehaveseveralchoiceshere:foldedcascodeortelescopictopology,gainboostedonestageortwostagecircuitsIfweuseatwostagedesign,thefirststagecanberealizedusingeitheratelescopicorfoldedcascodetopologyThetopologywithlowerpowerconsumptionandlownoiseshouldbechosenThefoldedcascodestagehasextralegs,whichdissipatemorestaticpowerthanthetelescopiccounterpartAlsothefoldedcascodestagehasextracurrentsourcetransistors,theydirectlyaddtothenoisefactoroftheinputstageThemainadvantageoffoldedcascodeisthattheoutputswingwillbehigherthanthatoftelescopictopologysincethereareonlyfourdevicesinsteadoffivethereButinthetwostagedesign,theoutputswingisdeterminedmainlybythesecondstageSinceacommonmodefeedbackisinvolved,commonmodeinputrangeisoflessconcernTherefore,atelescopicfirststagetopologyistherightchoiceforlowpower,lownoisetwostageOTAOntheotherhand,ifwechoosesinglestagedesignThefoldedcascodeismorefavorablebecausethereareonlyfourdevices,whichleadstohighoutputvoltagerangeSavingavoltagedropofonedeviceisveryimportantinourdesignTheoutputresistanceoftheMOSFETisastrongfunctionofVdsToachievethehighgain,VdsofeachdeviceshouldbemuchlargerthanVdsatThereforesomevoltagemarginsneedtobeleftacrossthesourceanddraintogetareasonableoutputresistanceInthispointofviewfoldedcascodeisbetterinsinglestageOTASonowwehavechoicebetween:RegulatedfoldedcascodesinglestageOTAandTwostageOTAwithtelescopicfirststageSinglestagecircuitisinherentlyfasterthantwostagedesignAndtheoreticallyspeaking,singlestagewillconsumelesspowerbecauseoffewercurrentlegsOntheotherhand,twostagedesignallowhighoutputswing,morenoisecanbeallowedforthespecifieddynamicrangeThereforesmallercapacitorscanbeusedintwostagedesignThenforafixedsettlingtime,smallercurrentcanbeusedduetosmallercapacitorThatisalsotosay,forfixedcurrent,twostagecanbeevenfasterthanonestagedesignTofinalizethechoice,wetriedbothsinglestagedesignandtwostagedesigntoestimatethecurrentandpowerconsumptionwhilemeetingthespecifieddesignrequirementAftersomesimplecalculation,wefindregulatedsinglestagedesignneedlargercapacitorsandthereforelargercurrenttoachievethespecifiedsettlingspeedTherefore,weconcludethattwostageOTAwithtelescopicfirststageistherightchoiceforthisprojectInthefollowingsection,schematiclayoutofthecircuitwillbeshownfirstDevicessizeandbiaspointforeachtransistoraresummarizedintableAmplifierdesignandanalysisThetwostageOTAisshowninFigure(nextpage)ThesecondstageismadeofaNMOScommonsourceamplifierThecompensationtechniqueisnecessaryintwostageamplifiertomaintainstabilityStandardmillercompensationusepolesplittingtomovethedominantpoletolowerfrequencyandthenondominantpoletohighfrequencyInstead,cascodecompensationisutilizedherebecausehigherbandwidthcanbeachievedwiththistechniqueInthesignalpath,weuseNMOStransistorbecausetheyareaboutthreetimesfasterthanPMOSdevicesincethemobilityofelectronsismuchlargerthanthatofholes,althoughPMOSdevicemaygivelessflickernoiseThetransistorssizeandbiaspointisshownintableIntheappendix,handcalculationisconductedfirsttoestimatethecapacitorsize,biascurrent,transistorsizeandsoon,thenspicesimulationisusedtotunethoseparametersalittleandthedesignismodifiedbybetterestimationInthissection,wepresenttheresultsfromtheanalysisandthetradeoffondevicesize,capacitorsizeandbiascurrentarealsoshownhereDynamicRangeFiguretwostagefullydifferentialOTAtransistorsWL(umum)I(mA)Gm(mS)Vdsat(mV)M,MM,MM,MM,MM,MM,MMCcpFCspFTabledevicesizeandbiaspointinOTAcircuitThedynamicrangeattheoutputoftheamplifierisgivenbythefollowingequation:noisesignalPPDRlog=()ThemaximumoutputswingisdeterminedbythesaturationvoltageandthenecessarydrainvoltagemarginofthetransistorsinthesecondstageThetotalnoiseattheoutputshouldbelessthanuVrmsassuming±VoutputswingThetotaloutputnoiseisgivenbyò¥»)(*******dfsHfLWCknnFCckTPoxnffnoise()HerethefirsttermisthermalnoisecontributionandthesecondtermistheflickernoisefromtheinputdeviceFandfnarefeedbackfactorandnoisefactorinthermalnoisecalculation,respectively,theyaregivenas:VoMVoVdd=VVss=VinVinMMMMMMMMMMMCcCcbiasbiasbiasbiasbiasIIIIbiasMsgsssCCCCF=dsatdsatmmfVVggn==())(LLkknnnppfmm=istheflickernoisefactorH(s)isatransferfunctionwhichcanbefoundintheappendixWhenusingequation(),wealreadymadesomeassumptions:first,weassumethenoisefromsecondstageisnegligible,becauseit’sattenuatedbythesquareofthefirststagegainwhenreferringtotheinputSecond,it’sassumedthatthenoisefromthecascodedevicecanbenegligibleIt’snecessarytominimizetheratiommggtoreducethenoiseThereforewehadtoreducenoisebyincreasingdsatdsatVVRegardingflickernoisecontribution,it’softensmallsincethisdesignusesbigdeviceAlsoincreasingthelengthofMreducestheflickernoisefactor,whichalsohelpsOntheotherhand,thefeedbackfactorFneedstobemaximizedThengsCneedtobeminimizedandhencetheinputdeviceshouldhaveminimumgatelengthAtthebeginning,weneglecttheflickernoiseandcalculatethecapacitorparameterThecompensationcapacitorrequiredtoachievedBdynamicrangeispFToleavesufficientheadroomfortheflickernoiseandalsonoisefromthesecondstageathighfrequency,wechoosepFfortheCcSettlingtimeThesettlingtimeconsistsoftwoparts:slewratelimitedsettlingandlinearsettlingDuringslewregion,thecapacitorsatbothfirststageandsecondstageneedtobechargedTheslewratelimitcanbereachedineitherstageandit’sexpressedas:÷÷øöççèæ=LeffccCCICISR,min()HereIandIarethecurrentthroughfirststageandsecondstage,respectivelyLeffCistheeffectiveloadingcapacitorattheoutputGenerallyspeaking,tominimizepowerconsumption,thesetwotermsneedtobeequal:LeffccCCICI=ThetotalsettlingtimeislinSRSttt=,wehaveCdsatostepSRCIFVVt×=()HereVVostep=,Let’stakemVVdsat=,then»SRtsincethefeedbackfactorissosmallHenceinthesettlingtimecalculation,wedon’tconsidertheslewsettlingtimeThelinearsettlingtimecanbeexpressedas:lndsatostepulinVVFFt××=ew()withCmuCg=wIntheaboveanalysis,weassumethesystemisstable,thatistosay,thephasemarginisguaranteedInourmillercascodecompensationscheme,therearetwocomplexconjugatepolesandonezeroattherightplaneandanotherzeroontheleftplaneTheconjugatecomplexpolescanbeexpressedas:()DPn±=,w,÷÷÷÷÷øöçççççèæ××=CLeffLeffCCmmCCCCCCggD,÷÷øöççèæ=LeffCCmnCCCgwTheeffectfromMandMcanbedecoupledsosimplifiedexpressioncanbeobtained:FCgPCm»,LeffmCgp=,gdgsCmCCCgP=Tomaintainlargephasemarginwemusthave:Fggmm>>,CcCFggLeffmm>>,whichiseasytometandhencenotaprobleminourcasesincewehavesmallFOpenloopVoltagegainAlthoughthereisnoexplicitrequirementfortheopenloopgain,westillneedalargelowfrequencyDCgainifwewanttomeetthesettlingaccuracysincethefeedbackfactorissosmallTheDCgainistheproductofthefirststagegainandsecondstagegain:)}||()}{||({rrgrrgrrggAmmmmdc=TomaximizetheoutputresistanceandhencetheDCgain,wecanuselongchanneltransistorforthedevicewhichisnotinthesignalpathsuchasM,M,MandM,sincetheydonotcapacitivelyloadthesignalpathBiasCircuitInthisproject,cascodehighswingbiascircuitisusedtobiasthetwostageOTAThecircuitisshowninFigureThecascodetopologyisusedtoincreasethematchingofcurrentsindifferentlegandthebiasnetworkwillbelesssensitivetoprocessvariationandpowersupplyTheVdsatofthebiasingdevicesarechosentobesameasthoseintheOTAtoguaranteegoodmatchingGenerallyspeaking,thedeviceinbiascircuitcanbescaledsolesscurrentandhencelesspowercanbeconsumedbythebiascircuitTheoutputofthefirststageisbiasedatmVDuringthedesignofthesecondstagetheVdsatforMandMwereadjustedtoapropervaluesoalevelshifterbetweenthetwostagesisunnecessaryFigure:BiascircuitdeviceWidth(um)Length(um)Ibias(mA)Mb,Mb,MbMb,Mb,MbMbMbMbMb,MbMbMcmMcm,McmMcm,McmCm,pFVrefVTabledevicesizeinbiascircuitandCMFBcircuitCommonModefeedbackMbMbMbMbMbMbMbMbMbMbMbMbbiasbiasbiasIssVddVssbiasCommonmodefeedbackisnecessaryinafullydifferentialamplifier,otherwisethebiasvoltageattheoutputnodewillnotbewelldefinedWithCMFBtheprocessofoptimizationwillbelessdifficultThecircuitisshowninFigureIt’sadifferentialpairwithdiodeconnectedloadsThedevicesizeshouldbechoseninthewaythatthegainofCMFBcircuitwillnotbelargetomakethephasemarginworse,otherwiseitwillcauseoscillationintheoutputwaveFigureCommonmodefeedbackcircuitCircuitPerformanceHspicesimulationresultsanddeckareattachedattheendOutputswing,totalnoise,stepresponseandactransferfunctionareshownthereIt’sverifiedthatthetwostageOTAmeetallthedesignrequirementTheresultsaresummarizedintableOutputswinganddynamicrangeTheDCsweepsoftheinputsignalwiththecorrespondingoutputvoltagefortheslow,nominalandfastmodelsareshowninFigureAIt’sevidentthattheDCgainarehigherthan,fortheoutputswingbetween–VandVintheslowmodelInthenominalandfastmodel,theoutputswingisevenalittlelargerThedynamicrangeforallthreemodelsisabovedBNoiseTheoutputnoisedensityissimulatedbyspiceThetotaloutputnoisewascalculatedbyintegratingthenoisedensityfromHztoGHzThetotalnoiseinthecircuitisuVforthefastmodel,whichistheworstcasePleaserefertoFigureBFrequencyresponseThefrequencyresponseisshowninFigureCIt’sshownthatphasemarginisbetterthaninallthreemodelsSettlingThestepresponseoftheamplifierisshowninFigureDtoFigureDThereisverysmallsettlingtimedifferenceintherisingstepandfallingstepThesettlingtimearens,ns,nsforslow,nominalandfastmodelintherisingstep,respectively,whiletheyarens,ns,nsinthefallingstep,respectivelyThesettlingtimeisfastestintheslowmodelInfact,becausetheoscillationinslowmodelislargest,whichhelpsthesettlingPowerconsumption:It’ssummarizedintableThetwostageOTAconsumesonlymWpowerwhilecommonmodefeedbackcircuitconsumelessthanmWConclusionInthisproject,afullydifferentialOTAwithEEumtechnologyisdesignedandoptimizedThesimulationresultsshowallofthedesignrequirementaremetTheamplifieritselfdissipateonlymWofpowerWithVsupply,theDCpeakloopgaincanbeashighasVrefMcmMcmMcmbiasMcmMcmVssVdddCmCmVoutVoutbiasKThedynamicrangeisabovedBThesettlingtimeisnsintheworstcaseCommentsTheCMRRandPSRRinthiscircuitshouldbereasonableFiniteCMRRisduetothefiniteresistanceofthetailcurrentsourceBothofthemcanbeimprovedbycascadingthetailcurrentsourceDuetotimelimit,wedidn’tdothatReferenceFeldman,Arnold,“Highspeed,lowpowerSigmaldeltamodulatorsforRFbasebandchannelapplications”,PhDthesis,UCB,Nakamura,Katsufumi,“AnmW,b,MsamplessCMOSParallelPipelinesADC”,IEEEJournalofSolidStateCircuits,Vol,No,Appendix:parametercalculation(handanalysis)EstimateCcfromDRrequirement:Atfirst,wedon’ttakeintoaccountoftheflickernoise,sothenoiseexpressionisFnCckTPfnoise***»()Hereweassume»=CsCCCsFgssand=fn,voltageswingis±VFromDR>dBrequirement:VPPsn´=´<ÞuVVn<Thenfromequation(),wegetCc=pFTomakesurethereisenoughdesignmarginforflickernoiseandnoisefromsecondstageandsoon,wechooseCc=pFButCccan’tbetoolarge,otherwiseweneedlargecurrenttomeetthesettlingtimeBiascurrentandinputdevicesize:Aswesaidbefore,theslewratelimitedsettlingtimeisnegligibleHereweonlyconsiderthelinearsettlingtime:lndsatostepulinVVFFt××=ew,withCmuCg=w()lnln=´´=××dsatostepVVFe()secntlin<Þsradu´>wÞmSgm>ActuallywechoosemSgm=togiveenoughheadroomforthesettlingtimemAVgIdsatm*==(HerewetakemVVdsat=)Then***'==×=÷øöçèædsatnmVkgLW,umL=ÞumW=pFfFfFCgs****==AsmentionedintheEEclass,thefeedbackcapacitorshouldnotbelessthangsC,sowetakepFCf=,thenpFCCfs*==ThetotalcapacitanceseenattheoutputisLeffCCCC=,pFCFCCCdtotFLLeff)(==whenassumingdtotCattheoutputisaboutpFPhasemarginconsiderationandsecondstagecurrent:Thephasemarginisexpressedas:÷÷÷÷øöççççèæ´=÷÷øöççèæ=FuLLCLmumCCCCgPwwarctanarctanwechooseOm=F,somSgm=,FromswingconsiderationletmVVdsat=,thenmAVgIdsatm*==Estimateothertransistorsize:ThebiascurrentineachstageiswelldefinednowAfterchoosingtheappropriateVdsatforeachdevice(subjecttoopenloopgainrequirementandoutputswingrequirement),wecandetermineeachtransistorsizeWechoosemVVdsat,=andweget*)(,,==dsatoxnVCILWmVnVVfdsatdsat,,==,and

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