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74hc139双二四译码器  Semiconductor Components Industries, LLC, 1999 March, 2000 – Rev. 7 1 Publication Order Number: MC74HC139A/D ��� ��� ���� ������ �������� ������������� High–Performance Silicon–Gate CMOS The MC74HC139A is identical in pinout to the LS139. The devic...

74hc139双二四译码器
 Semiconductor Components Industries, LLC, 1999 March, 2000 – Rev. 7 1 Publication Order Number: MC74HC139A/D ��� ��� ���� ������ �������� ������������� High–Performance Silicon–Gate CMOS The MC74HC139A is identical in pinout to the LS139. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two independent 1–of–4 decoders, each of which decodes a two–bit Address to one–of–four active–low outputs. Active–low Selects are provided to facilitate the demultiplexing and cascading functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output, and utilizing the Select as a data input. • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 100 FETs or 25 Equivalent Gates LOGIC DIAGRAM A0a A1a SELECTa A0b A1b 1 SELECTb Y0a Y1a Y2a Y3a Y0b Y1b Y2b Y3b ACTIVE–LOW OUTPUTS ADDRESS INPUTS PIN 16 = VCC PIN 8 = GND ACTIVE–LOW OUTPUTS 3 2 ADDRESS INPUTS 13 14 15 4 5 6 7 12 11 10 9 FUNCTION TABLE Inputs Outputs Select A1 A0 Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H L H H H H H L X = don’t care SO–16 D SUFFIX CASE 751B http://onsemi.com 1 16 PDIP–16 N SUFFIX CASE 648 1 16 MARKING DIAGRAMS 1 16 MC74HC139AN AWLYYWW 1 16 HC139A AWLYWW A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week Device Package Shipping ORDERING INFORMATION MC74HC139AN PDIP–16 2000 / Box MC74HC139AD SOIC–16 48 / Rail MC74HC139ADR2 SOIC–16 2500 / Reel PIN ASSIGNMENT 13 14 15 16 9 10 11 125 4 3 2 1 8 7 6 SELECTa A1a A0a GND A1b A0b SELECTb VCC Y0a Y1a Y2a Y3a Y0b Y1b Y2b Y3b MC74HC139A http://onsemi.com 2 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* ÎÎÎÎ ÎÎÎÎ Symbol ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎÎÎ ÎÎÎÎÎ Value ÎÎÎ ÎÎÎ Unit ÎÎÎÎ ÎÎÎÎ VCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Voltage (Referenced to GND) ÎÎÎÎÎ ÎÎÎÎÎ – 0.5 to + 7.0 ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ Vin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Voltage (Referenced to GND) ÎÎÎÎÎ ÎÎÎÎÎ – 1.5 to VCC + 1.5 ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ Vout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Output Voltage (Referenced to GND) ÎÎÎÎÎ ÎÎÎÎÎ – 0.5 to VCC + 0.5 ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ Iin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Current, per Pin ÎÎÎÎÎ ÎÎÎÎÎ ± 20 ÎÎÎ ÎÎÎ mA ÎÎÎÎ ÎÎÎÎ Iout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Output Current, per Pin ÎÎÎÎÎ ÎÎÎÎÎ ± 25 ÎÎÎ ÎÎÎ mA ÎÎÎÎ ÎÎÎÎ ICC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Current, VCC and GND Pins ÎÎÎÎÎ ÎÎÎÎÎ ± 50 ÎÎÎ ÎÎÎ mA ÎÎÎÎ ÎÎÎÎ PD ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Power Dissipation in Still Air, Plastic DIP† SOIC Package† ÎÎÎÎÎ ÎÎÎÎÎ 750 500 ÎÎÎ ÎÎÎ mW ÎÎÎÎ ÎÎÎÎ Tstg ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Storage Temperature ÎÎÎÎÎ ÎÎÎÎÎ – 65 to + 150 ÎÎÎ ÎÎÎ �C ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ TL ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ 260 ÎÎÎ ÎÎÎ ÎÎÎ �C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — Plastic DIP: – 10 mW/�C from 65� to 125�C SOIC Package: – 7 mW/�C from 65� to 125�C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS ÎÎÎÎ ÎÎÎÎ SymbolÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎ ÎÎÎ Min ÎÎ ÎÎ MaxÎÎÎ ÎÎÎ Unit ÎÎÎÎ ÎÎÎÎ VCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Supply Voltage (Referenced to GND) ÎÎÎ ÎÎÎ 2.0 ÎÎ ÎÎ 6.0 ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ Vin, Vout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC Input Voltage, Output Voltage (Referenced to GND) ÎÎÎ ÎÎÎ 0 ÎÎ ÎÎ VCC ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ TA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Operating Temperature, All Package Types ÎÎÎ ÎÎÎ – 55 ÎÎ ÎÎ + 125 ÎÎÎ ÎÎÎ �C ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ tr, tf ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Input Rise and Fall Time VCC = 2.0 V (Figure 1) VCC = 4.5 V VCC = 6.0 V ÎÎÎ ÎÎÎ ÎÎÎ 0 0 0 ÎÎ ÎÎ ÎÎ 1000 500 400 ÎÎÎ ÎÎÎ ÎÎÎ ns DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Guaranteed Limit ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Symbol ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Test Conditions ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VCC V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ – 55 to 25�C ÎÎÎ ÎÎÎ ÎÎÎ � 85�C ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ � 125�C ÎÎÎ ÎÎÎ ÎÎÎ Unit ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VIH ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Minimum High–Level Input Voltage ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vout = 0.1 V or VCC – 0.1 V|Iout| � 20 µA ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 1.5 3.15 4.2 ÎÎÎ ÎÎÎ ÎÎÎ 1.5 3.15 4.2 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 1.5 3.15 4.2 ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VIL ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Maximum Low–Level Input Voltage ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vout = 0.1 V or VCC – 0.1 V|Iout| � 20 µA ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.5 1.35 1.8 ÎÎÎ ÎÎÎ ÎÎÎ 0.5 1.35 1.8 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.5 1.35 1.8 ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VOH ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Minimum High–Level Output Voltage ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL|Iout| � 20 µA ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 1.9 4.4 5.9 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ 1.9 4.4 5.9 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 1.9 4.4 5.9 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL |Iout| � 4.0 mA|Iout| � 5.2 mAÎÎÎÎ ÎÎÎÎ 4.5 6.0 ÎÎÎÎ ÎÎÎÎ 3.98 5.48 ÎÎÎ ÎÎÎ 3.84 5.34 ÎÎÎÎ ÎÎÎÎ 3.70 5.20 ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VOL ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Maximum Low–Level Output Voltage ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL|Iout| � 20 µA ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.1 0.1 0.1 ÎÎÎ ÎÎÎ ÎÎÎ 0.1 0.1 0.1 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.1 0.1 0.1 ÎÎÎ ÎÎÎ ÎÎÎ V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VIH or VIL |Iout| � 4.0 mA|Iout| � 5.2 mA ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.26 0.26 ÎÎÎ ÎÎÎ ÎÎÎ 0.33 0.33 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 0.40 0.40 ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ Iin ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Maximum Input Leakage Current ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VCC or GND ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ± 0.1 ÎÎÎ ÎÎÎ ÎÎÎ ± 1.0ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ± 1.0 ÎÎÎ ÎÎÎ ÎÎÎ µA ÎÎÎÎ ÎÎÎÎ ICC ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Maximum Quiescent Supply Current (per Package) ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Vin = VCC or GND Iout = 0 µA ÎÎÎÎ ÎÎÎÎ 6.0 ÎÎÎÎ ÎÎÎÎ 4 ÎÎÎ ÎÎÎ 40 ÎÎÎÎ ÎÎÎÎ 160 ÎÎÎ ÎÎÎ µA NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND � (Vin or Vout) � VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. MC74HC139A http://onsemi.com 3 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Guaranteed Limit ÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ Symbol ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Parameter ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VCC V ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ – 55 to 25�C ÎÎÎ ÎÎÎ ÎÎÎ � 85�C ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ � 125�C ÎÎÎ ÎÎÎ ÎÎÎ Unit ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ tPLH, tPHL ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Maximum Propagation Delay, Select to Output Y (Figures 1 and 3) ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 115 23 20 ÎÎÎ ÎÎÎ ÎÎÎ 145 29 25 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 175 35 30 ÎÎÎ ÎÎÎ ÎÎÎ ns ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ tPLH, tPHL ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Maximum Propagation Delay, Input A to Output Y (Figures 2 and 3) ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 115 23 20 ÎÎÎ ÎÎÎ ÎÎÎ 145 29 25 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 175 35 30 ÎÎÎ ÎÎÎ ÎÎÎ ns ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ tTLH, tTHL ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Maximum Output Transition Time, Any Output (Figures 1 and 3) ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2.0 4.5 6.0 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 75 15 13 ÎÎÎ ÎÎÎ ÎÎÎ 95 19 16 ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 110 22 19 ÎÎÎ ÎÎÎ ÎÎÎ ns ÎÎÎÎÎ ÎÎÎÎÎ Cin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Maximum Input Capacitance ÎÎÎÎ ÎÎÎÎ — ÎÎÎÎ ÎÎÎÎ 10 ÎÎÎ ÎÎÎ 10 ÎÎÎÎ ÎÎÎÎ 10 ÎÎÎ ÎÎÎ pF NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Decoder)* 55 pF * Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). SWITCHING WAVEFORMS tTHL tTLH Figure 1. VCC GND tr tPHL tPLH OUTPUT Y SELECT 90% 50% 10% 90% 50% 10% Figure 2. 50% tPHLtPLH VCC GND OUTPUT Y 50% INPUT A *Includes all probe and jig capacitance Figure 3. Test Circuit CL* TEST POINT DEVICE UNDER TEST OUTPUT tf VALID VALID MC74HC139A http://onsemi.com 4 PIN DESCRIPTIONS ADDRESS INPUTS A0a, A1a, A0b, A1b (Pins 2, 3, 14, 13) Address inputs. These inputs, when the respective 1–of–4 decoder is enabled, determine which of its four active–low outputs is selected. CONTROL INPUTS Selecta, Selectb (Pins 1, 15) Active–low select inputs. For a low level on this input, the outputs for that particular decoder follow the Address inputs. A high level on this input forces all outputs to a high level. OUTPUTS Y0a – Y3a, Y0b – Y3b (Pins 4 – 7, 12, 11, 10, 9) Active–low outputs. These outputs assume a low level when addressed and the appropriate Select input is active. These outputs remain high when not addressed or the appropriate Select input is inactive. SELECT A0 A1 Y0 Y1 Y2 Y3 EXPANDED LOGIC DIAGRAM (1/2 OF DEVICE) MC74HC139A http://onsemi.com 5 PACKAGE DIMENSIONS PDIP–16 N SUFFIX CASE 648–08 ISSUE R MIN MINMAX MAX INCHES MILLIMETERS DIM A B C D F G H J K L M S 18.80 6.35 3.69 0.39 1.02 0.21 2.80 7.50 0° 0.51 19.55 6.85 4.44 0.53 1.77 0.38 3.30 7.74 10° 1.01 0.740 0.250 0.145 0.015 0.040 0.008 0.110 0.295 0° 0.020 0.770 0.270 0.175 0.021 0.070 0.015 0.130 0.305 10° 0.040 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. 2.54 BSC 1.27 BSC 0.100 BSC 0.050 BSC –A – B 1 8 916 F H G D 16 PL S C –T – SEATING PLANE K J M L T A0.25 (0.010) M M 0.25 (0.010) T B AM S S MIN MINMAX MAX MILLIMETERS INCHES DIM A B C D F G J K M P R 9.80 3.80 1.35 0.35 0.40 0.19 0.10 0° 5.80 0.25 10.00 4.00 1.75 0.49 1.25 0.25 0.25 7° 6.20 0.50 0.386 0.150 0.054 0.014 0.016 0.008 0.004 0° 0.229 0.010 0.393 0.157 0.068 0.019 0.049 0.009 0.009 7° 0.244 0.019 1.27 BSC 0.050 BSC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 1 8 916 –A – –B – D 16 PL K C G –T –SEATING PLANE R X 45° M J F P 8 PL 0.25 (0.010) BM M SOIC–16 D SUFFIX CASE 751B–05 ISSUE J MC74HC139A http://onsemi.com 6 Notes MC74HC139A http://onsemi.com 7 Notes MC74HC139A http://onsemi.com 8 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. MC74HC139A/D NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time) Email: ONlit–german@hibbertco.com French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse Time) Email: ONlit–french@hibbertco.com English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 *Available from Germany, France, Italy, England, Ireland
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