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JESD8-5A-01 ADDENDUM No. 5 JEDEC STANDARD 2.5 V ± 0.2 V (Normal Range) and 1.8 V – 2.7 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits JESD8-5A.01 (Minor Revision of JESD8-5A, June 2006) SEPTEMBER 200...

JESD8-5A-01 ADDENDUM No. 5
JEDEC STANDARD 2.5 V ± 0.2 V (Normal Range) and 1.8 V – 2.7 V (Wide Range) Power Supply Voltage and Interface Standard for Nonterminated Digital Integrated Circuits JESD8-5A.01 (Minor Revision of JESD8-5A, June 2006) SEPTEMBER 2007 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by ©JEDEC Solid State Technology Association 2007 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications online at http://www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DON’T VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, Virginia 22201-3834 or call (703) 907-7559 JEDEC Standard No. 8-5A.01 -i- 2.5 V + 0.2 V (NORMAL RANGE), AND 1.8 V TO 2.7 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUIT Contents Page 1 Scope 1 2 Standard specifications 1 2.1 Absolute maximum continuous ratings (Note 1) 1 2.2 Recommended operating conditions 2 2.2.1 Normal range 2 2.2.2 Wide range 2 2.3 DC specifications 2 2.3.1 Normal range 2 2.3.2 Wide range 3 2.4 Optional DC electrical characteristics for Schmitt trigger operation 3 2.4.1 Optional Schmitt trigger operation - Normal range 3 2.4.2 Optional Schmitt trigger operation - Wide range 3 3 Test conditions for optional Schmitt trigger operation 4 3.1 Positive Going Threshold Voltage: Vt+ (Vp) 4 3.2 Negative Going Threshold Voltage: Vt- (Vn) 4 Annex A Differences between JESD8-5A.01 and JESD8-5A 5 Annex A.1 Differences between JESD8-5A and JESD8-5 5 Figures 1 DC characteristic measurement circuit of Schmitt trigger input 4 JEDEC Standard No. 8-5A.01 -ii- JEDEC Standard No. 8-5A.01 Page 1 2.5 V ± 0.2 V (NORMAL RANGE) AND 1.8 V – 2.7 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS (From JEDEC Board Ballots JCB-94-59 and JCB-05-77, formulated under the cognizance of the JC-16 Committee on Interface Technology.) 1 Scope This standard defines power supply voltages, dc interface parameters for a high speed, low voltage family of non-terminated digital circuits driving/driven by parts of the same family. The specifications in this standard represent a minimum set or “base line” set of interface specifications for CMOS compatible circuits. The purpose is to provide a standard of specification for uniformity, multiplicity of sources, elimination of confusion, and ease of device specification and design by users. Paragraph 2.3 describes normal DC electrical characteristics and paragraph 2.4 (added into revision A) describes the optional characteristics for Schmitt trigger operation. 2 Standard specifications 2.1 Absolute maximum continuous ratings (Note 1) Supply Voltage, VDD -0.5 V to 3.6 V dc Input Voltage, VIN (except I/O pins) -0.5 V to 3.6 V dc Output Voltage, VOUT (including I/O pins)(note 2) -0.5 V to VDD+0.5 V dc Input Diode Current, IIK (VI< 0 or VI>VDD) +/- 20 mA dc Output Diode Current, IOK (VO< 0 or VO>VDD) +/- 20 mA Storage Temperature Range -65 ºC to 150 ºC NOTE 1 Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum conditions is not implied. NOTE 2 Not to exceed 3.6 V. JEDEC Standard No. 8-5A.01 Page 2 2.2 Recommended operating conditions 2.2.1 Normal range Symbol Parameter Operating Range VDD Power Supply Voltage 2.3 V to 2.7 V TA Operating Temperature Note 1 NOTE 1 Specified by manufacture to be commercial, industrial, and/or military grade 2.2.2 Wide range Symbol Parameter Operating Range VDD Power Supply Voltage 1.8 V to 2.7 V TA Operating Temperature Note 1 NOTE 1 Specified by manufacture to be commercial, industrial, and/or military grade 2.3 DC specifications 2.3.1 Normal range Symbol Parameter Test Condition MIN MAX Unit VDD Supply Voltage 2.3 2.7 V VIH Input High Voltage VOUT ≥ VOH (min) 1.7 VDD+0.3 V VIL Input Low Voltage VOUT ≤ VOL (max) -0.3 0.7 V VOH Output High Voltage VDD = Min, VI = VIH or VIL IOH = -100 uA IOH = -1 mA IOH = -2 mA 2.1 2.0 1.7 V VOL Output Low Voltage VDD = Min, VI = VIH or VIL IOL = 100 uA IOL = 1 mA IOL = 2 mA 0.2 0.4 0.7 V II Input Current VDD = Max, VI = VDD or GND Except I/O pins I/O pins ± 5 ± 15 uA JEDEC Standard No. 8-5A.01 Page 3 2.3 DC specifications (cont’d) 2.3.2 Wide range Symbol Parameter Test Condition MIN MAX Unit VDD Supply Voltage 1.8 2.7 V VIH Input High Voltage VOUT ≥ VOH (min) 0.7 VDD VDD+0.3 V VIL Input Low Voltage VOUT ≤ VOL (max) -0.3 0.2 VDD V VOH Output High Voltage VDD = Min, VI = VIH or VIL, IOH = -100 uA VDD – 0.2 V VOL Output Low Voltage VDD = Min, VI = VIH or VIL, IOL = 100 uA 0.2 V 2.4 Optional DC electrical characteristics for Schmitt trigger operation 2.4.1 Optional Schmitt trigger operation - Normal range Symbol Parameter Test Condition MIN MAX Unit VDD Supply Voltage --- 2.3 2.7 V Vt+ (Vp) Positive Going Threshold Voltage VOUT ≥ VOH (min) 0.9 1.7 V Vt- (Vn) Negative Going Threshold Voltage VOUT ≤ VOL (max) 0.7 1.5 V Vh (ΔVt) Hysteresis Voltage Vt+ - Vt- 0.2 1.0 V VOH Output High Voltage IOH = -2 mA VDD-0.45 V VOL Output Low Voltage IOL = 2 mA 0.45 V 2.4.2 Optional Schmitt trigger operation - Wide range Symbol Parameter Test Condition MIN MAX Unit VDD Supply Voltage --- 1.8 2.7 V Vt+ (Vp) Positive Going Threshold Voltage VOUT ≥ VOH (min) 0.25 VDD 0.75 VDD V Vt- (Vn) Negative Going Threshold Voltage VOUT ≤ VOL (max) 0.15 VDD 0.65 VDD V Vh (ΔVt) Hysteresis Voltage Vt+ - Vt- 0.1 VDD 0.6 VDD V VOH Output High Voltage IOH = -100 uA VDD-0.2 V VOL Output Low Voltage IOL = 100 uA 0.2 V JEDEC Standard No. 8-5A.01 Page 4 3 Test conditions for optional Schmitt trigger operation 3.1 Positive Going Threshold Voltage: Vt+ (Vp) As the input signal is raised from a ground level in the measurement circuit shown in Figure 1, the input voltage value at which the output logic changed is determined as Vt+ (Vp). 3.2 Negative Going Threshold Voltage: Vt- (Vn) As the input signal is dropped from a power supply voltage level in the measurement circuit shown in Figure 1, the input voltage value at which the output logic changed is determined as Vt-(Vn). Figure 1 — DC characteristic measurement circuit of Schmitt trigger input. JEDEC Standard No. 8-5A.01 Page 5 Annex A Differences between JESD8-5A.01 and JESD8-5A This table briefly describes changes that appear in this standard, JESD8-5A.01, compared to its predecessor, JESD8-5A (June 2006). These changes were approved at the March, 2007 meeting of the JC-16 committee. Page Description of change 2 The table in Section 2.3.1 was updated to properly reflect that the VIL Test Condition should be VOUT ≤ VOL (max). Annex A.1 Differences between JESD8-5A and JESD8-5 This table briefly describes most of the changes made to entries that appear in this standard, JESD8-5A, compared to its predecessor, JESD8-5 (October 1995). If the change to a concept involves any words added or deleted (excluding deletion of accidentally repeated words), it is included. Some punctuation changes are not included. Page Description of change All Document renumbered to be consistent with the JEDEC Style Manual, JM7 2 In 2.3.1, for consistency with other JESD8-series documents, the following were renamed: "High-level Input Voltage" to "Input High Voltage", and "Low-level Input Voltage" to "Input Low Voltage". 3 Added Section 2.4 to describe the DC electrical characteristics for optional Schmitt trigger operation. 4 Added Section 3 to provide the test conditions for optional Schmitt trigger operation JEDEC Standard No. 8-5A.01 Page 6 Standard Improvement Form JEDEC JESD8-5A.01 The purpose of this form is to provide the Technical Committees of JEDEC with input from the industry regarding usage of the subject standard. Individuals or companies are invited to submit comments to JEDEC. All comments will be collected and dispersed to the appropriate committee(s). If you can provide input, please complete this form and return to: JEDEC Attn: Publications Department 2500 Wilson Blvd. Suite 220 Arlington, VA 22201-3834 Fax: 703.907.7583 1. I recommend changes to the following: Requirement, clause number Test method number Clause number The referenced clause number has proven to be: Unclear Too Rigid In Error Other 2. Recommendations for correction: 3. Other suggestions for document improvement: Submitted by Name: Phone: Company: E-mail: Address: City/State/Zip: Date:
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