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gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler)

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gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler)gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler) gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler) Explanation of options related to ARM architecture in GCC compiler Options...

gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler)
gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler) gcc编译器中和arm体系结构相关的选项解释(Explanation of options related to arm architecture in gcc compiler) Explanation of options related to ARM architecture in GCC compiler Options related to the ARM architecture These are the "-m" switches defined for the ARM (Advanced RISC Machines) structure: -mapcs-frame All functions generate a stack frame that complies with the standard of the ARM program call, even if the code is executed correctly. When this switch is specified, "-fomit-frame-pointer" will not generate the stack frame of the leaf function. By default, "-mno-apcs-frame"". -mapcs Same as "-mapcs-frame". Mapcs-26 Generates processor code using 26 bit program counter, followed by APCS 26 bit option function call standard. This switch replaces the "-m2" and "-m3" switches in the earlier versions of the compiler. -mapcs-32 Generates processor code using 32 bit program counter, followed by APCS 32 bit option function call standard. This switch replaces the "-m6" in the earlier version of the compiler". -mapcs-stack-check Generates the size of the stack space available for each function entry (actually using some stack space). If the available space is insufficient, the function "__rt_stkovf_split_small" or "__rt_stkovf_split_big" will be called according to the required stack space size". The runtime system needs to provide these functions. By default, it is "-mno-apcs-stack-check", because the code is smaller. -mapcs-float Passing floating point parameters with floating point registers. This is a variation of APCS. If the target hardware has a floating point unit, or the code will execute more floating-point calculations, this switch is recommended. By default, it is "-mno-apcs-float" because the switch "-mapcs-float" will result in a slight increase in the size of the integer code. -mapcs-reentrant Generate reentrant location independent code. Equivalent to "-fpic" switch. By default, "-mno-apcs-reentrant"". -mthumb-interwork Generates code that supports calls between ARM and THUMB instruction sets. Without using this switch, you can't reliably use two instruction sets in one program. By default, it is "-mno-thumb-interwork", because the code specified by "-mthumb-interwork" is slightly larger. -mno-sched-prolog It is forbidden to reorder the instructions in the function Prolog or combine them with instructions in the function body. This means that all functions in an identifiable set of instructions to start (actually a group of different functions in beginning,) if the function is in an executable code segment, you can use this information to locate the starting position of function. By default, "-msched-prolog"". -mhard-float Produces the output that contains floating point instructions. This is the default. -msoft-float Produces output that contains floating point library calls. Note: the required library is not provided by all ARM target machines. Generally, the configuration of C compiler is usually used by machine, but it can not be obtained directly during cross compiling. Some sorting must be done to provide proper library function for cross compiling. "-msoft-float" changes the call specification of the output file, so only all the parts of the program use this switch to compile. In particular, you need to use the "-msoft-float" switch to compile the "libgcc.a" library together with GNU CC. -mlittle-endian Generate processor code running in little-endian mode. This is the default for all standard configurations. -mbig-endian Generates processor code running in big-endian mode; default is to generate processor code running in little-endian mode. -mwords-little-endian This switch is only used to generate code for the big endian processor. A code that produces a word order of little-endian but a byte order of big-endian. In other words, the byte order is "32107654" format. Note: this switch is only required when the big-endian ARM processor code compatible with the 2.8 version compiler produced by the previous version is required. -mshort-load-bytes Do not attempt to load half a word (such as "short") by loading a word from an address without borders. The MMU of some target machines is configured to trap and load without boundary alignment; the code generated using this switch is safe in these environments. -mno-short-load-bytes Load a word with no border alignment (such as "short"). This switch generates more efficient code, but MMU is sometimes configured to trap these instructions with traps. -mshort-load-words Same as "-mno-short-load-bytes". -mno-short-load-words Same as "-mshort-load-bytes". -mbsd This switch is only for RISC iX. Simulation of the original BSD mode compiler. This is the default when no -ansi is specified. -mxopen This switch is only for RISC iX. Simulation of the original XOpen mode compiler. -mno-symrename This switch is only for RISC iX. Do not run the assembler's subsequent handler "symrename" after the code is compiled". In general, some standard symbols need to be modified when connecting to the RISC iX C library. This switch ignores this process. The compiler built for cross compilation does not run the subsequent processing program of the assembler. -mcpu=name This switch specifies the name of the target ARM processor. GCC uses this name to determine the type of instruction that can be used to produce assembly code. Names are available: arm2, arm250, arm3, arm6, arm60, arm600, arm610, arm620, ARM7, arm7m, arm7d, arm7dm, arm7di, arm7dmi, arm70, arm700, arm700i, arm710, arm710c, arm7100, arm7500, arm7500fe, ARM7TDMI, arm8, StrongArm and strongarm110. -march=name This switch specifies the name of the ARM structure of the target machine. GCC uses this name to determine the type of instruction that can be used to produce assembly code. This switch can be used in conjunction with the "-mcpu=" switch, and can also replace the "-mcpu=" switch. The available names are: armv2, armv2a, armv3, armv3m, ARMv4, and armv4t. -mfpe=number This switch specifies the floating point simulation version available for the target machine. The available values are 2 and 3. -mstructure-size-boundary=n All structures and joint sizes are processed into multiples of the number of bits set for this switch. The available values are 8 and 32. The default values used by different tool suites are different. The default tool set for the COFF target machine is 8. Specifying larger numbers can produce faster, more efficient code, but at the same time increase the size of the program. If you use structure or joint exchange of information, the code compiled with a value may not be used together with the code or library compiled with another value. Programmers are encouraged to use value 32 because the future version of the tool kit may default to a value of 32. Thumb switch -mthumb-interwork Generates code that supports calls between THUMB and ARM instruction sets. Without using this switch, you can't reliably use two instruction sets in one program. By default, it is "-mno-thumb-interwork" because the code generated by the "-mthumb-interwork" switch is slightly larger. -mtpcs-frame All non leaf functions generate a stack frame that complies with the standard of the Thumb program call. (leaf function is a function that does not call any other function). By default, "-mno-apcs-frame"". -mtpcs-leaf-frame All leaf functions generate a stack frame that complies with the Thumb program call standard. (leaf function is a function that does not call any other function). By default, "-mno-apcs-leaf-frame"". -mlittle-endian Generate processor code running in little-endian mode. This is the default for all standard configurations. -mbig-endian Generate processor code running in big-endian mode. -mstructure-size-boundary=n All structures and joint sizes are processed into multiples of the number of bits set for this switch. The available values are 8 and 32. The default values used by different tool suites are different. The default tool set for the COFF target machine is 8. Specifying larger numbers can produce faster, more efficient code, but at the same time increase the size of the program. These two values may not be compatible. If you use structure or joint exchange of information, the code compiled with a value may not be used together with the code or library compiled with another value. Programmers are encouraged to use value 32 because the future version of the tool kit may default to a value of 32.
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