ICL7660

3-26 File Number 3072.4 ICL7660, ICL7660A CMOS Voltage Converters The Intersil ICL7660 and ICL7660A are monolithic CMOS power supply circuits which offer unique performance advantages over previously available devices. The ICL7660 performs supply voltage conversions from positive to negative for an input range of +1.5V to +10.0V resulting in complementary output voltages of -1.5V to -10.0V and the ICL7660A does the same conversions with an input range of +1.5V to +12.0V resulting in complementary output voltages of -1.5V to -12.0V. Only 2 noncritical external capacitors are needed for the charge pump and charge reservoir functions. The ICL7660 and ICL7660A can also be connected to function as voltage doublers and will generate output voltages up to +18.6V with a +10V input. Contained on the chip are a series DC supply regulator, RC oscillator, voltage level translator, and four output power MOS switches. A unique logic element senses the most negative voltage in the device and ensures that the output N- Channel switch source-substrate junctions are not forward biased. This assures latchup free operation. The oscillator, when unloaded, oscillates at a nominal frequency of 10kHz for an input supply voltage of 5.0V. This frequency can be lowered by the addition of an external capacitor to the “OSC” terminal, or the oscillator may be overdriven by an external clock. The “LV” terminal may be tied to GROUND to bypass the internal series regulator and improve low voltage (LV) operation. At medium to high voltages (+3.5V to +10.0V for the ICL7660 and +3.5V to +12.0V for the ICL7660A), the LV pin is left floating to prevent device latchup. Features • Simple Conversion of +5V Logic Supply to ±5V Supplies • Simple Voltage Multiplication (VOUT = (-) nVIN) • Typical Open Circuit Voltage Conversion Efficiency 99.9% • Typical Power Efficiency 98% • Wide Operating Voltage Range - ICL7660 . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 10.0V - ICL7660A . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 12.0V • ICL7660A 100% Tested at 3V • Easy to Use - Requires Only 2 External Non-Critical Passive Components • No External Diode Over Full Temp. and Voltage Range Applications • On Board Negative Supply for Dynamic RAMs • Localized µProcessor (8080 Type) Negative Supplies • Inexpensive Negative Supplies • Data Acquisition Systems Pinouts ICL7660, ICL7660A (PDIP, SOIC) TOP VIEW ICL7660 (METAL CAN) TOP VIEW Ordering Information PART NO. TEMP. RANGE (oC) PACKAGE PKG. NO. ICL7660CBA 0 to 70 8 Ld SOIC (N) M8.15 ICL7660CBA-T 0 to 70 8 Ld SOIC (N) Tape and Reel M8.15 ICL7660CPA 0 to 70 8 Ld PDIP E8.3 ICL7660MTV† 0 to 70 8 Pin Metal Can T8.C ICL7660ACBA 0 to 70 8 Ld SOIC (N) M8.15 ICL7660ACBA-T 0 to 70 8 Ld SOIC (N) Tape and Reel M8.15 ICL7660ACPA 0 to 70 8 Ld PDIP E8.3 ICL7660AIBA -40 to 85 8 Ld SOIC (N) M8.15 ICL7660AIBA-T -40 to 85 8 Ld SOIC (N) Tape and Reel M8.15 ICL7660AIPA -40 to 85 8 Ld PDIP E8.3 † Add /883B to part number if 883B processing is required. NC CAP+ GND CAP- 1 2 3 4 8 7 6 5 V+ OSC LV VOUT V+ (AND CASE) LVCAP+ NC GND OSC VOUT 2 4 6 1 3 7 5 8 CAP- Data Sheet April 1999 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 3-27 C Absolute Maximum Ratings Thermal Information Supply Voltage ICL7660 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +10.5V ICL7660A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13.0V LV and OSC Input Voltage . . . . . . -0.3V to (V+ +0.3V) for V+ < 5.5V (Note 2) . . . . . . . . . . . . . . (V+ -5.5V) to (V+ +0.3V) for V+ > 5.5V Current into LV (Note 2) . . . . . . . . . . . . . . . . . . . 20µA for V+ > 3.5V Output Short Duration (VSUPPLY ≤ 5.5V) . . . . . . . . . . . .Continuous Operating Conditions Temperature Range ICL7660M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC ICL7660C, ICL7660AC. . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC ICL7660AI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 165 N/A Metal Can Package (ICL7660 Only). . . 160 70 Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, TA = 25oC, COSC = 0, Test Circuit Figure 11 Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS ICL7660 ICL7660A UNITSMIN TYP MAX MIN TYP MAX Supply Current I+ RL = ∞ - 170 500 - 80 165 µA Supply Voltage Range - Lo VL+ MIN ≤ TA ≤ MAX, RL = 10kΩ, LV to GND 1.5 - 3.5 1.5 - 3.5 V Supply Voltage Range - Hi VH+ MIN ≤ TA ≤ MAX, RL = 10kΩ, LV to Open 3.0 - 10.0 3 - 12 V Output Source Resistance ROUT IOUT = 20mA, TA = 25oC - 55 100 - 60 100 Ω IOUT = 20mA, 0oC ≤ TA ≤ 70oC - - 120 - - 120 Ω IOUT = 20mA, -55oC ≤ TA ≤ 125oC - - 150 - - - Ω IOUT = 20mA, -40oC ≤ TA ≤ 85oC - - - - - 120 Ω V+ = 2V, IOUT = 3mA, LV to GND 0oC ≤ TA ≤ 70oC - - 300 - - 300 Ω V+ = 2V, IOUT = 3mA, LV to GND, -55oC ≤ TA ≤ 125oC - - 400 - - - Ω Oscillator Frequency fOSC - 10 - - 10 - kHz Power Efficiency PEF RL = 5kΩ 95 98 - 96 98 - % Voltage Conversion Efficiency VOUT EF RL = ∞ 97 99.9 - 99 99.9 - % Oscillator Impedance ZOSC V+ = 2V - 1.0 - - 1 - MΩ V = 5V - 100 - - - - kΩ ICL7660A, V+ = 3V, TA = 25oC, OSC = Free running, Test Circuit Figure 11, Unless Otherwise Specified Supply Current (Note 3) I+ V+ = 3V, RL = ∞, 25oC - - - - 26 100 µA 0oC < TA < 70oC - - - - - 125 µA -40oC < TA < 85oC - - - - - 125 µA Output Source Resistance ROUT V+ = 3V, IOUT = 10mA - - - - 97 150 Ω 0oC < TA < 70oC - - - - - 200 Ω -40oC < TA < 85oC - - - - - 200 Ω Oscillator Frequency (Note 3) fOSC V+ = 3V (same as 5V conditions) - - - 5.0 8 - kHz 0oC < TA < 70oC - - - 3.0 - - kHz -40oC < TA < 85oC - - - 3.0 - - kHz ICL7660, ICL7660A 3-28 Functional Block Diagram Voltage Conversion Efficiency VOUTEFF V+ = 3V, RL = ∞ - - - 99 - - % TMIN < TA < TMAX - - - 99 - - % Power Efficiency PEFF V+ = 3V, RL = 5kΩ - - - 96 - - % TMIN < TA < TMAX - - - 95 - - % NOTES: 2. Connecting any input terminal to voltages greater than V+ or less than GND may cause destructive latchup. It is recommended that no inputs from sources operating from external supplies be applied prior to “power up” of the ICL7660, ICL7660A. 3. Derate linearly above 50oC by 5.5mW/oC. 4. In the test circuit, there is no external capacitor applied to pin 7. However, when the device is plugged into a test socket, there is usually a very small but finite stray capacitance present, of the order of 5pF. 5. The Intersil ICL7660A can operate without an external diode over the full temperature and voltage range. This device will function in existing designs which incorporate an external diode with no degradation in overall circuit performance. Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, TA = 25oC, COSC = 0, Test Circuit Figure 11 Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS ICL7660 ICL7660A UNITSMIN TYP MAX MIN TYP MAX RC OSCILLATOR ÷2 VOLTAGE LEVEL TRANSLATOR VOLTAGE REGULATOR LOGIC NETWORK OSC LV V+ CAP+ CAP- VOUT Typical Performance Curves (Test Circuit of Figure 11) FIGURE 1. OPERATING VOLTAGE AS A FUNCTION OF TEMPERATURE FIGURE 2. OUTPUT SOURCE RESISTANCE AS A FUNCTION OF SUPPLY VOLTAGE 10 SUPPLY VOLTAGE RANGE (NO DIODE REQUIRED) 8 6 4 2 0 -55 -25 0 25 50 100 125 TEMPERATURE (oC) SU PP LY V O LT AG E (V ) 10K TA = 25oC 1000 100 10 0 1 2 3 4 5 6 7 8 SUPPLY VOLTAGE (V+) O UT PU T SO UR CE R ES IS TA N CE (Ω ) ICL7660, ICL7660A 3-29 FIGURE 3. OUTPUT SOURCE RESISTANCE AS A FUNCTION OF TEMPERATURE FIGURE 4. POWER CONVERSION EFFICIENCY AS A FUNCTION OF OSC. FREQUENCY FIGURE 5. FREQUENCY OF OSCILLATION AS A FUNCTION OF EXTERNAL OSC. CAPACITANCE FIGURE 6. UNLOADED OSCILLATOR FREQUENCY AS A FUNCTION OF TEMPERATURE FIGURE 7. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT CURRENT FIGURE 8. SUPPLY CURRENT AND POWER CONVERSION EFFICIENCY AS A FUNCTION OF LOAD CURRENT Typical Performance Curves (Test Circuit of Figure 11) (Continued) 350 300 250 200 150 100 50 0 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) O UT PU T SO UR CE R ES IS TA N CE (Ω ) IOUT = 1mA V+ = +2V V+ = 5V PO W ER C O NV ER SI O N EF FI CI EN CY (% ) TA = 25oC IOUT = 1mA IOUT = 15mA 100 98 96 94 92 90 88 86 84 82 80 100 1K 10K OSC. FREQUENCY fOSC (Hz) V+ = +5V O SC IL LA TO R FR EQ UE NC Y f O SC (H z) 10K 1K 100 10 V+ = 5V TA = 25oC 1.0 10 100 1000 10K COSC (pF) 20 18 16 14 12 10 8 6 -50 -25 0 25 50 75 100 125 O SC IL LA TO R FR EQ UE NC Y f O SC (kH z) TEMPERATURE (oC) V+ = +5V TA = 25oC V+ = +5V 5 4 3 2 1 0 -1 -2 -3 -4 -5 O UT PU T VO LT AG E LOAD CURRENT IL (mA) SLOPE 55Ω 0 10 20 30 40 50 60 70 80 PEFF I+ TA = 25oC V+ = +5V SU PP LY C UR RE NT I+ (m A) 100 90 80 70 60 50 40 30 20 10 0 100 90 80 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 PO W ER C O NV ER SI O N EF FI CI EN CY (% ) LOAD CURRENT IL (mA) ICL7660, ICL7660A 3-30 Detailed Description The ICL7660 and ICL7660A contain all the necessary circuitry to complete a negative voltage converter, with the exception of 2 external capacitors which may be inexpensive 10µF polarized electrolytic types. The mode of operation of the device may be best understood by considering Figure 12, which shows an idealized negative voltage converter. Capacitor C1 is charged to a voltage, V+, for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C2 such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2. The ICL7660 approaches this ideal situation more closely than existing non-mechanical circuits. In the ICL7660 and ICL7660A, the 4 switches of Figure 12 are MOS power switches; S1 is a P-Channel device and S2, S3 and S4 are N-Channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse biased with respect to their sources, but not so much as to degrade their “ON” resistances. In addition, at circuit start-up, and under output short circuit conditions (VOUT = V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and probable device latchup. This problem is eliminated in the ICL7660 and ICL7660A by a logic network which senses the output voltage (VOUT) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. FIGURE 9. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT CURRENT FIGURE 10. SUPPLY CURRENT AND POWER CONVERSION EFFICIENCY AS A FUNCTION OF LOAD CURRENT NOTE: 6. These curves include in the supply current that current fed directly into the load RL from the V+ (See Figure 11). Thus, approximately half the supply current goes directly to the positive side of the load, and the other half, through the ICL7660/ICL7660A, to the negative side of the load. Ideally, VOUT ∼ 2VIN, IS ∼ 2IL, so VIN x IS ∼ VOUT x IL. NOTE: For large values of COSC (>1000pF) the values of C1 and C2 should be increased to 100µF. FIGURE 11. ICL7660, ICL7660A TEST CIRCUIT Typical Performance Curves (Test Circuit of Figure 11) (Continued) TA = 25oC V+ = 2V +2 +1 0 -1 -2 SLOPE 150Ω 0 1 2 3 4 5 6 7 8 LOAD CURRENT IL (mA) O UT PU T VO LT AG E 100 90 80 70 60 50 40 30 20 10 0P OW ER C O NV ER SI O N EF FI CI EN CY (% ) PEFF I+ LOAD CURRENT IL (mA) 0 1.5 3.0 4.5 6.0 7.5 9.0 20.0 18.0 16.0 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0 SU PP LY C UR RE NT (m A) (N OT E 6) TA = 25oC V+ = 2V 1 2 3 4 8 7 6 5 + - C1 10µF IS V+ (+5V) IL RL -VOUT C2 10µF ICL7660 COSC + - (NOTE) ICL7660A ICL7660, ICL7660A 3-31 The voltage regulator portion of the ICL7660 and ICL7660A is an integral part of the anti-latchup circuitry, however its inherent voltage drop can degrade operation at low voltages. Therefore, to improve low voltage operation the “LV” pin should be connected to GROUND, disabling the regulator. For supply voltages greater than 3.5V the LV terminal must be left open to insure latchup proof operation, and prevent device damage. Theoretical Power Efficiency Considerations In theory a voltage converter can approach 100% efficiency if certain conditions are met. 1. The driver circuitry consumes minimal power. 2. The output switches have extremely low ON resistance and virtually no offset. 3. The impedances of the pump and reservoir capacitors are negligible at the pump frequency. The ICL7660 and ICL7660A approach these conditions for negative voltage conversion if large values of C1 and C2 are used. ENERGY IS LOST ONLY IN THE TRANSFER OF CHARGE BETWEEN CAPACITORS IF A CHANGE IN VOLTAGE OCCURS. The energy lost is defined by: E = 1/2 C1 (V12 - V22) where V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of C1 and C2 are relatively high at the pump frequency (refer to Figure 12) compared to the value of RL, there will be a substantial difference in the voltages V1 and V2. Therefore it is not only desirable to make C2 as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C1 in order to achieve maximum efficiency of operation. Do’s And Don’ts 1. Do not exceed maximum supply voltages. 2. Do not connect LV terminal to GROUND for supply voltages greater than 3.5V. 3. Do not short circuit the output to V+ supply for supply volt- ages above 5.5V for extended periods, however, transient conditions including start-up are okay. 4. When using polarized capacitors, the + terminal of C1 must be connected to pin 2 of the ICL7660 and ICL7660A and the + terminal of C2 must be connected to GROUND. 5. If the voltage supply driving the ICL7660 and ICL7660A has a large source impedance (25Ω - 30Ω), then a 2.2µF capacitor from pin 8 to ground may be required to limit rate of rise of input voltage to less than 2V/µs. 6. User should insure that the output (pin 5) does not go more positive than GND (pin 3). Device latch up will occur under these conditions. A 1N914 or similar diode placed in parallel with C2 will prevent the device from latching up under these conditions. (Anode pin 5, Cathode pin 3). VOUT = -VIN C2 VIN C1 S3 S4 S1 S28 3 2 5 3 7 FIGURE 12. IDEALIZED NEGATIVE VOLTAGE CONVERTER FIGURE 13A. CONFIGURATION FIGURE 13B. THEVENIN EQUIVALENT FIGURE 13. SIMPLE NEGATIVE CONVERTER 1 2 3 4 8 7 6 5 + - 10µF ICL7660 VOUT = -V+ V+ + - 10µF ICL7660A V+ + - RO VOUT ICL7660, ICL7660A 3-32 Typical Applications Simple Negative Voltage Converter The majority of applications will undoubtedly utilize the ICL7660 and ICL7660A for generation of negative supply voltages. Figure 13 shows typical connections to provide a negative supply negative (GND) for supply voltages below 3.5V. The output characteristics of the circuit in Figure 13A can be approximated by an ideal voltage source in series with a resistance as shown in Figure 13B. The voltage source has a value of -V+. The output impedance (RO) is a function of the ON resistance of the internal MOS switches (shown in Figure 12), the switching frequency, the value of C1 and C2, and the ESR (equivalent series resistance) of C1 and C2. A good first order approximation for RO is: RSW, the total switch resistance, is a function of supply voltage and temperature (See the Output Source Resistance graphs), typically 23Ω at 25oC and 5V. Careful selection of C1 and C2 will reduce the remaining terms, minimizing the output impedance. High value capacitors will reduce the 1/(fPUMP • C1) component, and low ESR capacitors will lower the ESR term. Increasing the oscillator frequency will reduce the 1/(fPUMP • C1) term, but may have the side effect of a net increase in output impedance when C1 > 10µF and there is no longer enough time to fully charge the capacitors FIGURE 14. OUTPUT RIPPLE FIGURE 15. PARALLELING DEVICES FIGURE 16. CASCADING DEVICES FOR INCREASED OUTPUT VOLTAGE A t2 t1 B 0 -(V+) V 1 2 3 4 8 7 6 5 ICL7660 V+ C1 ICL7660A 1 2 3 4 8 7 6 5 ICL7660 C1 ICL7660A RL + -C2 “n” “1” 1 2 3 4 8 7 6 5 V+ 1 2 3 4 8 7 6 5 + - 10µF + - 10µF + - 10µF + -10µF VOUT = -nV+ ICL7660 ICL7660A “n” ICL7660 ICL7660A “1” RO ≅ 2(RSW1 + RSW3 + ESRC1) + 2(RSW2 + RSW4 + ESRC1) + 1 + ESRC2(fPUMP) (C1) (fPUMP = fOSC , RSWX = MOSFET switch resistance)2 Combining the four RSWX terms as RSW, we see that: RO ≅ 2 (RSW) + 1 + 4 (ESRC1) + ESRC2(fPUMP) (C1) RO ≅ 2(RSW1 + RSW3 + ESRC1) + ICL7660, ICL7660A 3-33 every cycle. In a typical application where fOSC = 10kHz and C = C1 = C2 = 10µF: RO ≅ 46 + 20 + 5 (ESRC) Since the ESRs of the capacitors are reflected in the output impedance multiplied by a factor of 5, a high value could potentially swamp out a low 1/(fPUMP • C1) term, rendering an increase in switching frequency or filter capacitance ineffective. Typical electrolytic capacitors may have ESRs as high as 10Ω. RO/ ≅ 46 + 20 + 5 (ESRC) Since the ESRs of the capacitors are reflected in the output impedance multiplied by a factor of 5, a high value could potentially swamp out a low 1/(fPUMP • C1) term, rendering an increase in switching frequency or filter capacitance ineffective. Typical electrolytic capacitors may have ESRs as high as 10Ω. Output Ripple ESR also affects the ripple voltage seen at the output. The total ripple is determined by 2 voltages, A and B, as shown in Figure 14. Segment A is the voltage drop across the ESR of C2 at the instant it goes from being charged by C1 (current flow into C2) to being discharged through the load (current flowing out of C2). The magnitude of this current change is 2• IOUT, hence the total drop is 2• IOUT • eSRC2V. Segment B is the voltage change across C2 during time t2, the half of the cycle when C2 supplies current to the load. The drop at B is lOUT • t2/C2V. The peak-to-peak ripple voltage is the sum of these voltage drops: Again, a low ESR capacitor will reset in a higher performance output. Paralleling Devices Any number of ICL7660 and ICL7660A voltage converters may be paralleled to reduce output resistance. The reservoir capacitor, C2, serves all devices while each device requires its own pump capacitor, C1. The resultant output resistance would be approximately: Cascading Devices The ICL7660 and ICL7660A may be cascaded as shown to produced larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: VOUT = -n (VIN), where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the i