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PRINCIPLES OF DATA ACQUISITION AND CONVERSION
Data acquisition and conversion systems are used to acquire
analog signals from one or more sources and convert these
signals into digital form for analysis or transmission by end
devices such as digital computers, recorders, or communica-
tions networks. The analog signal inputs to data acquisition
systems are most often generated from sensors and transduc-
ers which convert real-world parameters such as pressure,
temperature, stress or strain, flow, etc., into equivalent
electrical signals. The electrically equivalent signals are then
converted by the data acquisition system and are then uti-
lized by the end devices in digital form. The ability of the
electronic system to preserve signal accuracy and integrity is
the main measure of the quality of the system.
The basic components required for the acquisition and
conversion of analog signals into equivalent digital form are
the following:
1. Analog Multiplexer and Signal Conditioning
2. Sample/Hold Amplifier
3. Analog-to-Digital Converter
4. Timing or Sequence Logic
Typically, today’s data acquisition systems contain all the
elements needed for data acquisition and conversion, except
perhaps, for input filtering and signal conditioning prior to
analog multiplexing. The analog signals are time multi-
plexed by the analog multiplier; the multiplexer output
signal is then usually applied to a very-linear fast-settling
differential amplifier and/or to a fast-settling low aperture
sample/hold. The sample/hold is programmed to acquire and
hold each multiplexed data sample which is converted into
digital form by an A/D converter. The converted sample is
then presented at the output of the A/D converter in parallel
and serial digital form for further processing by the end
devices.
FIGURE 1. Determining Minimum System Sampling Rate.
Number of
Samples/Cycle Minimum
System
Sampling
Rate
Number
of
Channels
Highest
Bandwidth
Data Channel
SYSTEM SAMPLING RATE —
Error Considerations
The application and ultimate use of the converted data
determines the required sampling and conversion rate of the
data acquisition and conversion system. System sampling
rate is determined, as shown in Figure 1, by the highest
bandwidth channel, the number of data channels and the
number of samples per cycle.
Aliasing Error
From the Nyquist sampling theorem, a minimum of two
samples per cycle of the data bandwidth is required in an
ideal sampled data system to reproduce sampled data with
no loss of information. Thus, the first consideration for
determining system sampling rate is aliasing error, i.e.,
errors due to information being lost by not taking a sufficient
number of samples per cycle of signal frequency.
Figure 2 illustrates aliasing error caused from an insufficient
number of samples per cycle of data bandwidth.
How Many Samples per Cycle?
The answer to this question depends on the allowable aver-
age error tolerance, the method of reconstruction (if any),
and the end use of the data. Regardless of the end use, the
actual error of the discrete data samples will be equal to the
throughput error of the data acquisition and conversion
system plus any digital errors contributed by a digital com-
puter or other digital end device.
For incremental devices such as stepping motors and switches,
the average error of sampled digital data is not as important
FIGURE 2. Aliasing Error vs Sampling Rate.
Samples
First Order
Interpolation
(Reconstruction Using
Filter or Vector Generator)
Zero Order
Interpolation
(Reconstruction Directly
from D/A Converter)
R
ec
on
st
ru
ct
ed
W
av
e
Fo
rm
O
rig
in
al
S
ig
na
l
Aliasing Error
(not enough samples per frequency cycle –fS < 2fMAX)
©1994 Burr-Brown Corporation AB-082 Printed in U.S.A. May, 1994
SBAA051
2
as it is for end devices that require continuous control
signals. To illustrate average sampling error in sampled data
systems, consider the case where the minimum of 2 samples
per cycle of sinusoidal data are taken, and the data is
reconstructed directly from an unfiltered D/A converter
(zero-order reconstruction). The average error between the
reconstructed data and the original signal is one-half the
difference in area for one-half cycle divided by pi, or 32% for
zero order data, and 14% for first order reconstruction.
However, the instantaneous accuracy at each sample point is
equal to the accuracy of the acquisition and conversion
system, and in many applications, this may be sufficient for
driving band-limited end devices. The average accuracy of
sampled data can be improved by (1) increasing the number
of samples per cycle; (2) presample filtering prior to multi-
plexing, or (3) filtering the D/A converter output. FIGURE 4. Reconstruction Accuracy vs Number of SamplesPer Cycle.
For sinusoidal data, maximum aperture error occurs at the
zero crossing where the greatest dv/dt occurs, and is ex-
pressed mathematically as:
Aperture Error = d (A sin 2pi ft) x tA x 100%
= 2pi ftA x 100% max
where f = maximum data frequency
tA = aperture time of system (This
can be the conversion time of
the A/D converter with no
sample/hold, or the aperture
time of a sample/hold if one is
in front of an A/D converter).
This expression is shown graphically in Figure 5 for
frequencies of 1Hz to 10kHz with ±1/2LSB error high-
lighted for 8-, 10- and 12-bit resolution A/D converters.
The need for a sample/hold becomes readily apparent
when data frequencies of 10Hz or higher are sampled,
because the A/D converter conversion speed must be 2µs
or faster for aperture errors less than ±l/2LSB for l2-bit
resolution, and high speed A/D converters are complicated
and expensive when compared to slower A/D converters
with a low aperture sample/hold.
FIGURE 5. Aperture Error vs Aperture Time for Data Fre-
quencies from 10Hz to 1MHz.
Aperture Time (ns)
101 1µs100
.0001
10
1
0.1
.01
.001
Ap
er
tu
re
E
rro
r (
%
Fu
ll-S
ca
le
Ra
ng
e)
1/2LSB of 10 Bits
1/2LSB of 12 Bits
1/2LSB of 13 Bits
1/2LSB of 16 Bits
1/2LSB of 14 Bits
10Hz
100H
z
1kHz
10kH
z
100k
Hz
1MH
z
dt
(1) (1) (1)
(1) (1) (1)
Note: (1) Data samples of conversion
system (2 samples per cycle).
Original
Data
Signal
(a)
Zero Order
Reconstructed
Data
(D/A Converter
Output)
(b)
First Order
Data
Reconstruction
(Filtered DAC
or Vector Generator)
FIGURE 3. Reconstruction of Sampled Data Where fS =
2fMAX.
The improvement in average accuracy of sampled data is
dramatic with only a slight increase in the number of
samples per cycle as shown in Figure 4. The theoretical limit
is the throughput accuracy of the acquisition and conversion
system for continuous sampling.
For zero order reconstruction of data, it can be seen from
Figure 4 that more than 10 samples per cycle of data
bandwidth are required to reconstruct sampled data to aver-
age accuracies of 90% or better. A commonly used range is
7 to 10 samples per cycle.
Aperture Error
Aperture error is defined as the amplitude and time errors of
the sampled data points due to the uncertainty of the dy-
namic data changes during sampling. In data acquisition and
conversion systems, aperture error can be reduced or made
insignificant either by the use of a sample/hold or with a
very fast A/D converter.
Samples/Cycle
101 1000100
0.01
10
1
0.1A
cc
ur
ac
y
(%
)
First Order Data
Reconstruction
(Vector Connection
of Sample)
Zero Order Data
Reconstruction
(D/A Converter
Output)
3
A sample/ hold with an aperture time of 50ns to 60ns
produces negligible aperture error for data frequencies up to
100Hz for 10- and 12-bit resolution A/ D converters, and is
less than ±1/2LSB for 8-bit resolution for data frequencies
near 5kHz. Use Figure 5 to determine your system aperture
error for each data channel versus the desired resolution
A FEW A/D CONVERTER POINTS
A brief discussion of A/D converter terminology will help
the reader understand system resolution and accuracy a little
better.
Accuracy
All analog values are presumed to exist at the input to the
A/D converter. The A/D converter quantizes or encodes
specific values of the analog input into equivalent digital
codes as an output. These digital codes have an inherent
uncertainty or quantization error of ±1/2LSB. That is, the
quantized digital code represents an analog voltage that can
be anywhere within ±1/2LSB from the mid-point between
adjacent digital codes. An A/D converter can never be more
accurate than the inherant ±1/2LSB quantizing error. Ana-
log errors such as gain, offset, and linearity errors also
affect A/D converter accuracy. Usually, gain and offset
errors can be trimmed to zero, but linearity error is
unadjustable because it is caused by the fixed-value ladder
resistor network and network switch matching. Most qual-
ity A/D converters have less than ±1/2LSB linearity error.
Another major error consideration is differential linearity
error. The size of steps between adjacent transition points
in an ideal A/D converter is one LSB. Differential linearity
error is the difference between adjacent transition points in
an actual A/D converter and an ideal one LSB step. This
error must be less than one LSB in order to guarantee that
there are no missing codes. An A/D converter with ±1/
2LSB linearity error does not necessarily imply that there
are no missing codes.
Selecting the Resolution
The number of bits in the A/D converter determines the
resolution of the system. System resolution is determined by
the channel(s) having the widest dynamic range and/or the
channel(s) that require measurement of the smallest data
increment. For example, assume a channel that measures
pressure has a dynamic range of 4000psi that must be
measured to the nearest pound. This will require an A/D
converter with a minimum resolution of 4000 digital codes.
A 12-bit A/D converter will provide a resolution of 212 or
4096 codes—adequate for this requirement. The actual reso-
lution of this channel will be 4000/4096 or 0.976 psi.
The A/D converter can resolve this measurement to within
±0.488 psi (±1/2LSB).
Resolution
The number of bits in an A/D converter determines the
resolution of the data acquisition system. A/D converter
resolution is defined as:
Resolution = One LSB = , for binary A/D converters
= , for decimal A/D converters
LSB = Least Significant Bit
VFSR = Full Scale Input Voltage Range
where n = number of bits
D = numbers of decimal digits
The number of bits defines the number of digital codes and
is 2n discrete digital codes for A/D converters.
For this discussion, we will use binary successive-approxi-
mation A/D converters. Table I shows resolutions and LSB
values for typical A/D converters.
A/D Converter Resol-
ution (Binary Code) Value of 1LSB Value of 1/2LSB
Number Number 0 to +10V +10V 0 to +10V +10V
of Bits Of Incre- Range Range Range Range
(n) ments (2n) (mV) (mV) (mV) (mV)
16 65536 0.152 0.305 0.076 0.152
12 4096 2.44 4.88 1.22 2.44
11 2048 4.88 9.77 2.44 4.88
10 1024 9.77 19.5 4.88 9.77
9 512 19.5 39.1 9.77 19.5
8 256 39.1 78.2 19.5 39.1
TABLE I. Relationship of A/D Converter LSB Values and
Resolutions for Binary Codes.
INCREASING SYSTEM THROUGHPUT RATE
The throughput rate of the system is determined by the
settling times required in the analog multiplexer and input
amplifier, sample/hold acquisition time and A/D converter
settling and conversion time.
Two programming modes that are commonly used in data
acquisition systems are normal serial programming (Figure
6a) and overlap mode programming (Figure 6b). The range
of typical system throughput rates for these types of modes
are shown in Table II for the Burr-Brown SDM857KG
modular data acquisition systems.
A wide range of throughput speeds can be achieved by
“short cycling” the A/D converter to lower resolutions and
by overlap programming the data acquisition system.
The multiplexer and amplifier settling time is eliminated by
selecting the next sample (channel n + 1) while the held
sample (channel n) is being converted. This requires a
sample/hold with very low feed-through error.
VFSR
2n
VFSR
10D
4
NORMAL OVERLAP
PROGRAMMING MODE
Max System Max System
Throughput RSS Throughput RSS
Resolution Rate Accuracy Rate Accuracy
12 Bits 18kHz 0.025% 27kHz 0.025%
10 Bits 19.5kHz 0.08% 30kHz 0.08%
8 Bits 21.1kHz 0.30% 34.1kHz 0.30%
RESOLUTIONS
Error Source 8 Bits 10 Bits 12 Bits
MUX Error 0.0025% 0.0025% 0.0025%
AMP Error 0.01% 0.01% 0.01%
S/H Error 0.01% 0.01% 0.01%
ADC Errors
Analog 0.2% 0.05% 0.012%
Quantizing 0.2% 0.05% 0.012%
RSS Error 0.283% 0.072% 0.022%
DIGITAL CODES
One final consideration in data acquisition and conversion
systems is the digital coding of the data at the output of the
A/D converter. Data is usually encoded in either binary or
binary-coded-decimal (BCD) form.
Binary encoded data formats are most commonly employed
for digital computer-oriented applications where the pro-
cessing is normally performed in binary notation. BCD data
encoding is usually required in applications where the data
is fed to decimal end devices such as digital readouts and
printers. The majority of applications require binary encod-
ing.
The most commonly used binary codes in A/D converters
are:
1. Unipolar Straight Binary (USB)—used for unipolar ana-
log signal ranges, i.e., 0 to ±5V, 0 to ±10V, etc.
2. Bipolar Offset Binary (BOB)—used for bipolar analog
signal ranges, i.e., ±5V, ±10V, etc.
3. Bipolar Two’s Complement (BTC)—used for bipolar
analog signal ranges in many digital computer applica-
tions.
Two BCD codes, unipolar BCD and sign-magnitude BCD
(SMD) are used in A/D converters. The definition of these
codes is shown in Table IV and V.
OUTPUT
DIGITAL USB BOB(2)
DEFINITION CODE CODE CODE
MSB LSB
+Full Scale 111....11φ(1) +VFSR –1/2LSB +VFSR –1/2LSB
Mid Scale 100....00φ +VFSR/2 Zero
–Full Scale 000....00φ +1/2LSB –VFSR +1/2LSB
One Least VFSR ±VFSR
Significant Bit
NOTES: (1) φ is the transition value of the LSB. (2) BTC Code–invert the
MSB (sign bit) of the digital code—ranges same as BOB codes.
2
2
2n
Channel Period
Channel In
Multiplier
and Amplifier
Settling
Time
S/H
Acquisi-
tion and
Settling
Time
A/D Converter
Settling and
Conversion Time
(A)
(B)
Channel Period
Channel In
S/H
Acquisi-
tion and
Settling
Time
A/D Converter
Settling and
Conversion Time
FIGURE 6a. System Throughput Rate-Signal Programming
and, 6b, System Throughput Rate-Overlap
Mode.
SYSTEM THROUGHPUT ACCURACY
The most common method used to describe data acquisition
and conversion system accuracy is to compute the root-sum
squared (RSS) errors of the system components. The RSS
error is a statistical value which is equivalent to the standard
deviation (1σ), and represents the square root of the sum of
the squares of the peak errors of each system component,
including ADC quantization error:
where εMUX = analog multiplexer error
εAMP = input amplifier error
εSH = sample/hold error
εADC = A/D converter error
The source irnpedance, data bandwidth, A/D converter reso-
lution and system throughput rate affect these error calcula-
tions. To simplify, errors can be calculated by assuming the
following:
1. Aperture error is negligible - i.e., less than 1/10LSB.
2. Source impedance is less than 1000Ω.
3. Signal range is ±10 volts.
4. Throughput rate is equal to or less than the maximum
shown in Table III.
εRSS = εMUX
2 + εAMP
2 + εSH
2 + εADC
2
TABLE III. System Error Contribution and RSS Error vs
Resolution for Burr-Brown Model857KG
Modular Data Acquisition System.
TABLE IV. Definition of Binary Codes.
TABLE II. System Throughput Rates and RSS Accuracy for
Normal and Overlap Mode Programming for
Burr-Brown Model SDM857KG Modular Data
Acquisition System.
2n
5
OUTPUT
DIGITAL CODE BCD SMD
DEFINITION (3 DIGITS) CODE CODE
Sign MSD(1) LSD
+ Full Scale 1 1001 1001 1001 999 +999
Zero 1 0000 0000 0000 000 +000
–Full Scale 0 1001 1001 1001 N/A –999
One Least
Significant Bit
NOTES: (1) MSD = Most Significat Digit. (2) n represents number of
digits—4 bits per digit.
±VFSR
(2)
10n
VFSR
(2)
10n
TABLE V. Definition of Decimal Codes.
SUMMARY
The criteria that determine the key parameters and perfor-
mance requirements of a data acquisition and conversion
system are:
1. Number of analog input channels;
2. Amplitude of data source signals;
3. Bandwidth of data;
4. Desired resolution of data; and,
5. End use of converted data.
Although this discussion did not treat all system criteria
from a rigorous mathematical point of view, it does not
identify and attempt to shed insight on the most important
considerations from a practical viewpoint.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
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without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
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