tps40200-ht

? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 1 2 3 4 8 7 6 5 RC SS COMP FB VDD ISNS GDRV GND D OR HKJ PACKAGE (TOP VIEW) TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 WIDE-INPUT-RANGE NONSYNCHRONOUS VOLTAGE-MODE CONTROLLER Check for Samples: TPS40200-HT 1FEATURES SUPPORTS EXTREME TEMPERATURE APPLICATIONS• Input Voltage Range 5.5 V to 52 V • Controlled Baseline • Output Voltage (700 mV to 87% VIN) • One Assembly/Test Site • 200-mA Internal P-Channel FET Driver • One Fabrication Site • Voltage Feed-Forward Compensation • Available in Extreme (–55°C/210°C) • Undervoltage Lockout Temperature Range (1) • Programmable Fixed-Frequency • Extended Product Life Cycle(35 kHz to 500 kHz) Operation • Extended Product-Change Notification • Programmable Short-Circuit Protection • Product Traceability • Hiccup Overcurrent Fault Recovery • Texas Instruments high temperature products utilize highly optimized silicon (die) solutions• Programmable Closed-Loop Soft Start with design and process enhancements to • 700-mV 1% Reference Voltage maximize performance over extended • External Synchronization temperatures. APPLICATIONS • Down-Hole Drilling • High Temperature Environments (1) Custom temperature ranges available DESCRIPTION The TPS40200 is a flexible nonsynchronous controller with a built-in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52 V, with a power-saving feature that turns off driver current once the external FET has been fully turned on. This feature extends the flexibility of the device, allowing it to operate with an input voltage up to 52 V, without dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward input-voltage compensation that responds instantly to input-voltage change. The integral 700-mV reference is trimmed to 2%, providing the means to accurately control low voltages. Clock frequency, soft start, and overcurrent limit each are easily programmed by a single, external component. The part has undervoltage lockout, and can be easily synchronized to other controllers or a system clock to satisfy sequencing and/or noise-reduction requirements. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2009–2010, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 50 60 70 80 90 100 0 0.5 1 1.5 2 2.5 3 LoadCurrent- A E ff ic ie n c y - % V =8V V =12V V =16V IN IN IN V =5V OUT 1 2 3 4 8 7 6 5 VDD ISNS GDRV GND RC SS COMP FB TPS40200 R SENSE V IN V OUT R1 R2 L1 C2 D1 C1 C3 C4 C5 C6 R4 R3 R5 Q1 0.0 0.0 ½ ½ 1350 mm ½ ½ 13 50 m m |52 mm | 52 mm TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. TYPICAL APPLICATION Figure 1. 12-V to 5-V Buck Converter Figure 2. Typical Efficiency of Application Circuit 1 (Described in Application 1)With 94% Efficiency BARE DIE INFORMATION(1) BACKSIDE BOND PAD BOND PADDIE THICKNESS BACKSIDE FINISH POTENTIAL METALLIZATION COMPOSITION THICKNESS 15 mils. Silicon with backgrind GND Al-Cu (0.5%) 0.6 µm (1) Bond pad over active circuitry 2 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 Table 1. Bond Pad Coordinates in Microns DISCRIPTION PAD NUMBER X min Y min X max Y max RC 1 63.27 1124.01 164.07 1224.81 SS 2 61.20 922.77 162.00 1023.57 COMP 3 61.20 250.38 162.00 351.18 FB 4 70.20 74.16 171.00 174.96 GND 5 1193.94 91.44 1294.74 192.24 GDRV 6 1188.90 245.34 1289.70 346.14 ISNS 7 1189.80 978.30 1290.60 1079.10 VDD 8 1137.60 1148.49 1238.40 1249.29 Table 2. Test Pad Coordinates in Microns DISCRIPTION PAD NUMBER X min Y min X max Y max NC 1 189.00 27.18 256.50 94.68 NC 2 292.86 27.18 360.36 94.68 NC 3 396.72 27.18 464.22 94.68 NC 4 517.77 27.18 585.27 94.68 NC 5 757.71 27.27 825.21 94.77 Table 3. ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER –55°C to 175°C D TPS40200HD KGD TPS40200SKGD1 –55°C to 210°C HKJ TPS40200SHKJ (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com ELECTROSTATIC DISCHARGE (ESD) PROTECTION MIN MAX UNIT Human-Body Model 1500 V CDM 1500 V ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VDD 52 Input voltage range RC, FB –0.3 to 5.5 V SS –0.3 to 9 ISNS, COMP –0.3 to 9 Output voltage range V GDRV (VIN – 10) to VIN TJ Operating virtual junction temperature range –55 to 210 °C Tstg Storage temperature range –55 to 210 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT VDD Input voltage 5.5 52 V ELECTRICAL CHARACTERISTICS –55°C < TA = TJ < 210°C, VDD = 12 V, fOSC = 100 kHz (unless otherwise noted) TA = –55°C TO 125°C TA = 175°C (1) TA = 210°CPARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX Voltage Reference FeedbackVFB 4.5 V < VDD < 52 V 675 696 710 689 760 800 675 729 753 mVvoltage Gate Driver Gate driverIsrc 125 190 100 150 90 145 mApull-up current Gate driverIsnk 200 260 130 250 100 220 mApull-down current Gate driver VGATE = (VDD – VGDRV),VGATE 6 8 10 5.3 8 10 5.25 8 10 Voutput for 12 V < VDD < 52 V voltage Quiescent Current Device fOSC = 300 kHz, Iqq quiescent Driver not switching, 1.5 3 1.5 3 1.5 3 mA current 5.5 V < VDD < 52 V Undervoltage Lockout (UVLO) TurnonVUVLO(on) 3.8 4.2 4.5 3.8 4.2 5 3.8 4.6 5.5threshold V TurnoffVUVLO(off) 4 4 4.6threshold VUVLO(HYST) Hysteresis 110 160 275 80 140 275 75 117 275 mV (1) For D package only. 4 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 ELECTRICAL CHARACTERISTICS (continued) –55°C < TA = TJ < 210°C, VDD = 12 V, fOSC = 100 kHz (unless otherwise noted) TA = –55°C TO 125°C TA = 175°C (1) TA = 210°CPARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX Soft Start Internal soft-startRSS(chg) 65 75 170 63 80 170 60 80 170 kΩpullup resistance Internal soft-startRSS(dchg) 190 217 485 175 258 485 165 212 485 kΩpulldown resistance Soft-start VSSRST reset 100 152 200 100 152 1000 100 150 1700 mV threshold Overcurrent Protection Over- VILIM current 35 100 150 35 108 150 35 108 150 mV threshold Over- currentOCDF 2 2 %duty cycle (2) Over- currentVILIM(rst) 90 105 200 90 110 200 90 110 200 mVreset threshold Oscillator Oscillator frequency 35 500 35 500 35 500 range (2) fOSC RRC = 200 kΩ, kHz85 90 115 85 92 115 84 94 115CRC = 470 pFOscillator frequency RRC = 68.1 kΩ, 255 280 345 255 274 345 255 270 345CRC = 470 pF Frequency 12 V < VDD < 52 V –9 0 –9 0 –9 0 line % 4.5 V < VDD < 12 V –20 0 –20 0 –20 0regulation RampVRMP 4.5 V < VDD < 52 V VDD÷10 VDD÷10 VDD÷10 Vamplitude Pulse-Width Modulator Minimum VDD = 12 V 360 500 445 900 525 980 controllabltMIN nse pulse VDD = 30 V 170 250 176 450 240 480 width fOSC = 100 kHz, 93 98 93 98 93 100CL = 470 pFMaximumDMAX %duty cycle fOSC = 300 kHz, 87 96 87 96 87 96CL = 470 pF Modulator and KPWM power- 8 10 12 8 10 12 8 10 12 V/V stage dc gain Error Amplifier Input biasIIB 100 250 130 440 680 1500 nAcurrent (2) By design only. Not tested in production. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ?1 10 100 1000 10000 100000 1000000 110 130 150 170 190 210 230 Continous TJ (°C) E s ti m a te d L if e (H o u rs ) Electromigration Fail Mode TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) –55°C < TA = TJ < 210°C, VDD = 12 V, fOSC = 100 kHz (unless otherwise noted) TA = –55°C TO 125°C TA = 175°C (1) TA = 210°CPARAMETER TEST CONDITIONS UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX Open-loopAOL 60 80 60 80 60 80 dBgain (2) Unity gain GBWP bandwidth 1.5 3 2.5 2.5 MHz (2) Output VFB = 0.6 V,ICOMP(src) source 100 250 100 250 100 250 mACOMP = 1 V current Output VFB = 1.2 V,ICOMP(snk) sink 1.0 2.5 1 2.5 1 2.5 mACOMP = 1 V current THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PACKAGE PARAMETER MIN TYP MAX UNIT D qJC Junction-to-case thermal resistance 49 °C/W Junction-to-case thermal resistance (to bottom of case) 5.7 HKJ qJC °C/WJunction-to-case thermal resistance (to top of case lid - as if formed dead bug) 13.7 Figure 3. TPS40200SKGD1 Operating Life Derating Chart Notes: 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). 6 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? COMP FB SS ISNS RC Soft-Start and Overcurrent E/A and SS Reference Enable E/A 700 mV PWM Logic GDRV voltage swing limited to (V – 8 V)IN VDD GDRV GND + – + Driver OSC UVLO 5 3 4 2 7 1 8 6 TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 DEVICE INFORMATION Functional Block Diagram TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. Switching frequency-setting RC network. Connect capacitor from RC pin to GND pin and resistor from VIN RC 1 I pin to RC pin. The device may be synchronized to an external clock by connecting an open-drain output to this pin and pulling it to GND. The pulse width for synchronization should not be excessive. Soft-start programming pin. Connect capacitor from SS to GND to program soft-start time. Pulling this pin SS 2 I below 150 mV causes the output switching to stop, placing the device in a shutdown state. The pin also functions as a restart timer for overcurrent events. COMP 3 O Compensation. Error amplifier output. Connect control-loop compensation network from COMP to FB. FB 4 I Feedback. Error amplifier inverting input. Connect feedback resistor network center tap to this pin. GND 5 Device ground GDRV 6 O Driver output for external P-channel MOSFET ISNS 7 I Output voltage. VDD 8 I System input voltage. Connect local bypass capacitor from VDD to GND. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 5 10 15 20 25 30 35 40 45 50 55 VDD (V) 0 0.5 1 1.5 2 2.5 3 I+ ( m A ) 1.56 1.57 1.58 1.59 1.6 1.61 1.62 1.63 1.64 1.65 1.66 1.67 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) I D D (m A ) 149 149.5 150 150.5 151 151.5 152 152.5 153 153.5 154 154.5 155 155.5 156 156.5 157 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) R e s e t T h re s h o ld (m V ) Turnon Turnoff 3.8 4 4.2 4.4 4.6 4.8 5 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) U V L O (V ) TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com TYPICAL CHARACTERISTICS QUIESCENT CURRENT vs QUIESCENT CURRENT TEMPERATURE vs (VDD = 12 V) VDD Figure 4. Figure 5. SOFT-START THRESHOLD vs UVLO TURNON AND TURNOFF TEMPERATURE vs (VDD = 12 V) TEMPERATURE Figure 6. Figure 7. 8 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 98 100 102 104 106 108 110 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) I L IM T h re s h o ld (m V ) VDD=12V VDD=5.5V VDD=52V 80 85 90 95 100 105 110 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature(°C) F re q u e n c y (k H z ) R = 202 kW C = 470 pF 5 10 15 20 25 30 35 40 45 50 55 VDD (V) 220 225 230 235 240 245 250 255 260 265 270 275 O s c il la to r F re q u e n c y ( k H z ) R = 68.1 k C = 470 pF T = 25°C W J 5 10 15 20 25 30 35 40 45 50 55 19.00 19.50 20.00 20.50 21.00 G a in ( d B ) T = 25°C J VDD (V) TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 TYPICAL CHARACTERISTICS (continued) CURRENT-LIMIT THRESHOLD vsOSCILLATOR FREQUENCY TEMPERATUREvs TEMPERATURE (VDD = 12 V) Figure 8. Figure 9. OSCILLATOR FREQUENCY POWER-STAGE GAIN vs vs VDD VDD Figure 10. Figure 11. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? VDD=5.5V VDD=12V 18 18.5 19 19.5 20 20.5 21 21.5 22 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) G a in (d B ) VDD=52V 18 18.5 19 19.5 20 20.5 21 21.5 22 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) G a in (d B ) VDD=24V VDD=12V 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature(°C) V ra m p (V ) VDD=36V VDD=52V 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature(°C) V ra m p (V ) TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) POWER-STAGE GAIN POWER-STAGE GAIN vs vs TEMPERATURE TEMPERATURE Figure 12. Figure 13. MODULATOR RAMP AMPLITUDE MODULATOR RAMP AMPLITUDE vs vs TEMPERATURE TEMPERATURE Figure 14. Figure 15. 10 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 0 1 2 3 4 5 6 V (V ) R A M P 5 10 15 20 25 30 35 40 45 50 55 VDD (V) T = 25°C J 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) I B (m A ) 0 50 100 150 200 250 300 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) O u tp u t C u rr e n t (µ A ) 0 0.5 1 1.5 2 2.5 3 3.5 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) O u tp u t C u rr e n t (m A ) TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 TYPICAL CHARACTERISTICS (continued) FEEDBACK AMPLIFIER INPUT BIAS CURRENT vsMODULATOR RAMP AMPLITUDE TEMPERATUREvs VDD (VDD = 12 V) Figure 16. Figure 17. COMP SOURCE CURRENT COMP SINK CURRENT vs vs TEMPERATURE TEMPERATURE Figure 18. Figure 19. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 7 7.2 7.4 7.6 7.8 8 8.2 8.4 5 10 15 20 25 30 35 40 45 50 55 VDD (V) V (V ) G A T E V = 25°C J 5.4 5.6 5.8 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) V G A T E (V ) VDD=52V VDD=24V 680 700 720 740 760 780 800 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) V F B (m V ) VDD = 12 V VDD = 5.5 V 700 710 720 730 740 750 760 770 780 -65 -40 -15 10 35 60 85 110 135 160 185 210 Temperature (°C) V F B (m V ) TPS40200-HT SGLS400B –OCTOBER 2009–REVISED MAY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) GATE DRIVE VOLTAGE vs GATE DRIVE VOLTAGE TEMPERATURE vs (VDD = 12 V) VDD Figure 20. Figure 21. REFERENCE VOLTAGE REFERENCE VOLTAGE vs vs TEMPERATURE TEMPERATURE Figure 22. Figure 23. 12 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPS40200-HT ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 0755-82916832 ? ? ? ? ? ? ? ? ? ? ? ? ? 105.0CR 1 f RCRC SW ´´ = A750 R V RC IN m£ TPS40200-HT www.ti.com SGLS400B –OCTOBER 2009–REVISED MAY 2010 GENERAL INFORMATION Overview The TPS40200 is a nonsynchronous controller with a built-in 200-mA driver, designed to drive high-speed P-channel FETS up to 500 kHz. Its small size combined with complete functionality makes the part both versatile and easy to use. The controller uses a low-value current-sensing resistor in series with the input voltage and the power FET source connection to detect switching current. When the voltage drop across this resistor exceeds 100 mV, the part enters a hiccup fault mode at approximately 2% of the operating frequency. The part uses voltage feedback to an error amplifier that is biased by a precision 700-mV reference. Feed-forward compensation from the input keeps the pulse-width modulator (PWM) gain constant over the full input voltage range, eliminating the need to change frequency compensation for different input voltages. The part also incorporates a soft-start feature where the output follows a slowly rising soft-start voltage, preventing output-voltage overshoot. Programming the Operating Frequency The operating frequency of the controller is determined by an external resistor, RRC, that is connected from the RC pin to VDD and a capacitor attached from the RC pin to ground. This connection, and the two oscillator comparators inside the IC, are shown in Figure 24. The oscillator frequency can be calculated from the following equation: (1) Where: fSW = Clock frequency RRC = Timing resistor value (in Ω) CRC = Timing capacitor value (in F) RRC must be kept large enough that the current through it does not exceed 750 mA when the internal switch(shown in Figure 24) is discharging the timing capacitor. This condition may be expressed by: (2) Synchronizing the Oscillator Figure 24 shows the functional diagram of the TPS40200 oscillator. When synchronizing the oscillator to an external clock, RC must be pulled below 150 mV for 20 ns or more. The external clock frequency must be higher than the free-running frequency of the converter as well. When