tlv320aic23

������� �� �"�!�� �#��� � � � �% "� ��%��$� ��"� �"��!�"�� ���� ���� �� �����! MAY 2002 Digital Audio Products Data Manual SLWS106D IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2002, Texas Instruments Incorporated iii Contents Section Title Page 1 Introduction 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Functional Block Diagram 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Terminal Assignments 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Ordering Information 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Terminal Functions 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Specifications 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Recommended Operating Conditions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Electrical Characteristics Over Recommended Operating Conditions 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.1 ADC 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.2 DAC 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.3 Analog Line Input to Line Output 2–3. . . . . . . . . . . . . . . . . . . . . . 2.3.4 Stereo Headphone Output 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.5 Analog Reference Levels 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.6 Digital I/O 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.7 Supply Current 2–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Digital-Interface Timing 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.1 Audio Interface (Master Mode) 2–5. . . . . . . . . . . . . . . . . . . . . . . 2.4.2 Audio Interface (Slave-Mode) 2–6. . . . . . . . . . . . . . . . . . . . . . . . 2.4.3 Three-Wire Control Interface 2–7. . . . . . . . . . . . . . . . . . . . . . . . . 2.4.4 Two-Wire Control Interface 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . 3 How to Use the AIC23 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Control Interfaces 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 SPI 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.2 2-Wire 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.3 Register Map 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Analog Interface 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1 Line Inputs 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Microphone Input 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 Line Outputs 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 Headphone Output 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.5 Analog Bypass Mode 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.6 Sidetone Insertion 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv 3.3 Digital Audio Interface 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 Digital Audio-Interface Modes 3–7. . . . . . . . . . . . . . . . . . . . . . . . 3.3.2 Audio Sampling Rates 3–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.3 Digital Filter Characteristics 3–11. . . . . . . . . . . . . . . . . . . . . . . . . . A Mechanical Data A–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v List of Illustrations Figure Title Page 2–1 System-Clock Timing Requirements 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 Master-Mode Timing Requirements 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3 Slave-Mode Timing Requirements 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4 Three-Wire Control Interface Timing Requirements 2–7. . . . . . . . . . . . . . . . . . . . 2–5 Two-Wire Control Interface Timing Requirements 2–7. . . . . . . . . . . . . . . . . . . . . 3–1 SPI Timing 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 2-Wire Compatible Timing 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3 Analog Line Input Circuit 3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4 Microphone Input Circuit 3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5 Right-Justified Mode Timing 3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6 Left-Justified Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7 I2S Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8 DSP Mode Timing 3–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9 Digital De-Emphasis Filter Response – 44.1 kHz Sampling 3–12. . . . . . . . . . . . . 3–10 Digital De-Emphasis Filter Response – 48 kHz Sampling 3–12. . . . . . . . . . . . . 3–11 ADC Digital Filter Response 0: USB Mode (Group Delay = 12 Output Samples) 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–12 ADC Digital Filter Ripple 0: USB (Group Delay = 20 Output Samples) 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–13 ADC Digital Filter Response 1: USB Mode Only 3–14. . . . . . . . . . . . . . . . . . . . . 3–14 ADC Digital Filter Ripple 1: USB Mode Only 3–14. . . . . . . . . . . . . . . . . . . . . . . . . 3–15 ADC Digital Filter Response 2: USB mode and Normal Modes (Group Delay = 3 Output Samples) 3–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16 ADC Digital Filter Ripple 2: USB Mode and Normal Modes 3–15. . . . . . . . . . . . 3–17 ADC Digital Filter Response 3: USB Mode Only 3–16. . . . . . . . . . . . . . . . . . . . . 3–18 ADC Digital Filter Ripple 3: USB Mode Only 3–16. . . . . . . . . . . . . . . . . . . . . . . . . 3–19 DAC Digital Filter Response 0: USB Mode 3–17. . . . . . . . . . . . . . . . . . . . . . . . . . 3–20 DAC Digital Filter Ripple 0: USB Mode 3–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–21 DAC Digital Filter Response 1: USB Mode Only 3–18. . . . . . . . . . . . . . . . . . . . . 3–22 DAC Digital Filter Ripple 1: USB Mode Only 3–18. . . . . . . . . . . . . . . . . . . . . . . . . 3–23 DAC Digital Filter Response 2: USB Mode and Normal Modes 3–19. . . . . . . . . 3–24 DAC Digital Filter Ripple 2: USB Mode and Normal Modes 3–19. . . . . . . . . . . . 3–25 DAC Digital Filter Response 3: USB Mode Only 3–20. . . . . . . . . . . . . . . . . . . . . 3–26 DAC Digital Filter Ripple 3: USB Mode Only 3–20. . . . . . . . . . . . . . . . . . . . . . . . . vi 1–1 1 Introduction The TLV320AIC23 is a high-performance stereo audio codec with highly integrated analog functionality. The analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23 use multibit sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20, 24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz, enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling high-quality digital audio-playback capability, while consuming less than 23 mW during playback only. The TLV320AIC23 is the ideal analog input/output (I/O) choice for portable digital audio-player and recorder applications, such as MP3 digital audio players. Integrated analog features consist of stereo-line inputs with an analog bypass path, a stereo headphone amplifier, with analog volume control and mute, and a complete electret-microphone-capsule biasing and buffering solution. The headphone amplifier is capable of delivering 30 mW per channel into 32 Ω. The analog bypass path allows use of the stereo-line inputs and the headphone amplifier with analog volume control, while completely bypassing the codec, thus enabling further design flexibility, such as integrated FM tuners. A microphone bias-voltage output provides a low-noise current source for electret-capsule biasing. The AIC23 has an integrated adjustable microphone amplifier (gain adjustable from 1 to 5) and a programmable gain microphone amplifier (0 dB or 20 dB). The microphone signal can be mixed with the output signals if a sidetone is required. While the TLV320AIC23 supports the industry-standard oversampling rates of 256 fs and 384 fs, unique oversampling rates of 250 fs and 272 fs are provided, which optimize interface considerations in designs using TI C54x digital signal processors (DSPs) and universal serial bus (USB) data interfaces. A single 12-MHz crystal can supply clocking to the DSP, USB, and codec. The TLV320AIC23 features an internal oscillator that, when connected to a 12-MHz external crystal, provides a system clock to the DSP and other peripherals at either 12 MHz or 6 MHz, using an internal clock buffer and selectable divider. Audio sample rates of 48 kHz and compact-disc (CD) standard 44.1 kHz are supported directly from a 12-MHz master clock with 250 fs and 272 fs oversampling rates. Low power consumption and flexible power management allow selective shutdown of codec functions, thus extending battery life in portable applications. This design solution, coupled with the industry’s smallest package, the TI proprietary MicroStar Junior using only 25 mm2 of board area, makes powerful portable stereo audio designs easily realizable in a cost-effective, space-saving total analog I/O solution: the TLV320AIC23. 1.1 Features • High-Performance Stereo Codec – 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz) – 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz) – 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages – 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages – 8-kHz – 96-kHz Sampling-Frequency Support • Software Control Via TI McBSP-Compatible Multiprotocol Serial Port – 2-wire-Compatible and SPI-Compatible Serial-Port Protocols – Glueless Interface to TI McBSPs • Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface – I2S-Compatible Interface Requiring Only One McBSP for both ADC and DAC – Standard I2S, MSB, or LSB Justified-Data Transfers – 16/20/24/32-Bit Word Lengths MicroStar Junior is a trademark of Texas Instruments. 1–2 – Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode – Industry-Standard Master/Slave Support Provided Also (256/384 fs), Normal mode – Glueless Interface to TI McBSPs • Integrated Total Electret-Microphone Biasing and Buffering Solution – Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules – Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5 – Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB • Stereo-Line Inputs – Integrated Programmable Gain Amplifier – Analog Bypass Path of Codec • ADC Multiplexed Input for Stereo-Line Inputs and Microphone • Stereo-Line Outputs – Analog Stereo Mixer for DAC and Analog Bypass Path • Analog Volume Control With Mute • Highly Efficient Linear Headphone Amplifier – 30 mW into 32 Ω From a 3.3-V Analog Supply Voltage • Flexible Power Management Under Total Software Control – 23-mW Power Consumption During Playback Mode – Standby Power Consumption <150 µW – Power-Down Power Consumption <15 µW • Industry’s Smallest Package: 32-Pin TI Proprietary MicroStar Junior – 25 mm2 Total Board Area – 28-Pin TSSOP Also Is Available (62 mm2 Total Board Area) • Ideally Suitable for Portable Solid-State Audio Players and Recorders 1–3 1.2 Functional Block Diagram Control Interface Digital Filters Digital Audio Interface Σ–∆ DACΣ 6 to –73 dB, 1 dB Steps Headphone Driver Σ–∆ DACΣ 6 to –73 dB, 1 dB Steps Headphone Driver CLKOUT Divider (1x, 1/2x) OSC CS SDIN SCLK MODE DVDD BVDD DGND LRCIN DIN LRCOUT DOUT BCLK AVDD VMID AGND RLINEIN LLINEIN HPVDD HPGND RHPOUT ROUT LOUT LHPOUT XTI/MCLK XTO CLKOUT DSPcodec TLV320AIC23 1.0X 1.0X VADC VMID 50 kΩ 50 kΩ Σ–∆ ADC 2:1 MUX VDAC Σ–∆ ADC 2:1 MUX Mute, 0 dB, 20 dB VMID 50 kΩ 10 kΩ VADC 12 to –34.5 dB, 1.5 dB Steps 1.0X 1.5X VDAC 12 to –34 dB, 1.5 dB Steps MICBIAS MICIN CLKIN Divider (1x, 1/2x) Line Mute Line Mute Side Tone Mute Bypass Mute Bypass Mute NOTE: MCLK, BCLK, and SCLK are all asynchronous to each other. 1–4 1.3 Terminal Assignments LRCIN N C 1 2 3 4 5 6 7 8 9 25 24 23 22 21 20 19 18 17 10 11 12 13 14 15 16 32 31 30 29 28 27 26 DOUT LRCOUT HPVDD LHPOUT RHPOUT HPGND XTI/MCLK SCLK SDIN MODE CS LLINEIN RLINEIN LO UT R O UT AV D D AG ND VM ID M IC BI AS M IC IN NC N C D IN BC LK CL KO UT BV D D D G ND D VD D XT O N C GQE PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 BVDD CLKOUT BCLK DIN LRCIN DOUT LRCOUT HPVDD LHPOUT RHPOUT HPGND LOUT ROUT AVDD DGND DVDD XTO XTI/MCLK SCLK SDIN MODE CS LLINEIN RLINEIN MICIN MICBIAS VMID AGND PW PACKAGE (TOP VIEW) NC – No internal connection 1.4 Ordering Information PACKAGE TA 32-Pin MicroStar Junior GQE 28-Pin TSSOP PW –10°C to 70°C TLV320AIC23GQE TLV320AIC23PW –40°C to 85°C TLV320AIC23IGQE TLV320AIC23IPW 1–5 1.5 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION NAME GQE PW I/O AGND 5 15 Analog supply return AVDD 4 14 Analog supply input. Voltage level is 3.3 V nominal. BCLK 23 3 I/O I2S serial-bit clock. In audio master mode, the AIC23 generates this signal and sends it to the DSP. In audio slave mode, the signal is generated by the DSP. BVDD 21 1 Buffer supply input. Voltage range is from 2.7 V to 3.6 V. CLKOUT 22 2 O Clock output. This is a buffered version of the XTI input and is available in 1X or 1/2X frequencies of XTI. Bit 07 in the sample rate control register controls frequency selection. CS 12 21 I Control port input latch/address select. For SPI control mode this input acts as the data latch control. For 2-wire control mode this input defines the seventh bit in the device address field. See Section 3.1 for details. DIN 24 4 I I2S format serial data input to the sigma-delta stereo DAC DGND 20 28 Digital supply return DOUT 27 6 O I2S format serial data output from the sigma-delta stereo ADC DVDD 19 27 Digital supply input. Voltage range is 1.4 V to 3.6 V. HPGND 32 11 Analog headphone amplifier supply return HPVDD 29 8 Analog headphone amplifier supply input. Voltage level is 3.3 V nominal. LHPOUT 30 9 O Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 VRMS. Gain of –73 dB to 6 dB is provided in 1-dB steps. LLINEIN 11 20 I Left stereo-line input channel. Nominal 0-dB input level is 1 VRMS. Gain of –34.5 dB to 12 dB is provided in 1.5-dB steps. LOUT 2 12 O Left stereo mixer-channel line output. Nominal output level is 1.0 VRMS. LRCIN 26 5 I/O I2S DAC-word clock signal. In audio master mode, the AIC23 generates this framing signal and sends it to the DSP. In audio slave mode, the signal is generated by the DSP. LRCOUT 28 7 I/O I2S ADC-word clock signal. In audio master mode, the AIC23 generates this framing signal and sends it to the DSP. In audio slave mode, the signal is generated by the DSP. MICBIAS 7 17 O Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage level is 3/4 AVDD nominal. MICIN 8 18 I Buffered amplifier input suitable for use with electret-microphone capsules. Without external resistors a default gain of 5 is provided. See Section 2.3.1.2 for details. MODE 13 22 I Serial-interface-mode input. See Section 3.1 for details. NC 1, 9 17, 25 Not Used—No internal connection RHPOUT 31 10 O Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 VRMS. Gain of –73 dB to 6 dB is provided in 1-dB steps. RLINEIN 10 19 I Right stereo-line input channel. Nominal 0-dB