grouding in mixed signal system

HARDWARE DESIGN TECHNIQUES 10.1 GROUNDING IN MIXED SIGNAL SYSTEMS Walt Kester, James Bryant Today's signal processing systems generally require mixed-signal devices such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) as well as fast digital signal processors (DSPs). Requirements for processing analog signals having wide dynamic ranges increases the importance of high performance ADCs and DACs. Maintaining wide dynamic range with low noise in hostile digital environments is dependent upon using good high-speed circuit design techniques including proper signal routing, decoupling, and grounding. In the past, "high precision, low-speed" circuits have generally been viewed differently than so-called "high-speed" circuits. With respect to ADCs and DACs, the sampling (or update) frequency has generally been used as the distinguishing speed criteria. However, the following two examples show that in practice, most of today's signal processing ICs are really "high-speed," and must therefore be treated as such in order to maintain high performance. This is certainly true of DSPs, and also true of ADCs and DACs. All sampling ADCs (ADCs with an internal sample-and-hold circuit) suitable for signal processing applications operate with relatively high speed clocks with fast rise and fall times (generally a few nanoseconds) and must be treated as high speed devices, even though throughput rates may appear low. For example, the 12-bit AD7892 successive approximation (SAR) ADC operates on an 8MHz internal clock, while the sampling rate is only 600kSPS. Sigma-delta (S-D) ADCs also require high speed clocks because of their high oversampling ratios. The AD7722 16-bit ADC has an output data rate (effective sampling rate) of 195kSPS, but actually samples the input signal at 12.5MSPS (64- times oversampling). Even high resolution, so-called "low frequency" S-D industrial measurement ADCs (having throughputs of 10Hz to 7.5kHz) operate on 5MHz or higher clocks and offer resolution to 24-bits (for example, the Analog Devices AD7730 and AD7731). To further complicate the issue, mixed-signal ICs have both analog and digital ports, and because of this, much confusion has resulted with respect to proper grounding techniques. Digital and analog design engineers tend to view these devices from different perspectives, and the purpose of this section is to develop a general grounding philosophy that will work for most mixed signal devices, without having to know the specific details of their internal circuits. Ground and Power Planes The importance of maintaining a low impedance large area ground plane is critical to all analog circuits today. The ground plane not only acts as a low impedance return path for decoupling high frequency currents (caused by fast digital logic) but also minimizes EMI/RFI emissions. Because of the shielding action of the ground plane, the circuits susceptibility to external EMI/RFI is also reduced. HARDWARE DESIGN TECHNIQUES 10.2 Ground planes also allow the transmission of high speed digital or analog signals using transmission line techniques (microstrip or stripline) where controlled impedances are required. The use of "buss wire" is totally unacceptable as a "ground" because of its impedance at the equivalent frequency of most logic transitions. For instance, #22 gauge wire has about 20nH/inch inductance. A transient current having a slew rate of 10mA/ns created by a logic signal would develop an unwanted voltage drop of 200mV at this frequency flowing through 1 inch of this wire: D D D v L i t nH mA ns mV= = ´ =20 10 200 . For a signal having a 2V peak-to-peak range, this translates into an error of about 200mV, or 10% (approximate 3.5-bit accuracy). Even in all-digital circuits, this error would result in considerable degradation of logic noise margins. Figure 10.7 shows an illustration of a situation where the digital return current modulates the analog return current (top figure). The ground return wire inductance and resistance is shared between the analog and digital circuits, and this is what causes the interaction and resulting error. A possible solution is to make the digital return current path flow directly to the GND REF as shown in the bottom figure. This is the fundamental concept of a "star," or single-point ground system. Implementing the true single-point ground in a system which contains multiple high frequency return paths is difficult because the physical length of the individual return current wires will introduce parasitic resistance and inductance which can make obtaining a low impedance high frequency ground difficult. In practice, the current returns must consist of large area ground planes for low impedance to high frequency currents. Without a low-impedance ground plane, it is therefore almost impossible to avoid these shared impedances, especially at high frequencies. All integrated circuit ground pins should be soldered directly to the low-impedance ground plane to minimize series inductance and resistance. The use of traditional IC sockets is not recommended with high-speed devices. The extra inductance and capacitance of even "low profile" sockets may corrupt the device performance by introducing unwanted shared paths. If sockets must be used with DIP packages, as in prototyping, individual "pin sockets" or "cage jacks" may be acceptable. Both capped and uncapped versions of these pin sockets are available (AMP part numbers 5-330808-3, and 5-330808-6). They have spring-loaded gold contacts which make good electrical and mechanical connection to the IC pins. Multiple insertions, however, may degrade their performance. HARDWARE DESIGN TECHNIQUES 10.3 DIGITAL CURRENTS FLOWING IN ANALOG RETURN PATH CREATE ERROR VOLTAGES ANALOG CIRCUITS DIGITAL CIRCUITS ANALOG CIRCUITS DIGITAL CIRCUITS VD VD VA VA + + + + ID IA IDIA + ID VIN VIN ID IA ID IA GND REF GND REF INCORRECT CORRECT Figure 10.7 Power supply pins should be decoupled directly to the ground plane using low inductance ceramic surface mount capacitors. If through-hole mounted ceramic capacitors must be used, their leads should be less than 1mm. The ceramic capacitors should be located as close as possible to the IC power pins. Ferrite beads may be also required for additional decoupling. Double-Sided vs. Multilayer Printed Circuit Boards Each PCB in the system should have at least one complete layer dedicated to the ground plane. Ideally, a double-sided board should have one side completely dedicated to ground and the other side for interconnections. In practice, this is not possible, since some of the ground plane will certainly have to be removed to allow for signal and power crossovers, vias, and through-holes. Nevertheless, as much area as possible should be preserved, and at least 75% should remain. After completing an initial layout, the ground layer should be checked carefully to make sure there are no isolated ground "islands," because IC ground pins located in a ground "island" have no current return path to the ground plane. Also, the ground plane should be checked for "skinny" connections between adjacent large areas which may significantly reduce the effectiveness of the ground plane. Needless to say, auto-routing board layout techniques will generally lead to a layout disaster on a mixed-signal board, so manual intervention is highly recommended. HARDWARE DESIGN TECHNIQUES 10.4 Systems that are densely packed with surface mount ICs will have a large number of interconnections; therefore multilayer boards are preferred. This allows a complete layer to be dedicated to ground. A simple 4-layer board would have internal ground and power plane layers with the outer two layers used for interconnections between the surface mount components. Placing the power and ground planes adjacent to each other provides additional inter-plane capacitance which helps high frequency decoupling of the power supply. GROUND PLANES ARE MANDATORY! n Use Large Area Ground (and Power) Planes for Low Impedance Current Return Paths (Must Use at Least a Double-Sided Board!) n Double-Sided Boards: u Avoid High-Density Interconnection Crossovers and Feedthroughs Which Reduce Ground Plane Area u Keep > 75% Board Area on One Side for Ground Plane n Multilayer Boards u Dedicate at Least One Layer for the Ground Plane u Dedicate at Least One Layer for the Power Plane n Use at Least 30% to 40% of PCB Connector Pins for Ground n Continue the Ground Plane on the Backplane Motherboard to Power Supply Return Figure 10.8 Multicard Mixed-Signal Systems The best way of minimizing ground impedance in a multicard system is to use a "motherboard" PCB as a backplane for interconnections between cards, thus providing a continuous ground plane to the backplane. The PCB connector should have at least 30-40% of its pins devoted to ground, and these pins should be connected to the ground plane on the backplane mother card. To complete the overall system grounding scheme there are two possibilities: 1. The backplane ground plane can be connected to chassis ground at numerous points, thereby diffusing the various ground current return paths. This is commonly referred to as a "multipoint" grounding system and is shown in Figure 10.9. 2. The ground plane can be connected to a single system "star ground" point (generally at the power supply). HARDWARE DESIGN TECHNIQUES 10.5 MULTIPOINT GROUND CONCEPT POWER SUPPLIES GROUND PLANE VA VD VA VD GROUND PLANE BACKPLANE PCB GROUND PLANE VA VDPCB CHASSIS GROUND Figure 10.9 The first approach is most often used in all-digital systems, but can be used in mixed-signal systems provided the ground currents due to digital circuits are sufficiently diffused over a large area. The low ground impedance is maintained all the way through the PC boards, the backplane, and ultimately the chassis. However, it is critical that good electrical contact be made where the grounds are connected to the sheet metal chassis. This requires self-tapping sheet metal screws or "biting" washers. Special care must be taken where anodized aluminum is used for the chassis material, since its surface acts as an insulator. The second approach ("star ground") is often used in high speed mixed-signal systems having separate analog and digital ground systems and warrants considerable further discussion. Separating Analog and Digital Grounds In mixed-signal systems with large amounts of digital circuitry, it is highly desirable to physically separate sensitive analog components from noisy digital components. It may also be beneficial to use separate ground planes for the analog and the digital circuitry. These planes should not overlap in order to minimize capacitive coupling between the two. The separate analog and digital ground planes are continued on the backplane using either motherboard ground planes or "ground screens" which are made up of a series of wired interconnections between the connector ground HARDWARE DESIGN TECHNIQUES 10.6 pins. The arrangement shown in Figure 10.10 illustrates that the two planes are kept separate all the way back to a common system "star" ground, generally located at the power supplies. The connections between the ground planes, the power supplies, and the "star" should be made up of multiple bus bars or wide copper brads for minimum resistance and inductance. The back-to-back Schottky diodes on each PCB are inserted to prevent accidental DC voltage from developing between the two ground systems when cards are plugged and unplugged. Schottky diodes are used because of their low capacitance to prevent coupling between the analog and digital ground planes. However, Schottky diodes begin to conduct at about 300mV, so if the total differential peak-to-peak voltage (the sum of the AC and DC components) between the two ground planes exceeds this value, additional diodes in series should be used. SEPARATING ANALOG AND DIGITAL GROUND PLANES POWER SUPPLIES ANALOG GROUND PLANE DIGITAL GROUND PLANE A D ANALOG GROUND PLANE DIGITAL GROUND PLANE A D VA VD VA VAVD VD ANALOG GROUND PLANE DIGITAL GROUND PLANE BACKPLANE PCB PCB SYSTEM STAR GROUND Figure 10.10 Grounding and Decoupling Mixed-Signal ICs Sensitive analog components such as amplifiers and voltage references are always referenced and decoupled to the analog ground plane. The ADCs and DACs (and other mixed-signal ICs) should generally be treated as analog components and also grounded and decoupled to the analog ground plane. At first glance, this may seem somewhat contradictory, since a converter has an analog and digital interface and usually pins designated as analog ground (AGND) and digital ground (DGND). The diagram shown in Figure 10.11 will help to explain this seeming dilemma. HARDWARE DESIGN TECHNIQUES 10.7 PROPER GROUNDING OF MIXED-SIGNAL ICs ANALOG CIRCUITS DIGITAL CIRCUITS BUFFER GATE OR REGISTER VA A B VD CSTRAY CSTRAY R A A A A D D VNOISE VA AIN/ OUT AGND DGND DATA BUS FERRITE BEAD DATA VD A = ANALOG GROUND PLANE D = DIGITAL GROUND PLANE CIN »» 10pF LP LP LP LP RP RP RP RP SHORT CONNECTIONS IA ID Figure 10.11 Inside an IC that has both analog and digital circuits, such as an ADC or a DAC, the grounds are usually kept separate to avoid coupling digital signals into the analog circuits. Figure 10.11 shows a simple model of a converter. There is nothing the IC designer can do about the wirebond inductance and resistance associated with connecting the bond pads on the chip to the package pins except to realize it's there. The rapidly changing digital currents produce a voltage at point B which will inevitably couple into point A of the analog circuits through the stray capacitance, CSTRAY. In addition, there is approximately 0.2pF unavoidable stray capacitance between every pin of the IC package! It's the IC designer's job to make the chip work in spite of this. However, in order to prevent further coupling, the AGND and DGND pins should be joined together externally to the analog ground plane with minimum lead lengths. Any extra impedance in the DGND connection will cause more digital noise to be developed at point B; it will, in turn, couple more digital noise into the analog circuit through the stray capacitance. Note that connecting DGND to the digital ground plane applies VNOISE across the AGND and DGND pins and invites disaster! The name "DGND" on an IC tells us that this pin connects to the digital ground of the IC. This does not imply that this pin must be connected to the digital ground of the system. It is true that this arrangement will inject a small amount of digital noise onto the analog ground plane. These currents should be quite small, and can be minimized by ensuring that the converter output does not drive a large fanout (they normally HARDWARE DESIGN TECHNIQUES 10.8 can't, by design). Minimizing the fanout on the converter's digital port will also keep the converter logic transitions relatively free from ringing and minimize digital switching currents, and thereby reducing any potential coupling into the analog port of the converter. The logic supply pin (VD) can be further isolated from the analog supply by the insertion of a small lossy ferrite bead as shown in Figure 10.11. The internal digital currents of the converter will return to ground through the VD pin decoupling capacitor (mounted as close to the converter as possible) and will not appear in the external ground circuit. These decoupling capacitors should be low inductance ceramic types, typically between 0.01µF and 0.1µF. Treat the ADC Digital Outputs with Care It is always a good idea (as shown in Figure 10.11) to place a buffer register adjacent to the converter to isolate the converter's digital lines from noise on the data bus. The register also serves to minimize loading on the digital outputs of the converter and acts as a Faraday shield between the digital outputs and the data bus. Even though many converters have three-state outputs/inputs, this isolation register still represents good design practice. The series resistors (labeled "R" in Figure 10.11) between the ADC output and the buffer register input help to minimize the digital transient currents which may affect converter performance. The resistors isolate the digital output drivers from the capacitance of the buffer register inputs. In addition, the RC network formed by the series resistor and the buffer register input capacitance acts as a lowpass filter to slow down the fast edges. A typical CMOS gate combined with PCB trace and through-hole will create a load of approximately 10pF. A logic output slew rate of 1V/ns will produce 10mA of dynamic current if there is no isolation resistor: D D D I C v t pF V ns mA= = ´ =10 1 10 . A 500W series resistors will minimize this output current and result in a rise and fall time of approximately 11ns when driving the 10pF input capacitance of the register: tr R C pF ns= ´ = ´ × = ´ ´ =22 22 22 500 10 11. . . .t W TTL registers should be avoided, since they can appreciably add to the dynamic switching currents because of their higher input capacitance. The buffer register and other digital circuits should be grounded and decoupled to the digital ground plane of the PC board. Notice that any noise between the analog and digital ground plane reduces the noise margin at the converter digital interface. Since digital noise immunity is of the orders of hundreds or thousands of millivolts, this is unlikely to matter. The analog ground plane will generally not be very noisy, but if the noise on the digital ground plane (relative to the analog ground plane) exceeds a few hundred millivolts, then steps should be taken to reduce the digital ground plane impedance, thereby maintaining the digital noise margins at an acceptable level. HARDWARE DESIGN TECHNIQUES 10.9 Separate power supplies for analog and digital circuits are also highly desirable. The analog supply should be used to power the converter. If the converter has a pin designated as a digital supply pin (VD), it should either be powered from a separate analog supply, or filtered as shown in the diagram. All converter power pins should be decoupled to the analog ground plane, and all logic circuit power pins should be decoupled to the digital ground plane as shown in Figure 10.12. If the digital power supply is relatively quiet, it may be possible to use it to supply analog circuits as well, but be very cautious. In some cases it may not be possible to connect VD to the analog supply. Some of the newer, high speed ICs may have their analog circuits powered by +5V, but the digital interface powered by +3V to interface to 3V logic. In this case, the +3V pin of the IC should be decoupled directly to the analog ground plane. It is also advisable to connect a ferrite bead in series with power trace that connects the pin to the +3V digital logic supply. GROUNDING AND DECOUPLING POINTS AMP VD VA VA A A A AGND DGND ADC OR DAC VA A VOLTAGE REFERENCE VA A SAMPLING CLOCK GENERATOR A A VA A BUFFER GATE OR REGISTER VD D D A A R R A ANALOG GROUND PLANE D DIGITAL GROUND PLANE TO OTHER DIGITAL CIRCUITS FERRITE BEAD Figure 10.12 The sampling clock generation circuitry should be treated like analog circuitry and also be grounded and heavily-decoupled to the analog ground plane. Phase noise on the sampling clock produces degradation in system SNR as will be discussed shortly. HARDWARE DESIGN TECHNIQUES 10.10 The Origins of the Confusion about Mixed-Signal Grounding: Applying Single-Card Grounding Concepts to Multicard Systems Most ADC, DAC, and other mixed-signal device data sheets discuss grounding relative to a single PCB, usually the manufacturer's own evaluation board. This has been a source of confus