MAX1340-MAX1348

General Description The MAX1340/MAX1342/MAX1346/MAX1348 integrate a multichannel, 12-bit, analog-to-digital converter (ADC) and a quad, 12-bit, digital-to-analog converter (DAC) in a single IC. The devices also include a temperature sensor and configurable general-purpose I/O ports (GPIOs) with a 25MHz SPI™-/QSPI™-/MICROWIRE™-compatible seri- al interface. The ADC is available in a 4 or an 8 input- channel version. The four DAC outputs settle within 2.0µs, and the ADC has a 225ksps conversion rate. All devices include an internal reference (4.096V) provid- ing a well-regulated, low-noise reference for both the ADC and DAC. Programmable reference modes for the ADC and DAC allow the use of an internal reference, an external reference, or a combination of both. Features such as an internal ±1°C accurate temperature sensor, FIFO, scan modes, programmable internal or external clock modes, data averaging, and AutoShutdown™ allow users to minimize both power consumption and proces- sor requirements. The low glitch energy (4nV•s) and low digital feedthrough (0.5nV•s) of the integrated quad DACs make these devices ideal for digital control of fast- response closed-loop systems. The devices are guaranteed to operate with a supply voltage from +4.75V to +5.25V The devices consume 2.5mA at 225ksps throughput, only 22µA at 1ksps throughput, and under 0.2µA in the shutdown mode. The MAX1342/MAX1348 offer four GPIOs that can be config- ured as inputs or outputs. The MAX1340/MAX1342/MAX1346/MAX1348 are avail- able in 36-pin thin QFN packages. All devices are speci- fied over the -40°C to +85°C temperature range. Applications Closed-Loop Controls for Optical Components and Base Stations System Supervision and Control Data-Acquisition Systems Features ♦ 12-Bit, 225ksps ADC Analog Multiplexer with True-Differential Track/Hold (T/H) 8 Single-Ended Channels or 4 Differential Channels (Unipolar or Bipolar) (MAX1340/MAX1342) 4 Single-Ended Channels or 2 Differential Channels (Unipolar or Bipolar) (MAX1346/MAX1348) Excellent Accuracy: ±0.5 LSB INL, ±0.5 LSB DNL ♦ 12-Bit, Quad, 2µs Settling DAC Ultra-Low Glitch Energy (4nV•s) Power-Up Options from Zero Scale or Full Scale Excellent Accuracy: ±0.5 LSB INL ♦ Internal Reference or External Single-Ended/ Differential Reference Internal Reference Voltage (4.096V) ♦ Internal ±1°C Accurate Temperature Sensor ♦ On-Chip FIFO Capable of Storing 16 ADC Conversion Results and One Temperature Result ♦ On-Chip Channel-Scan Mode and Internal Data-Averaging Features ♦ Analog Single-Supply Operation +4.75V to +5.25V ♦ Digital Supply: 2.7V to AVDD ♦ 25MHz, SPI/QSPI/MICROWIRE Serial Interface ♦ AutoShutdown Between Conversions ♦ Low-Power ADC 2.5mA at 225ksps 22µA at 1ksps 0.2µA at Shutdown ♦ Low-Power DAC: 1.5mA ♦ Evaluation Kit Available (Order MAX1258EVKIT) M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ________________________________________________________________ Maxim Integrated Products 1 Ordering Information/Selector Guide 19-3332; Rev 3; 3/08 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. EVALUAT ION KIT AVAILABL E Pin Configurations appear at end of data sheet. PART TEMP RANGE PIN-PACKAGE REF VOLTAGE (V) ANALOG SUPPLY VOLTAGE (V) RESOLUTION BITS** ADC CHANNELS DAC CHANNELS GPIOs MAX1340BETX -40°C to +85°C 36 Thin QFN-EP* 4.096 4.75 to 5.25 12 8 4 0 MAX1342BETX -40°C to +85°C 36 Thin QFN-EP* 4.096 4.75 to 5.25 12 8 4 4 MAX1346BETX -40°C to +85°C 36 Thin QFN-EP* 4.096 4.75 to 5.25 12 4 4 0 MAX1348BETX -40°C to +85°C 36 Thin QFN-EP* 4.096 4.75 to 5.25 12 4 4 4 SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. AutoShutdown is a trademark of Maxim Integrated Products, Inc. *EP = Exposed pad. **Number of resolution bits refers to both DAC and ADC. M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports 2 _______________________________________________________________________________________ ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AVDD to AGND .........................................................-0.3V to +6V DGND to AGND.....................................................-0.3V to +0.3V DVDD to AVDD .......................................................-3.0V to +0.3V Digital Inputs to DGND.............................................-0.3V to +6V Digital Outputs to DGND .........................-0.3V to (DVDD + 0.3V) Analog Inputs, Analog Outputs and REF_ to AGND...............................................-0.3V to (AVDD + 0.3V) Maximum Current into Any Pin (except AGND, DGND, AVDD, DVDD, and OUT_) ...........................................................50mA Maximum Current into OUT_.............................................100mA Continuous Power Dissipation (TA = +70°C) 36-Pin Thin QFN (6mm x 6mm) (derate 26.3mW/°C above +70°C)......................2105.3mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-60°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ADC DC ACCURACY (Note 1) Resolution 12 Bits Integral Nonlinearity INL ±0.5 ±1.0 LSB Differential Nonlinearity DNL ±0.5 ±1.0 LSB Offset Error ±0.5 ±4.0 LSB Gain Error (Note 2) ±0.5 ±4.0 LSB Gain Temperature Coefficient ±0.8 ppm/°C Channel-to-Channel Offset ±0.1 LSB DYNAMIC SPECIFICATIONS (10kHz sine-wave input, VIN = 4.096VP-P, 225ksps, fCLK = 3.6MHz) Signal-to-Noise Plus Distortion SINAD 70 dB Total Harmonic Distortion (Up to the Fifth Harmonic) THD -76 dBc Spurious-Free Dynamic Range SFDR 72 dBc Intermodulation Distortion IMD fIN1 = 9.9kHz, fIN2 = 10.2kHz 76 dBc Full-Linear Bandwidth SINAD > 70dB 100 kHz Full-Power Bandwidth -3dB point 1 MHz CONVERSION RATE (Note 3) External reference 0.8 µs Power-Up Time tPU Internal reference (Note 4) 218 C onver si on C l ock C ycl es Note: If the package power dissipation is not exceeded, one output at a time may be shorted to AVDD, DVDD, AGND, or DGND indefinitely. M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Acquisition Time tACQ (Note 5) 0.6 µs Internally clocked 5.5 Conversion Time tCONV Externally clocked 3.6 µs External-Clock Frequency fCLK Externally clocked conversion (Note 5) 0.1 3.6 MHz Duty Cycle 40 60 % Aperture Delay 30 ns Aperture Jitter < 50 ps ANALOG INPUTS Unipolar 0 VREF Input-Voltage Range (Note 6) Bipolar -VREF/2 VREF/2 V Input Leakage Current ±0.01 ±1 µA Input Capacitance 24 pF INTERNAL TEMPERATURE SENSOR TA = +25°C ±0.7 Measurement Error (Notes 5, 7) TA = TMIN to TMAX ±1.0 ±3.0 °C Temperature Resolution 1/8 °C/LSB INTERNAL REFERENCE REF1 Output Voltage (Note 8) 4.066 4.096 4.126 V REF1 Voltage Temperature Coefficient TCREF ±30 ppm/°C REF1 Output Impedance 6.5 kΩ REF1 Short-Circuit Current VREF = 4.096V 0.63 mA EXTERNAL REFERENCE REF1 Input-Voltage Range VREF1 REF mode 11 (Note 4) 1 AVDD + 0.05 V REF mode 01 1 AVDD + 0.05REF2 Input-Voltage Range (Note 4) VREF2 REF mode 11 0 1 V VREF = 4.096V, fSAMPLE = 225ksps 40 80 REF1 Input Current (Note 9) IREF1 Acquisition between conversions ±0.01 ±1 µA VREF = 4.096V, fSAMPLE = 225ksps 40 80 REF2 Input Current IREF2 Acquisition between conversions ±0.01 ±1 µA M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports 4 _______________________________________________________________________________________ PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DAC DC ACCURACY (Note 10) Resolution 12 Bits Integral Nonlinearity INL ±0.5 ±4 LSB Differential Nonlinearity DNL Guaranteed monotonic ±1.0 LSB Offset Error VOS (Note 8) ±3 ±10 mV Offset-Error Drift ±10 ppm of FS/°C Gain Error GE (Note 8) ±5 ±10 LSB Gain Temperature Coefficient ±8 ppm of FS/°C DAC OUTPUT No load 0.02 AVDD - 0.02 Output-Voltage Range 10kΩ load to either rail 0.1 AVDD - 0.1 V DC Output Impedance 0.5 Ω Capacitive Load (Note 11) 1 nF Resistive Load to AGND RL AVDD = 4.75V, VREF = 4.096V, gain error < 2% 500 Ω From power-down mode, AVDD = 5V 25 Wake-Up Time (Note 12) From power-down mode, AVDD = 2.7V 21 µs 1kΩ Output Termination Programmed in power-down mode 1 kΩ 100kΩ Output Termination At wake-up or programmed in power-down mode 100 kΩ DYNAMIC PERFORMANCE (Notes 5, 13) Output-Voltage Slew Rate SR Positive and negative 3 V/µs Output-Voltage Settling Time tS To 1 LSB, 400 - C00 hex (Note 7) 2 5 µs Digital Feedthrough Code 0, all digital inputs from 0 to DVDD 0.5 nV•s Major Code Transition Glitch Impulse Between codes 2047 and 2048 4 nV•s From VREF 660 Output Noise (0.1Hz to 50MHz) Using internal reference 720 µVP-P From VREF 260 Output Noise (0.1Hz to 500kHz) Using internal reference 320 µVP-P DAC-to-DAC Transition Crosstalk 0.5 nV•s ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports _______________________________________________________________________________________ 5 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INTERNAL REFERENCE REF1 Output Voltage 4.066 4.096 4.126 V REF1 Temperature Coefficient TCREF ±30 ppm/°C REF1 Short-Circuit Current VREF = 4.096V 0.63 mA EXTERNAL-REFERENCE INPUT REF1 Input-Voltage Range VREF1 REF modes 01, 10, and 11 (Note 4) 0.7 AVDD V REF1 Input Impedance RREF1 70 100 130 kΩ DIGITAL INTERFACE DIGITAL INPUTS (SCLK, DIN, CS, CNVST, LDAC) Input-Voltage High VIH DVDD = 2.7V to 5.25V 2.4 V DVDD = 3.6V to 5.25V 0.8 Input-Voltage Low VIL DVDD = 2.7V to 3.6V 0.6 V Input Leakage Current IL ±0.01 ±10 µA Input Capacitance CIN 15 pF DIGITAL OUTPUT (DOUT) (Note 14) Output-Voltage Low VOL ISINK = 2mA 0.4 V Output-Voltage High VOH ISOURCE = 2mA DVDD - 0.5 V Tri-State Leakage Current ±10 µA Tri-State Output Capacitance COUT 15 pF DIGITAL OUTPUT (EOC) (Note 14) Output-Voltage Low VOL ISINK = 2mA 0.4 V Output-Voltage High VOH ISOURCE = 2mA DVDD - 0.5 V Tri-State Leakage Current ±10 µA Tri-State Output Capacitance COUT 15 pF DIGITAL OUTPUTS (GPIO_) (Note 14) ISINK = 2mA 0.4 GPIOC_ Output-Voltage Low ISINK = 4mA 0.8 V GPIOC_ Output-Voltage High ISOURCE = 2mA DVDD - 0.5 V GPIOA_ Output-Voltage Low ISINK = 15mA 0.8 V GPIOA_ Output-Voltage High ISOURCE = 15mA DVDD - 0.8 V Tri-State Leakage Current ±10 µA Tri-State Output Capacitance COUT 15 pF ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports 6 _______________________________________________________________________________________ PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER REQUIREMENTS (Note 15) Digital Positive-Supply Voltage DVDD 4.75 AVDD V Idle, all blocks shut down 0.2 4 µA Digital Positive-Supply Current DIDD Only ADC on, external reference 1 mA Analog Positive-Supply Voltage AVDD 4.75 5.25 V Idle, all blocks shut down 0.2 2 µA fSAMPLE = 225ksps 2.8 4.2Only ADC on, external reference fSAMPLE = 100ksps 2.6 Analog Positive-Supply Current AIDD All DACs on, no load, internal reference 1.5 4.0 mA REF1 Positive-Supply Rejection PSRR AVDD = 4.75V -80 dB DAC Positive-Supply Rejection PSRD Output code = FFFhex, AVDD = 4.75V to 5.25V ±0.1 ±0.5 mV ADC Positive-Supply Rejection PSRA Full-scale input, AVDD = 4.75V to 5.25V ±0.06 ±0.5 mV TIMING CHARACTERISTICS (Figures 6–13) SCLK Clock Period tCP 40 ns SCLK Pulse-Width High tCH 40/60 duty cycle 16 ns SCLK Pulse-Width Low tCL 60/40 duty cycle 16 ns GPIO Output Rise/Fall After CS Rise tGOD CLOAD = 20pF 100 ns GPIO Input Setup Before CS Fall tGSU 0 ns LDAC Pulse Width tLDACPWL 20 ns CLOAD = 20pF, SLOW = 0 1.8 12.0SCLK Fall to DOUT Transition (Note 16) tDOT CLOAD = 20pF, SLOW = 1 10 40 ns CLOAD = 20pF, SLOW = 0 1.8 12.0SCLK Rise to DOUT Transition (Notes 16, 17) tDOT CLOAD = 20pF, SLOW = 1 10 40 ns CS Fall to SCLK Fall Setup Time tCSS 10 ns S C LK Fal l to CS Ri se S etup Ti m e tCSH 0 2000 ns DIN to SCLK Fall Setup Time tDS 10 ns DIN to SCLK Fall Hold Time tDH 0 ns CS Pulse-Width High tCSPWH 50 ns CS Rise to DOUT Disable tDOD CLOAD = 20pF 25 ns CS Fall to DOUT Enable tDOE CLOAD = 20pF 1.5 25.0 ns EOC Fall to CS Fall tRDS 30 ns ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports _______________________________________________________________________________________ 7 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CKSEL = 01 (temp sense) or CKSEL = 10 (temp sense), internal reference on 65 CKSEL = 01 (temp sense) or CKSEL = 10 (temp sense), internal reference initially off 140 CKSEL = 01 (voltage conversion) 9 CKSEL = 10 (voltage conversion), internal reference on 9 CS or CNVST Rise to EOC Fall— Internally Clocked Conversion Time tDOV CKSEL = 10 (voltage conversion), internal reference initially off 80 µs CKSEL = 00, CKSEL = 01 (temp sense) 40 ns CNVST Pulse Width tCSW CKSEL = 01 (voltage conversion) 1.4 µs ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = 4.75V to 5.25V, external reference VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 5V, TA = +25°C. Outputs are unloaded, unless otherwise noted.) Note 1: Tested at DVDD = AVDD = +5.25V. Note 2: Offset nulled. Note 3: No bus activity during conversion. Conversion time is defined as the number of conversion clock cycles, multiplied by the clock period. Note 4: See Table 5 for reference-mode details. Note 5: Not production tested. Guaranteed by design. Note 6: See the ADC/DAC References section. Note 7: Fast automated test, excludes self-heating effects. Note 8: Specified over the -40°C to +85°C temperature range. Note 9: REFSEL[1:0] = 00 or when DACs are not powered up. Note 10: DAC linearity, gain, and offset measurements are made between codes 115 and 3981. Note 11: The DAC buffers are guaranteed by design to be stable with a 1nF load. Note 12: Time required by the DAC output to power up and settle within 1 LSB in the external reference mode. Note 13: All DAC dynamic specifications are valid for a load of 100pF and 10kΩ. Note 14: Only one digital output (either DOUT, EOC, or the GPIOs) can be indefinitely shorted to either supply at one time. Note 15: All digital inputs at either DVDD or DGND. DVDD should not exceed AVDD. Note 16: See the Reset Register section and Table 9 for details on programming the SLOW bit. Note 17: Clock mode 11 only. M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports 8 _______________________________________________________________________________________ Typical Operating Characteristics (AVDD = DVDD = 5V, external VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), fSAMPLE = 225ksps, CLOAD = 50pF, 0.1µF capacitor at REF, TA = +25°C, unless otherwise noted.) 0 0.1 0.3 0.2 0.4 0.5 ANALOG SHUTDOWN CURRENT vs. ANALOG SUPPLY VOLTAGE M AX 13 40 to c0 1 SUPPLY VOLTAGE (V) AN AL OG S HU TD OW N CU RR EN T (µ A) 4.750 5.0004.875 5.125 5.250 0.4 0.3 0.2 0.1 0 -40 10-15 35 60 85 ANALOG SHUTDOWN CURRENT vs. TEMPERATURE M AX 13 40 to c0 2 TEMPERATURE (°C) AN AL OG S HU TD OW N CU RR EN T (µ A) ADC INTEGRAL NONLINEARITY vs. OUTPUT CODE M AX 13 40 to c0 3 OUTPUT CODE IN TE GR AL N ON LI NE AR IT Y (L SB ) 307220481024 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 -1.00 0 4096 ADC DIFFERENTIAL NONLINEARITY vs. OUTPUT CODE M AX 13 40 to c0 4 OUTPUT CODE DI FF ER EN TI AL N ON LI NE AR IT Y (L SB ) 307220481024 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 -1.00 0 4096 0 0.2 0.6 0.4 0.8 1.0 ADC OFFSET ERROR vs. ANALOG SUPPLY VOLTAGE M AX 13 40 to c0 5 SUPPLY VOLTAGE (V) OF FS ET E RR OR (L SB ) 4.750 5.0004.875 5.125 5.250 2 1 0 -1 -2 -40 10-15 35 60 85 ADC OFFSET ERROR vs. TEMPERATURE M AX 13 40 to c0 6 TEMPERATURE (°C) OF FS ET E RR OR (L SB ) 1.0 0.5 0 -0.5 -1.0 4.750 5.0004.875 5.125 5.250 ADC GAIN ERROR vs. ANALOG SUPPLY VOLTAGE M AX 13 40 to c0 7 SUPPLY VOLTAGE (V) GA IN E RR OR (L SB ) 2 1 0 -1 -2 -40 10-15 35 60 85 ADC GAIN ERROR vs. TEMPERATURE M AX 13 40 to c0 8 TEMPERATURE (°C) GA IN E RR OR (L SB ) ADC EXTERNAL REFERENCE INPUT CURRENT vs. SAMPLING RATE M AX 13 40 to c0 9 SAMPLING RATE (ksps) AD C EX TE RN AL R EF ER EN CE IN PU T CU RR EN T (µ A) 25020015010050 10 20 30 40 50 60 0 0 300 M A X 1 3 4 0 /M A X 1 3 4 2 /M A X 1 3 4 6 /M A X 1 3 4 8 12-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports _______________________________________________________________________________________ 9 Typical Operating Characteristics (continued) (AVDD = DVDD = 5V, external VREF = 4.096V, fCLK = 3.6MHz (50% duty cycle), fSAMPLE = 225ksps, CLOAD = 50pF, 0.1µF capacitor at REF, TA = +25°C, unless otherwise noted.) ANALOG SUPPLY CURRENT vs. SAMPLING RATE M AX 13 40 to c1 0 SAMPLING RATE (ksps) AN AL OG S UP PL Y CU RR EN T (m A) 25020015010050 0.5 1.0 1.5 2.0 2.5 3.0 0 0 300 1.90 1.94 1.92 1.98 1.96 2.02 2.00 2.04 ANALOG SUPPLY CURRENT vs. ANALOG SUPPLY VOLTAGE M AX 13 40 to c1 1 SUPPLY VOLTAGE (V) SU PP LY C UR RE NT (m A) 4.750 4.875 5.000 5.125 5.250 1.88 1.92 1.90 1.96 1.94 2.00 1.98