U4U5U6--mcp6002-SOP8

MCP6001/1R/1U/2/4 Features • Available in SC-70-5 and SOT-23-5 packages • Gain Bandwidth Product: 1 MHz (typical) • Rail-to-Rail Input/Output • Supply Voltage: 1.8V to 6.0V • Supply Current: IQ = 100 µA (typical) • Phase Margin: 90° (typical) • Temperature Range: - Industrial: -40°C to +85°C - Extended: -40°C to +125°C • Available in Single, Dual and Quad Packages Applications • Automotive • Portable Equipment • Photodiode Amplifier • Analog Filters • Notebooks and PDAs • Battery-Powered Systems Design Aids • SPICE Macro Models • FilterLab® Software • Mindi™ Circuit Designer & Simulator • Microchip Advanced Part Selector (MAPS) • Analog Demonstration and Evaluation Boards • Application Notes Typical Application Description The Microchip Technology Inc. MCP6001/2/4 family of operational amplifiers (op amps) is specifically designed for general-purpose applications. This family has a 1 MHz Gain Bandwidth Product (GBWP) and 90° phase margin (typical). It also maintains 45° phase margin (typical) with a 500 pF capacitive load. This family operates from a single supply voltage as low as 1.8V, while drawing 100 µA (typical) quiescent current. Additionally, the MCP6001/2/4 supports rail-to-rail input and output swing, with a common mode input voltage range of VDD + 300 mV to VSS – 300 mV. This family of op amps is designed with Microchip’s advanced CMOS process. The MCP6001/2/4 family is available in the industrial and extended temperature ranges, with a power supply range of 1.8V to 6.0V. Package Types VOUT VIN VDD + – MCP6001 VSS 4 5 4 5 4 MCP6001 1 2 3 -+ 5 VDD VIN– VOUT VSS VIN+ SC70-5, SOT-23-5 MCP6002 PDIP, SOIC, MSOP MCP6004 VINA+ VINA– 1 2 3 14 13 12 - VOUTA + -+ VOUTD VIND– VIND+ PDIP, SOIC, TSSOP VINA+ VINA– VSS 1 2 3 4 8 7 6 5 - VOUTA + - + VDD VOUTB VINB– VINB+ 4 1 2 3 -+ 5 VDDVOUT VSS MCP6001R SOT-23-5 1 2 3 -+ VSS VIN– VOUT VDD VIN+ MCP6001U SOT-23-5 1 2 3 - + VDD VOUT VIN+ VSS VIN– MCP6002 VINA+ VINA– VOUTB VINB– 1 2 3 8 7 6 VOUTA EP 9 VDD 2x3 DFN * 1 MHz, Low-Power Op Amp © 2009 Microchip Technology Inc. DS21733J-page 1 R1 R2 Gain 1 R1 R2 ------+= Non-Inverting Amplifier VREF VSS4 11VDD 10 9 8 5 6 7VOUTB VINB– VINB+ VINC+ VINC– VOUTC +- -+ VSS 4 5 VINB+ * Includes Exposed Thermal Pad (EP); see Table 3-1. MCP6001/1R/1U/2/4 NOTES: DS21733J-page 2 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † VDD – VSS ........................................................................7.0V Current at Analog Input Pins (VIN+, VIN–).....................±2 mA Analog Inputs (VIN+, VIN–) †† ........ VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD – VSS| Output Short Circuit Current ................................Continuous Current at Output and Supply Pins ............................±30 mA Storage Temperature ...................................–65°C to +150°C Maximum Junction Temperature (TJ)......................... .+150°C ESD Protection On All Pins (HBM; MM) .............. ≥ 4 kV; 200V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. †† See Section 4.1.2 “Input Voltage and Current Limits”. DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and VOUT ≈ VDD/2 (refer to Figure 1-1). Parameters Sym Min Typ Max Units Conditions Input Offset Input Offset Voltage VOS -4.5 — +4.5 mV VCM = VSS (Note 1) Input Offset Drift with Temperature ΔVOS/ΔTA — ±2.0 — µV/°C TA= -40°C to +125°C, VCM = VSS Power Supply Rejection Ratio PSRR — 86 — dB VCM = VSS Input Bias Current and Impedance Input Bias Current: IB — ±1.0 — pA Industrial Temperature IB — 19 — pA TA = +85°C Extended Temperature IB — 1100 — pA TA = +125°C Input Offset Current IOS — ±1.0 — pA Common Mode Input Impedance ZCM — 1013||6 — Ω||pF Differential Input Impedance ZDIFF — 1013||3 — Ω||pF Common Mode Common Mode Input Range VCMR VSS − 0.3 — VDD + 0.3 V Common Mode Rejection Ratio CMRR 60 76 — dB VCM = -0.3V to 5.3V, VDD = 5V Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 88 112 — dB VOUT = 0.3V to VDD – 0.3V, VCM = VSS Output Maximum Output Voltage Swing VOL, VOH VSS + 25 — VDD – 25 mV VDD = 5.5V, 0.5V Input Overdrive Output Short Circuit Current ISC — ±6 — mA VDD = 1.8V — ±23 — mA VDD = 5.5V Power Supply Supply Voltage VDD 1.8 — 6.0 V Note 2 Quiescent Current per Amplifier IQ 50 100 170 µA IO = 0, VDD = 5.5V, VCM = 5V Note 1: MCP6001/1R/1U/2/4 parts with date codes prior to December 2004 (week code 49) were tested to ±7 mV minimum/ maximum limits. 2: All parts with date codes November 2007 and later have been screened to ensure operation at VDD = 6.0V. However, the other minimum and maximum specifications are measured at 1.8V and 5.5V. © 2009 Microchip Technology Inc. DS21733J-page 3 MCP6001/1R/1U/2/4 AC ELECTRICAL SPECIFICATIONS TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to 5.5V, VSS = GND, VCM = VDD/2, VL = VDD/2, VOUT ≈ VDD/2, RL = 10 kΩ to VL, and CL = 60 pF (refer to Figure 1-1). Parameters Sym Min Typ Max Units Conditions AC Response Gain Bandwidth Product GBWP — 1.0 — MHz Phase Margin PM — 90 — ° G = +1 V/V Slew Rate SR — 0.6 — V/µs Noise Input Noise Voltage Eni — 6.1 — µVp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 28 — nV/√Hz f = 1 kHz Input Noise Current Density ini — 0.6 — fA/√Hz f = 1 kHz Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND. Parameters Sym Min Typ Max Units Conditions Temperature Ranges Industrial Temperature Range TA -40 — +85 °C Extended Temperature Range TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C Note Storage Temperature Range TA -65 — +150 °C Thermal Package Resistances Thermal Resistance, 5L-SC70 θJA — 331 — °C/W Thermal Resistance, 5L-SOT-23 θJA — 256 — °C/W Thermal Resistance, 8L-PDIP θJA — 85 — °C/W Thermal Resistance, 8L-SOIC (150 mil) θJA — 163 — °C/W Thermal Resistance, 8L-MSOP θJA — 206 — °C/W Thermal Resistance, 8L-DFN (2x3) θJA — 68 — °C/W Thermal Resistance, 14L-PDIP θJA — 70 — °C/W Thermal Resistance, 14L-SOIC θJA — 120 — °C/W Thermal Resistance, 14L-TSSOP θJA — 100 — °C/W Note: The industrial temperature devices operate over this extended temperature range, but with reduced performance. In any case, the internal Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C. DS21733J-page 4 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 1.1 Test Circuits The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT; see Equation 1-1. Note that VCM is not the circuit’s common mode voltage ((VP + VM)/2), and that VOST includes VOS plus the effects (on the input offset error, VOST) of temperature, CMRR, PSRR and AOL. EQUATION 1-1: FIGURE 1-1: AC and DC Test Circuit for Most Specifications. GDM RF RG⁄= VCM VP VDD 2⁄+( ) 2⁄= VOUT VDD 2⁄( ) VP VM–( ) VOST 1 GDM+( )+ += Where: GDM = Differential Mode Gain (V/V) VCM = Op Amp’s Common Mode Input Voltage (V) VOST = Op Amp’s Total Input Offset Voltage (mV) VOST VIN– VIN+–= VDD RG RF VOUTVM CB2 CLRL VL CB1 100 kΩ100 kΩ RG RF VDD/2VP 100 kΩ100 kΩ 60 pF10 kΩ 1 µF100 nF VIN– VIN+ CF 6.8 pF CF 6.8 pF MCP600X © 2009 Microchip Technology Inc. DS21733J-page 5 MCP6001/1R/1U/2/4 NOTES: DS21733J-page 6 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 2.0 TYPICAL PERFORMANCE CURVES Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF. FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Quadratic Temp. Co. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% 5 -4 -3 -2 -1 0 1 2 3 4 5 Input Offset Voltage (mV) Pe rc en ta ge o f O cc ur re nc es 64,695 Samples VCM = VSS 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 Input Offset Voltage Drift; TC1 (µV/°C) Pe rc en ta ge o f O cc ur re nc es 2453 Samples TA = -40°C to +125°C VCM = VSS 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% -0 .0 2 -0 .0 1 0. 00 0. 01 0. 02 0. 03 0. 04 0. 05 0. 06 0. 07 Input Offset Quadratic Temp. Co.; TC2 (µV/°C 2) Pe rc en ta ge o f O cc ur re nc es 2453 Samples TA = -40°C to +125°C VCM = VSS -700 -600 -500 -400 -300 -200 -100 0 -0 .4 -0 .2 0. 0 0. 2 0. 4 0. 6 0. 8 1. 0 1. 2 1. 4 1. 6 1. 8 2. 0 2. 2 Common Mode Input Voltage (V) In pu t O ffs et V ol ta ge (µ V) VDD = 1.8V TA = -40°C TA = +25°C TA = +85°C TA = +125°C -700 -600 -500 -400 -300 -200 -100 0 -0 .5 0. 0 0. 5 1. 0 1. 5 2. 0 2. 5 3. 0 3. 5 4. 0 4. 5 5. 0 5. 5 6. 0 Common Mode Input Voltage (V) In pu t O ffs et V ol ta ge (µ V) VDD = 5.5V TA = -40°C TA = +25°C TA = +85°C TA = +125°C -200 -150 -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Output Voltage (V) In pu t O ffs et V ol ta ge (µ V) VDD = 1.8V VCM = VSS VDD = 5.5V © 2009 Microchip Technology Inc. DS21733J-page 7 MCP6001/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF. FIGURE 2-7: Input Bias Current at +85°C. FIGURE 2-8: Input Bias Current at +125°C. FIGURE 2-9: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-10: PSRR, CMRR vs. Frequency. FIGURE 2-11: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-12: Input Noise Voltage Density vs. Frequency. 0% 2% 4% 6% 8% 10% 12% 14% 0 3 6 9 12 15 18 21 24 27 30 Input Bias Current (pA) Pe rc en ta ge o f O cc ur re nc es 1230 Samples VDD = 5.5V VCM = VDD TA = +85°C 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 50% 55% 0 15 0 30 0 45 0 60 0 75 0 90 0 10 50 12 00 13 50 15 00 Input Bias Current (pA) Pe rc en ta ge o f O cc ur re nc es 605 Samples VDD = 5.5V VCM = VDD TA = +125°C 70 75 80 85 90 95 100 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) PS R R , C M R R (d B ) PSRR (VCM = VSS) CMRR (VCM = -0.3V to +5.3V) VDD = 5.0V 20 30 40 50 60 70 80 90 100 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 Frequency (Hz) PS R R , C M R R (d B ) PSRR+ CMRR PSRR– VCM = VSS 10 100 1k 10k 100k -20 0 20 40 60 80 100 120 1.E- 01 1.E+ 00 1.E+ 01 1.E+ 02 1.E+ 03 1.E+ 04 1.E+ 05 1.E+ 06 1.E+ 07Frequency (Hz) O pe n- Lo op G ai n (d B ) -210 -180 -150 -120 -90 -60 -30 0 O pe n- Lo op P ha se (° ) 0.1 1 10 100 10k 100k 1M 10M Phase Gain 1k VCM = VSS 10 100 1,000 1.E-01 1.E+0 0 1.E+0 1 1.E+0 2 1.E+0 3 1.E+0 4 1.E+0 5Frequency (Hz) In pu t N oi se V ol ta ge D en si ty (n V/ √H z) 0.1 101 100 10k1k 100k DS21733J-page 8 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF. FIGURE 2-13: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-14: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Small-Signal, Non-Inverting Pulse Response. FIGURE 2-17: Large-Signal, Non-Inverting Pulse Response. FIGURE 2-18: Slew Rate vs. Ambient Temperature. 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) Sh or t C irc ui t C ur re nt M ag ni tu de (m A ) TA = -40°C TA = +25°C TA = +85°C TA = +125°C 1 10 100 1,000 1.E-05 1.E-04 1.E-03 1.E-02 Output Current Magnitude (A) O ut pu t V ol ta ge H ea dr oo m (m V) VDD – VOH 10µ 10m1m100µ VOL – VSS 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) Q ui es ce nt C ur re nt pe r a m pl ifi er (µ A ) VCM = VDD - 0.5V TA = +125°C TA = +85°C TA = +25°C TA = -40°C -0.08 -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 0.08 0.E+00 1.E-06 2.E-06 3.E-06 4.E-06 5.E-06 6.E-06 7.E-06 8.E-06 9.E-06 1.E-05 Time (1 µs/div) O ut pu t V ol ta ge (2 0 m V/ di v) G = +1 V/V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 Time (10 µs/div) O ut pu t V ol ta ge (V ) G = +1 V/V VDD = 5.0V 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Sl ew R at e (V /µ s) VDD = 5.5V VDD = 1.8V Rising Edge Falling Edge © 2009 Microchip Technology Inc. DS21733J-page 9 MCP6001/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, and CL = 60 pF. FIGURE 2-19: Output Voltage Swing vs. Frequency. FIGURE 2-20: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-21: The MCP6001/2/4 Show No Phase Reversal. 0.1 1 10 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) O ut pu t V ol ta ge S w in g (V P- P ) VDD = 5.5V 1k 10k 100k 1M VDD = 1.8V 1.E-12 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) In pu t C ur re nt M ag ni tu de (A ) +125°C +85°C +25°C -40°C 10m 1m 100µ 10µ 1µ 100n 10n 1n 100p 10p 1p -1 0 1 2 3 4 5 6 0.E+00 1.E-05 2.E-05 3.E-05 4.E-05 5.E-05 6.E-05 7.E-05 8.E-05 9.E-05 1.E-04 Time (10 µs/div) In pu t, O ut pu t V ol ta ge s (V ) VDD = 5.0V G = +2 V/V VIN VOUT DS21733J-page 10 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE 3.1 Analog Outputs The output pins are low-impedance voltage sources. 3.2 Analog Inputs The non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents. 3.3 Power Supply Pins The positive power supply (VDD) is 1.8V to 6.0V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. 3.4 Exposed Thermal Pad (EP) There is an internal electrical connection between the Exposed Thermal Pad (EP) and the VSS pin; they must be connected to the same potential on the Printed Circuit Board (PCB). MCP6001 MCP6001R MCP6001U MCP6002 MCP6004 Symbol DescriptionSC70-5, SOT-23-5 SOT-23-5 SOT-23-5 MSOP, PDIP, SOIC DFN 2x3 PDIP, SOIC, TSSOP 1 1 4 1 1 1 VOUT, VOUTA Analog Output (op amp A) 4 4 3 2 2 2 VIN–, VINA– Inverting Input (op amp A) 3 3 1 3 3 3 VIN+, VINA+ Non-inverting Input (op amp A) 5 2 5 8 8 4 VDD Positive Power Supply — — — 5 5 5 VINB+ Non-inverting Input (op amp B) — — — 6 6 6 VINB– Inverting Input (op amp B) — — — 7 7 7 VOUTB Analog Output (op amp B) — — — — — 8 VOUTC Analog Output (op amp C) — — — — — 9 VINC– Inverting Input (op amp C) — — — — — 10 VINC+ Non-inverting Input (op amp C) 2 5 2 4 4 11 VSS Negative Power Supply — — — — — 12 VIND+ Non-inverting Input (op amp D) — — — — — 13 VIND– Inverting Input (op amp D) — — — — — 14 VOUTD Analog Output (op amp D) — — — — 9 — EP Exposed Thermal Pad (EP); must be connected to VSS. © 2009 Microchip Technology Inc. DS21733J-page 11 MCP6001/1R/1U/2/4 NOTES: DS21733J-page 12 © 2009 Microchip Technology Inc. MCP6001/1R/1U/2/4 4.0 APPLICATION INFORMATION The MCP6001/2/4 family of op amps is manufactured using Microchip’s state-of-the-art CMOS process and is specifically designed for low-cost, low-power and general-purpose applications. The low supply voltage, low quiescent current and wide bandwidth makes the MCP6001/2/4 ideal for battery-powered applications. This device has high phase margin, which makes it stable for larger capacitive load applications. 4.1 Rail-to-Rail Inputs 4.1.1 PHASE REVERSAL The MCP6001/1R/1U/2/4 op amp is designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-21 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass quick ESD events within the specified limits. FIGURE 4-1: Simplified Analog Input ESD Structures. In order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the currents and voltages at the VIN+ and VIN– pins (see Absolute Maximum Ratings † at the beginning of Section 1.0 “Electrical Characteristics”). Figure 4-2 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN–) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pins. Diodes D1 and D2 prevent the input pins (VIN+ and VIN–) from going too far above VDD, and dump any currents onto VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. FIGURE 4-2: Protecting the Analog Inputs. It is also possible to connect the diodes to the left of resistors R1 and R2. In this case, current through the diodes D1 and D2 needs to be limited by some other mechanism. The resistors then serve as in-rush current limiters; the DC current into the input pins (VIN+ and VIN–) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS); see Figure 2-20. Applications that are high impedance may need to limit the usable voltage range. 4.1.3 NORMAL OPERATION The input stage of the MCP6001/1R/1U/2/4 op amps use two differential CMOS input stages in parallel. One operates at low common mode input voltage (VCM), while the other operates at high VCM. WIth this topology, the device operates with VCM up to 0.3V above VDD and 0.3V below VSS. The transition between the two input stages occurs when VCM = VDD – 1.1V. For the best distortion and gain linearity, with non-inverting gains, avoid this region of operation. 4.2 Rail-to-Rail Output The output voltage range of the MCP6001/2/4 op amps is VDD – 25 mV (minimum) and VSS + 25 mV (maximum) when RL = 10 kΩ is connected to VDD/2 and