JEDEC
STANDARD
Descriptive Designation System
for Semiconductor-device Packages
JESD30C
(Revision of JESD30-B)
SEPTEMBER 23, 2003
JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
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JEDEC Standard No. 30C
-i-
DESCRIPTIVE DESIGNATION SYSTEM
FOR SEMICONDUCTOR-DEVICE PACKAGES
Contents
Page
Foreword ii
1 Scope 1
2 Terms and definitions 2
3 Descriptive designation system for semiconductor-device packages 3
3.1 General 3
3.2 Mandatory fields 5
3.2.1 Package-body material 5
3.2.2 Package-specific features 6
3.2.3 Basic package designator 7
3.3 Optional fields 8
3.3.1 Package differentiator 8
3.3.2 Terminal-count suffixes 9
3.3.3 Supplemental-information field 9
3.4 New descriptive codes 9
Annexes
A Derivation of basic package designators and common names (normative) 10
A.1 Package outline style codes 10
A.2 Terminal-position prefix 11
A.3 Lead-form (or terminal shape) suffix 12
B Nominal package dimensions for use in the detailed information field (informative) 14
C Application of the descriptive designation system (informative) 15
C.1 Objective of the descriptive designation system 15
C.2 Common names 15
D Package classification (informative) 21
D.1 Major classification 21
D.2 Intermediate classification 21
D.3 Minor classification 21
Figures
1 Descriptive designation system for semiconductor-device packages 4
A.1 Illustrations of lead-form (or terminal-shape) 13
C.1 Illustrations of basic package designators 18
Tables
1 Prefixes for predominant package-body material 5
2 Codes for package-specific features 6
3 Codes for seated height and terminal pitch combinations 7
4 Three-letter basic package designators 7
5 Package differentiator suffix codes 8
A.1 Two-letter package outline style codes 10
A.2 Prefixes for terminal position 11
A.3 Suffixes for lead form (or terminal shape) 12
B.1 Nominal package dimensions 14
C.1 Descriptive designation system applications 15
D.1 Semiconductor-device package classifications 22
JEDEC Standard No. 30C
-ii-
Foreword
This standard establishes requirements for the generation of semiconductor-device package designators
for the Electronic Industries Alliance (EIA) and JEDEC Solid State Technology Association. These
requirements are intended to ensure that such designators are presented in as uniform a manner as
practicable irrespective of the devices in the packages.
Although this standard is considered to have international standardization implications, activity has not
progressed to the point where a valid comparison between the JEDEC standard and the international
documents can be made.
This revision of the standard incorporates many changes and a complete reorganization of
JESD30-B. The material contained in this standard was formulated under the cognizance of JEDEC JC-11
Committee on Mechanical (Package Outlines) Standardization with the assistance of JEDEC JC-10
Committee on Terms, Definitions, and Symbols, and approved by the JEDEC Board of Directors.
JEDEC Standard No. 30C
Page 1
DESCRIPTIVE DESIGNATION SYSTEM FOR SEMICONDUCTOR-DEVICE PACKAGES
(From JEDEC Board Ballot JCB-02-111, formulated under the cognizance of the JC-11 committee on
Mechanical (Package Outlines) Standardization.)
1 Scope
This standard describes a systematic method for generating universal descriptive designators for
semiconductor-device packages. The descriptive designator is intended to provide a useful
communication tool but has no implied control for assuring package interchangeability.
2 Terms and definitions
For the purposes of this standard, the following definitions shall apply:
can package: A generally cylindrical package whose terminals exit from one end parallel to the central
axis of the package.
chip carrier: A package whose chip cavity or mounting area occupies a major fraction of the package
area and whose terminals consist of metal pad surfaces (on leadless versions) or leads formed around
the sides and under the package or out from the package (on leaded versions).
NOTE The term “chip carrier” has been replaced by “quad flatpack” (for terminals on three or four sides) and
“small-outline package” (for terminals on one or two sides).
clamped package: A package, for high-current devices, in the form of a cylinder with a flat, circular high-
current terminal on each end, intended to be clamped against or between two busbars acting as heat
sinks.
disk-button package: A low-profile package shaped like a disk or button whose terminals usually exit
radially from the periphery of the package like spokes of a wheel or from the disk center.
fiber-optic package: A microcircuit package that has one or more fiber-optic connectors.
NOTE 1 The fiber-optic connectors are considered to be terminals.
NOTE 2 The terminals may exit from, or be attached to, any surface of the package and may be formed in a variety
of lead shapes.
flange-mount package: A package having a flange-mounted heat sink that is an integral part of the
package and provides mechanical mounting to a packaging interconnect structure or cold plate.
NOTE The terminals may exit from, or be attached to, any surface of the package.
flatpack package: A package whose leads project parallel to, and are designed primarily to be attached
parallel to, the seating plane.
NOTE The term “flatpack” has been replaced by “quad flatpack” (for terminals on three or four sides) and “small-
outline package” (for terminals on one or two sides).
footprint: The interconnect land pattern.
JEDEC Standard No. 30C
Page 2
2 Terms and definitions (cont’d)
grid-array package: A low-profile package whose terminals are located on one surface in a matrix of at
least three rows and three columns.
NOTE Terminals may be missing from some row-column intersections.
in-line module: A microelectronic assembly whose terminals consist of metal pad surfaces located on
one or both sides of a circuit board designed for insertion into an edge connector.
in-line package: A rectangular package having a single row or parallel rows of leads designed primarily
for insertion (through-hole) mounting perpendicular to the seating plane.
NOTE The leads may emerge from a single side or from two parallel sides with the leads formed to produce
parallel rows.
long-form package: A cylindrical or elliptical tubular package having terminal endcaps or axial leads.
microelectronic assembly: An assembly of unpackaged (uncased) microcircuits and/or packaged
microcircuits, which may also include discrete devices, so constructed on a packaging interconnect
structure that for the purpose of specification, testing, commerce, and maintenance, the package is
considered to be an indivisible component.
NOTE The passive and/or active discrete and microelectronic devices may be mounted on either one or two sides
of the packaging interconnect structure, and the external terminals usually exit from one side of the assembly. It is
possible to have a variety of package sizes, shapes, and external terminal forms.
microwave package: A package specially designed to provide device operation at microwave
frequencies.
NOTE The term “specially designed” applies, but is not limited, to microwave cavities or terminals with controlled
common-element impedance.
post-mount package: A package whose mechanical mounting device is a threaded stud, threaded hole,
or post for mounting to the packaging and interconnect structure or cold plate.
NOTE It is possible to have a variety of package sizes, shapes, and external terminal forms.
press-fit package: A round or elliptical package whose mechanical mounting area is pressed into the
packaging interconnect structure or cold plate for purposes of thermal and electrical connection.
press-pack: Synonym for “press-fit package”.
quad flatpack: A low-profile surface-mount package whose chip cavity or mounting area occupies a
major fraction of the package area and whose terminals are on three or four sides and consist of metal
pad surfaces (on leadless versions) or leads formed around the sides and under the package or out from
the package (on leaded versions).
NOTE The small-outline package is similar except for having terminals on only one or two (normally opposite) sides
of the package.
JEDEC Standard No. 30C
Page 3
2 Terms and definitions (cont’d)
small-outline package: A low-profile package whose chip cavity or mounting area occupies a major
fraction of the package area and whose terminals are on one or two (normally opposite) sides and consist
of metal pad surfaces (on leadless versions) or leads formed around the sides and under the package or
out from the package (on leaded versions).
NOTE 1 On leaded versions, the lead form is usually gull wing but other lead forms are possible.
NOTE 2 The quad flatpack is similar except for having terminals on three or four sides of the package.
special-shape package: A package whose outline style is not otherwise specified.
stud-mount package: Synonym for “post-mount package”.
terminal: An externally available point of connection. (Ref. JESD99.)
uncased chip: A chip (die) that has not been encapsulated.
NOTE Usually the chip has bonding pads, bumps, etc. that may be bonded to pads or lands on a lead-frame, tape,
substrate, or printed wiring board.
vertical surface-mount package: A surface-mount package that is intended to be mounted
perpendicular to the seating plane.
NOTE The package may include supporting posts (for insertion through the seating surface) or pedestals (for
attachment to the seating surface).
3 Descriptive designation system for semiconductor-device packages
3.1 General
The standard descriptive designation system is a method for identifying the physical features of an
electronic-device package. The system is predicated upon a mandatory field (shown below) consisting of
a three-letter basic package designator that indicates the package outline style and terminal position or
form, preceded by fields to indicate package-body material and any package-specific features.
This mandatory package designator may be extended, through the use of optional, user-selected fields, to
provide additional package information such as any required package differentiator, terminal count and
quantity of terminal positions, and detailing information, provided this detailing information is separated
from the descriptive designator by a slash (/).
JEDEC Standard No. 30C
Page 4
3.1 General (cont’d)
No more than 30 characters (including dashes, parentheses, and the slash) shall be used for any package
designator.
Mandatory Optional
TS – P DSO 2 – 44(50) / 5.3x10.2-1.27
Supplemental Information
(3.3.3, annex B)
Terminal Count (Terminal Positions)
(3.3.2)
Package Differentiator
(3.3.1, Table 5)
Basic Package Designator (three letters)
(3.2.3, Table 4, annex A)
Package-Body Material (one or two letters)
(3.2.2, Table 3)
Package-Specific Features (zero to six letters)
(3.2.1, Tables 1 and 2)
Figure 1 — Descriptive designation system for semiconductor-device packages
JEDEC Standard No. 30C
Page 5
3.2 Mandatory fields
3.2.1 Package-specific features
Package-specific features are described through the use of a prefix comprising codes for applicable
functions in the order listed in Table 1. For example, the package-specific features prefix for a package
having a 1.3-mm nominal seated height, a 0.6-mm nominal terminal pitch, and an integral heat slug is
“HTS”. Note that all package-specific features precede the package material code and the three-letter
basic package designator (see Tables 3 and 4), and are separated from them by a dash (-).
Table 1 shows package-specific-feature codes. Table 2 illustrates the codes for seated height and
terminal pitch.
Table 1 — Codes for package-specific features
Function Code Package-specific feature (relevant dimensions)
Shape R Rectangular (used only when needed to differentiate from square packages)
Added feature H Integral heat slug
A Piggyback assembly
TP Test-pad leads (≤0.30 mm pitch)
Seated height blank Standard (>1.70 mm)
(Profile) L Low (>1.20 mm and ≤1.70 mm)
T Thin (>1.00 mm and ≤1.20 mm)
V Very thin (>0.80 mm and ≤1.00 mm)
W Very, very thin (>0.65 mm and ≤0.80 mm)
U Ultra thin (>0.50 mm and ≤0.65 mm)
X Extremely thin (≤0.50 mm)
Terminal pitch E Enlarged [>0.100 in (2.54 mm) for DIP, SIP, PGA]
Enlarged (>1.50 mm for BGA, LGA)
Enlarged (>1.27 mm for DSO, SOJ)
Enlarged (>1.00 mm for QFP)
(blank) Standard [>0.070 in (1.78 mm) and ≤0.100 in (2.54 mm) for DIP, SIP, PGA)
Standard (≥1.00 mm and ≤1.50 mm for BGA, LGA)
Standard (>0.65 mm and ≤1.27 mm for DSO, SOJ)
Standard (>0.50 mm and ≤1.00 mm for QFP)
Standard (≥0.40 mm and ≤1.00 mm for FQFP)
S Shrink [≤0.070 in (1.78 mm) for DIP, SIP, PGA]
Shrink (≤0.65 mm for DSO)
F Fine (<1.00 mm for BGA, LGA)
Fine (≤0.50 mm for QFP)
Other I Interstitial pitch (staggered leads)
NOTE Certain packages (DIP, SIP, PGA) traditionally designed using inch dimensioning should continue to use
inch dimensions.
JEDEC Standard No. 30C
Page 6
3.2 Mandatory fields (cont’d)
3.2.1 Package-specific features (cont’d)
Table 2 — Codes for seated height and terminal pitch combinations
Package seated height
Nominal terminal
pitch Standard Low Thin Very thin Very very thin
Ultra
thin
Extremely
thin
Enlarged E LE TE VE WE UE XE
Standard (blank) L T V W U X
Shrink S LS TS VS WS US XS
Fine F LF TF VF WF UF
3.2.2 Package-body material
A single-letter or two-letter prefix is used to identify the predominant package-body material. The
package-body-material prefix is the second field of the descriptive designator and must not be omitted.
Table 3 shows package-body-material prefix codes.
Table 3 — Prefixes for predominant package-body material
Code Material
C
G
L
M
MC
MP
MT
P
PC
PT
R
S
SC
SP
ST
T
X
Ceramic, metal-sealed, cofired
Ceramic, glass-sealed
Glass
Metal
Metal-alloy-capped ceramic-based interposer
Metal-alloy-capped plastic-based interposer
Metal-alloy-capped flex-tape interposer
Plastic (including epoxy)
Plastic on a ceramic-based interposer
Plastic on a flex-tape interposer
Plastic or epoxy-glass printed wiring board
Silicon
Exposed silicon on a ceramic-based interposer
Exposed silicon on a plastic-based interposer
Exposed silicon on a flex-tape interposer
Tape (usually polyimide), where tape is an integral part of the package
Other
If the package-body material is other than one of those defined in Table 3, the letter “X” may be used to
signify a special or new material and shall later be replaced with a JEDEC-approved code.
JEDEC Standard No. 30C
Page 7
3.2 Mandatory fields (cont’d)
3.2.3 Basic package designator
The basic package designator is a three-letter code comprising a two-letter package outline style code
(see Table A.1) and either a preceding terminal-position code (see Table A.2) or a succeeding lead-form
(or terminal-shape) code (see Table A.3). Complete three-letter basic package designators are described
in Table 4.
Table 4 — Three-letter basic package designators
Basic package
designator
Common
package name Description
BGA Ball grid array A grid-array package with balls or bumps on the bottom face.
CGA Column grid array A grid-array package with columns on the bottom face.
DIL Dual in-line The preferred package designator is DIP.
DIM Dual in-line
module
An in-line module with terminal pad surfaces on both surfaces of
the circuit board.
DIP Dual in-line
package
An in-line package with leads in two parallel rows for through-hole
insertion into the seating plane.
DSO Small-outline
package
A small-outline package with gull-wing-shaped leads on only two
sides.
LCC Leaded or
leadless chip
carrier
Replaced by xFP and SOx.
LGA Land grid array A grid-array package with terminal lands on the bottom face.
PGA Pin grid array A grid-array package with pins protruding from the bottom face.
QCC – Replaced by QFP and SOx.
QFF – A flat-type package with flat unformed leads on four sides.
QFJ – A flat-type package with J-shaped leads on four sides.
QFN – A flat-type package with terminal pads (no leads) on four sides.
QFP Quad flatpack A flat-type package with gull-wing-shaped leads on four sides.
QIL Quad in-line The preferred package designator is QIP.
QIP Quad An in-line package with zig-zag leads in four parallel rows.
SIL Single in-line The preferred package designator is SIP.
SIM Single in-line
module
An in-line module with terminal pads on only one surface of the
circuit board.
SIP Single in-line
package
An in-line package with leads on only one side.
SOF – A small-outline package with unf
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