Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
175 Operating Temperature
Lower Leakage Current : 10 A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.032 (Typ.)
Advanced Power MOSFET
Thermal Resistance
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
R JC
R CS
R JA
/W
Characteristic Max. UnitsSymbol Typ.
FEATURES
Absolute Maximum Ratings
Drain-to-Source Voltage
Continuous Drain Current (TC=25 )
Continuous Drain Current (TC=100 )
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (TC=25 )
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
Characteristic Value UnitsSymbol
IDM
VGS
EAS
IAR
EAR
dv/dt
ID
PD
TJ , TSTG
TL
A
V
mJ
A
mJ
V/ns
W
W/
A
VDSS V
TO-3P
1.Gate 2. Drain 3. Source
3
2
1
m
W
O1
O2
O3
OC
OC
O1
O1
OC
OC
OC
OC
OC
q
q
q
IRFP150A
BVDSS = 100 V
RDS(on) = 0.04
ID = 43 A
100
43
30.4
170
740
43
19.3
6.5
193
1.28
- 55 to +175
300
0.78
--
40
--
0.24
--
W
20 +_
©1999 Fairchild Semiconductor Corporation
Rev. B
N-CHANNEL
POWER MOSFET
Electrical Characteristics (TC=25 unless otherwise specified)
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain(“Miller”) Charge
gfs
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
BVDSS
BV/ TJ
VGS(th)
RDS(on)
IGSS
IDSS
V
V/
V
nA
A
pF
ns
nC
--
--
--
--
--
--
--
--
--
--
--
--
--
VGS=0V,ID=250 A
ID=250 A See Fig 7
VDS=5V,ID=250 A
VGS=20V
VGS=-20V
VDS=100V
VDS=80V,TC=150
VGS=10V,ID=21.5A
VDS=40V,ID=21.5A
VDD=50V,ID=40A,
RG=6.2
See Fig 13
VDS=80V,VGS=10V,
ID=40A
See Fig 6 & Fig 12
Drain-to-Source Leakage Current
VGS=0V,VDS=25V,f =1MHz
See Fig 5
Source-Drain Diode Ratings and Characteristics
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
IS
ISM
VSD
trr
Qrr
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
--
--
--
--
--
A
V
ns
C
Integral reverse pn-diode
in the MOSFET
TJ=25 ,IS=43A,VGS=0V
TJ=25 ,IF=40A
diF/dt=100A/ s
D D
OC
W
W
m
O4
O5
OC m
m
OC
O4
O4
O4
W
OC
m
OC
O5O4
m
m
O4
O1
IRFP150A
100
--
2.0
--
--
--
--
--
0.11
--
--
--
--
--
420
185
17
20
80
45
75
13.2
34.8
--
--
4.0
100
-100
10
100
0.04
--
2270
485
215
50
50
160
100
97
--
--
28.34
1750
--
--
--
135
0.65
43
170
1.6
--
--
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
L=0.6mH, IAS=43A, VDD=25V, RG=27 , Starting TJ =25
ISD 40A, di/dt 470A/ s, VDD BVDSS , Starting TJ =25
Pulse Test : Pulse Width = 250 s, Duty Cycle 2%
Essentially Independent of Operating Temperature
<_ <_<_
<_
O1
O2
O3
O4
O5
W oC
oCm
m
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
IRFP150A
10-1 100 101
100
101
102
@ Notes :
1. 250 ms Pulse Test
2. TC = 25
oC
VGS
Top : 1 5 V
1 0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
I D
,
D
ra
in
C
ur
re
nt
[A
]
VDS , Drain-Source Voltage [V]
2 4 6 8 10
100
101
102
25 oC
175 oC
- 55 oC
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 ms Pulse Test
I D
,
D
ra
in
C
ur
re
nt
[A
]
VGS , Gate-Source Voltage [V]
0 25 50 75 100 125 150 175
0.00
0.01
0.02
0.03
0.04
0.05
0.06
@ Note : TJ = 25
oC
VGS = 20 V
VGS = 10 V
R D
S(
on
) ,
[
W
]
Dr
ai
n-
So
ur
ce
O
n-
Re
si
st
an
ce
ID , Drain Current [A]
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
100
101
102
175 oC
25 oC
@ Notes :
1. VGS = 0 V
2. 250 ms Pulse TestI
DR
,
R
ev
er
se
D
ra
in
C
ur
re
nt
[A
]
VSD , Source-Drain Voltage [V]
100 101
0
1000
2000
3000
Ciss= Cgs+ Cgd (Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
C oss
C iss
Ca
pa
ci
ta
nc
e
[
pF
]
VDS , Drain-Source Voltage [V]
0 10 20 30 40 50 60 70 80
0
5
10
VDS = 80 V
VDS = 50 V
VDS = 20 V
@ Notes : ID =40.0 AV G
S
,
Ga
te
-S
ou
rc
e
Vo
lt
ag
e
[
V]
QG , Total Gate Charge [nC]
N-CHANNEL
POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
Fig 11. Thermal Response
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
PDM
t1
t2
IRFP150A
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. VGS = 0 V
2. ID = 250 mA
BV
DS
S
,
(N
or
ma
li
ze
d)
Dr
ai
n-
So
ur
ce
B
re
ak
do
wn
V
ol
ta
ge
TJ , Junction Temperature [
oC]
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
@ Notes :
1. VGS = 10 V
2. ID = 20.0 A
R D
S(
on
)
,
(N
or
ma
li
ze
d)
Dr
ai
n-
So
ur
ce
O
n-
Re
si
st
an
ce
TJ , Junction Temperature [
oC]
100 101 102
10-1
100
101
102
103
10 ms
DC
100 ms
1 ms
10 ms
@ Notes :
1. TC = 25
oC
2. TJ = 175
oC
3. Single Pulse
Operation in This Area
is Limited by R DS(on)
I D
,
D
ra
in
C
ur
re
nt
[A
]
VDS , Drain-Source Voltage [V]
25 50 75 100 125 150 175
0
10
20
30
40
50
I D
,
D
ra
in
C
ur
re
nt
[A
]
Tc , Case Temperature [
oC]
10-5 10-4 10-3 10-2 10-1 100 101
10-2
10-1
100
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. Z
qJ C(t)=0.78
oC/W Max.
2. Duty Factor, D=t1/t2
3. TJM-TC=PDM*ZqJ C(t)
Z q
JC
(t
)
,
T
he
rm
al
R
es
po
ns
e
t1 , Square Wave Pulse Duration [sec]
N-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resistive Switching Test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
EAS = LL IAS2----2
1 --------------------
BVDSS -- VDD
BVDSS
Vin
Vout
10%
90%
td(on) tr
t on t off
td(off) tf
Charge
VGS
10V
Qg
Qgs Qgd
Vary tp to obtain
required peak ID
10V
VDDC
LL
VDS
ID
RG
t p
DUT
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
VDD
( 0.5 rated VDS )
10V
Vout
Vin
RL
DUT
RG
3mA
VGS
Current Sampling (I G)
Resistor
Current Sampling (I D)
Resistor
DUT
VDS
300nF
50K
200nF12V
Same Type
as DUT
“ Current Regulator ”
R1 R2
W
IRFP150A
N-CHANNEL
POWER MOSFET
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
--
L
I S
DriverVGS
RG Same Type as DUT
VGS • dv/dt controlled by “RG”
• IS controlled by Duty Factor “D”
VDD
10V
VGS
( Driver )
I S
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Vf
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =
Gate Pulse Width
Gate Pulse Period
--------------------------
IRFP150A
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
UHC™
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