nullnullFurnace IntroductionnullContentDiffusion Process Over view:
Furnace (Hardware) configuration
AP/LP Process Application:
Monitor Items:nullDiffusion Process Over viewnullHDPOX -- Pad-ox, Sac-ox,Zero-OX
HDFOX – Zero-ox, Well-drive-in, Field-ox,
Trench-lining-ox
HDGOX -- Gate-ox
HDANN-- Anneal
HDALY -- Alloy
HDPMC -- Polyimide-curing
HDBPF-- Flow/Reflow AP Furnace: LP Furnace: HDDPY -Dope-poly/Rugged-poly, HDUPY-Flat-poly,
HDSIN - Thick-SiN, HDTSN- Thin-SiN,
HDTEOS -TEOS, HTO, Diffusion Process Over viewnullFurnace Hardware configurationnullOperation panel - This is the operation panel of the system controller.
Gas flow chart panel - This panel indicates the paths of the gases and the locations of their valves.
Heater chamber - Generates heat required for the process.
Carrier I/O port(SMIF) - Loads and unloads the wafer carriers placed on it by an operator.
Carrier transfer - Transports a wafer carrier between the carrier I/0 port and the carrier stage, and between the carrier stage and the transfer stage. Furnace Hardware configurationnullCarrier stage - The carrier stages are used to store the wafer carriers.
Transfer stage - This unit is to lock the wafer carrier in place so as the wafer transfer mechanism can transfer wafers to and from the wafer carrier.
Wafer transfer - This unit is to transfer the wafers between the wafer carrier on the transfer stage and the boat. This is basically a robot with 5-fork assembly.
Boat elevator - It is to insert and withdraw the boat to/from the process tube. For LPCVD furnaces it also provide the boat rotary mechanism, which is to rotate the boat during process to improve the uniformity of the deposited film. Furnace Hardware configurationnullAuto-shutter - Closes the furnace mouth when the boat is fully out of the process tube, to prevent the heat from the furnace heating up the loading area.
External torch unitFurnace Hardware configurationnullSINFurnace Hardware configurationnull Wafer on Boat Type
SD: Top/BTM
Monitor wafer: 3pics
ED:
Product :100pcs-120pcs
Furnace Hardware configurationnullOxidation Kinetics:
Reaction Formula
Si + O2 SiO2 Dry Oxide (Temp: 700~1200oC)
Si + 2H2O SiO2 + 2H2 Wet Oxide (Temp: 700~1200oC)
Linear-Parabolic Model (>300A)
Xo2 + AXo= B (t+) Xo / (A/2)=[ 1 + (t+)/(A2/4B) ]1/2 -1
Case 1. (t+) << A2/4B Xo = B (t+) /A ( Linear-short t/L T))
Case 2. t >> A2/4B Xo2 = B t ( Parabolic-long t,H T))
AP Process ApplicationnullPurpose of Oxide
1) Used as a mask against ion implantation and diffusion2) Isolation of individual devicesAP Process ApplicationnullUsed as gate oxide and capacitor dielectric in MOS devices
4) Used as Tunneling oxide in EEPROM
AP Process ApplicationnullZero-ox:
Application:
- Pre-process for Alignment/Laser mark
Purpose:
- Prevent PR direct contact with silicon
- make particle (from laser mark) easy removed
Well-drive-in:
Application:
- P-Well, N-Well formation
Purpose:
- Drive in dopant (P, B) at high temperature to form P, N-WellAP Process ApplicationnullPad-ox:
Application:
- Buffer layer
Purpose:
- Cushion the transition of stresses between silicon substrate
and Si3N4 interface due to the different thermal expansion
coefficient
AP Process ApplicationnullField-ox:
Application:
- LOCOS (Local Oxidation of Silicon)
Purpose:
- Isolation of integrated circuits
Trench-lining-ox:
Purpose:
- Buffer oxideAP Process Applicationnull
Sac-ox:
Application:
- Sacrificial-ox grown before gate-ox
Purpose:
- Eliminate the defects caused by Kooi Effect
- Prevent silicon surface contamination by Vt-imp, or PR.
- Increase scattering for Vt-imp
Wsix Anneal:
Purpose:
- Transform Wsix from tetragonal to hexagonal (W-rich)
for reducing the resistivity
AP Process ApplicationnullGate-ox:
Purpose:
- Gate dielectric
Breakdown Strength:
- 11~14 MV/cm (1.1~1.4 V/10A)
Oxide Charge:
- Fixed oxide charge, Qf
- Mobile ionic charge, Qm
- Interface trapped charge, Qit
- Oxide trapped charge, Qd
AP Process ApplicationnullPre-S/D-ox:
Purpose:
- Screen oxide for preventing channel effect
Alloying:
Purpose:
- Diffuse in the H to react with Si dangling bonds on gate-ox
and silicon substrate interface for GOI concern.
Polyimide-curing:
Purpose:
- Drive out the solvent in polyimide
Flow/Reflow:
Purpose:
- ILD Planarization
AP Process ApplicationnullFTP-WVG-LPAP Process ApplicationnullTo ExhaustVV1VV2MVSVPumping lineN2NH3DCSMainfoldOuter TubeInner TubeColdTrapBoatT/CPedestal InjectorSSVSVP.SW1IV2Pumping line moduleExhaust line moduleGas line moduleExhaust lineLP Process ApplicationnullLPCVD Thick SiN3SiH2Cl2 + 4NH3 Si3H4 + 6 HCl + 6H2
NH3+HCL---- NH4Cl(by –product)
Reaction Formula: Reaction Temperature: 650oC, 760oC, 780oC Reaction Pressure: 0.2 Torr Reaction Gas: SiH2Cl2 ,NH3 Application:
- OD-defined, Spacer/LinerLP Process ApplicationnullLPCVD Thin SiN3SiH2Cl2 + 4NH3 Si3H4 + 6 HCl + 6H2
HCL+NH3 NH4CL (by-product) Reaction Formula: Reaction Temperature: 650degC, Reaction Pressure: 0.2 TorrReaction Gas : SiH2Cl2 , NH3 Application:
- ONO Capacitance, Composite SpacerLP Process ApplicationnullLPCVD TEOSSi(OC2H5)4 SiO2 + By-product
TetraEthylOrthoSilicate Reaction Formula: Reaction Temperature: 650oC, 680oC Reaction Pressure: 0.3-0.4 Torr Reaction Gas : Si(OC2H5)4 ,N2, O2 Application:
- Hard Mask, Spacer/LinerLP Process ApplicationnullLPCVD HTO (SiH2Cl2 Base)SiH2Cl2 + 2N2O SiO2 + 2HCl + 2N2 Reaction Formula: Reaction Temperature: 800oC Reaction Pressure: 0.18 Torr Reaction Gas : SiH2Cl2 : N2O Application:
- SpacerLP Process ApplicationnullLPCVD FLAT-POLYSiH4 Si(poly) + 2H2 Reaction Formula: Reaction Temperature: 620oC Reaction Pressure: 0.11 Torr, 0.2 Torr Reaction Gas Flow: SiH4(B) : SiH4(C) :SiH4(T)
Application:
- Gate electrode, Resistor, ConductorLP Process ApplicationnullLPCVD AMORPHOUS SISiH4 Si(amorphous) + 2H2 Reaction Formula: Reaction Temperature: 545oC, 550oC Reaction Pressure: 0.085 Torr Reaction Gas Flow: SiH4(B) : SiH4(C) :SiH4(T)
Application:
- Gate electrodeAA Spacer 540C APY950ALP Process ApplicationnullLPCVD DOPE-POLYSiH4 Si(Dope-poly) + 2H2
PH3 Reaction Formula: Reaction Temperature: 530oC, 540oC Reaction Pressure: 1 Torr, 0.375 Torr Reaction Gas Flow: SiH4
PH3(B) :PH3(C) :PH3(T) = depend on recipe Application:
- Gate electrode, ConductorLP Process ApplicationnullGate Poly ( P1) 800+/-80A (530C, 8.0E20)POLY4 DEP( P4) 720+/-60A, 530C, 1.14E21RUGGED POLY( P1) 570C, 530+/-60A Reflectivity: 0.43+/-0.05BOTTOM PLATE POLY DEP 300+/-30A, 530C, 1.14E21Plug Poly ( P2) 3000+/-300A (Q time: 8 hrs) 530C, 3E20TOP OXIDATION 800C, CW THK: 200+/-20ACAPACITOR SIN DEP (Q time: 4 hrs) FTP furance, 650C, 49+/-4ALP Process ApplicationnullLP Process ApplicationnullDielectric layer
(thickness = d)Dielectric layer
(thickness = d)STISTIDielectric layer
(thickness = d)STISTInon-selective P3 Poly deposition (dope-poly tube)
resist coat
P3 CMP
HSG formation (selective HSG tube)
PH3 anneal (dope-poly tube)
P3 Poly deposition(In-situ HSG tube)
HSG formation (seeding/anneal)
PH3 anneal
resist coating
Poly CMP
LP Process ApplicationSelective approachnullLP FURNACE
SOG-curing/Baking
Purpose:
- Drive out the solvent in SOG or DIW absorbed in Via
Process Temperature: 420oC, 300oC
Process Pressure: 0.25 Torr
Process Gas Flow: N2 = 200sccm or 500sccm
LP Process ApplicationnullMonitor Items Particle:
- Frequency: AP furnace: 1 time/ week (TLC-PRG)
(ADGOX furnace: 2 times/week)
LP furnace: every run
- Tool: Excite
Thickness: (Furnace) or RI:
- Frequency: every run of recipe with thickness
- Tool: OP3290; Rudolph S200; KT F5X
P concentration:
- Frequency: Dope-poly/Rugged poly every run
- Tool: XRF/OP3290nullMonitor Items Gate -ox DL/LT, Fe concentration, Qsc:
- Frequency:
Gate-oxide / twice per week(TLC-PRG)
Oxide furnace / weekly
- Tool: SDI FAaST230
Gate -ox Vbd,TDDB:
- Frequency:
Gate-oxide / weekly (short loop)
Oxide furnace / New EQ
- Tool: Reliability Lab tool
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