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C8051F电路板设计说明 Preliminary Rev. 0.1 11/06 Copyright © 2006 by Silicon Laboratories AN203 AN203 C8051FXXX PRINTED CIRCUIT BOARD DESIGN NOTES 1. Introduction The tips and techniques included in this application note will help to ensure successful printed circuit board (PC...

C8051F电路板设计说明
Preliminary Rev. 0.1 11/06 Copyright © 2006 by Silicon Laboratories AN203 AN203 C8051FXXX PRINTED CIRCUIT BOARD DESIGN NOTES 1. Introduction The tips and techniques included in this application note will help to ensure successful printed circuit board (PCB) design. Problems in design can result in noisy and distorted analog measurements, error-prone digital communications, latch-up problems with port pins, excessive electromagnetic interference (EMI), and other undesirable system behavior. 1.1. Key Points This document includes the following: „ Power and ground circuit design tips. „ Analog and digital signal design recommendations with special tips for traces that require particular attention, such as clock, voltage reference, and the reset signal traces. „ Special requirements for designing systems in electrically noisy environments. „ Techniques for optimal design using multilayer boards. „ A design checklist. 1.2. About this Document The methods presented in this application note should be taken as suggestions which provide a good starting point in the design and layout of a PCB. It should be noted that one design rule does not necessarily fit all designs. It is highly recommended that prototype PCBs be manufactured to test designs. For further information on any of the topics discussed in this application note, please read the works cited in "References" on page 20. 2. Power and Ground All embedded system designs have a power supply and ground circuit loop that is shared by components on the PCB. The operation of one component can affect the operation of other components that share the same power supply and ground circuit [1]. 2.1. Power Supply Circuit The goal of an embedded system’s power supply is to maintain a voltage within a specified range while supply- ing sufficient current. While an ideal power supply would maintain the same voltage for any possible current draw, real world systems exhibit the following non-ideal behaviors: „ A change in current and its associated noise caused by one device affects other devices attached to the same power supply net. „ A change in current draw affects the voltage of the power net. „ Improper use of voltage regulator devices can result in supply voltage instability. Figure 1. Typical Components of a PCB Power Supply Relevant Devices This application note applies to the following devices: C8051Fxxx IC Bulk Decoupling and Bypass Capacitors Voltage Regulator IC Circuit Conductor: Traces or Power Planes Local Decoupling and Bypass Capacitors PCB Power Connection AN203 2 Preliminary Rev. 0.1 A typical power supply circuit is shown in Figure 1. The circuit consists of the following: „ A PCB power supply connection with decoupling and filter components. „ Voltage regulators that maintain voltage within a required range while supplying sufficient current to all components served. „ Voltage supply bulk decoupling and bypass capacitors. „ Power and supply circuit traces or a power supply plane that distributes power to the components. „ Local decoupling and bypass capacitors at each integrated circuit (IC). „ Optional power supply filters placed between different power supply circuits. Design tips for each of these components can be found in the following subsections. For a detailed discussion on capacitors, see "Appendix B—Capacitor Choice And Use" on page 17. 2.1.1. Voltage Regulator A voltage regulator takes an input voltage from a source external to the system and outputs a defined voltage that can power components on the circuit board. Two common types of voltage regulators are dc-dc convert- ers and low-dropout regulators. When deciding on a voltage regulator, always review the regulator datasheets to match component specifications with sys- tem requirements. 2.1.1.1. Switched Capacitor DC-DC Converters The high efficiency of this type of regulator makes it an ideal choice for designs where power conservation is an issue, such as battery-powered applications. However, switching supplies introduce high-frequency noise to the power supply net. This noise can be reduced by filtering and by adding bypass capacitors. “2.1.2. Power Supply Bulk Decoupling and Bypassing” discusses these design techniques in detail. On boards using this type of regulator, ADC performance is minimally affected by power supply noise by synchronizing the ADC’s sam- pling rate with the power supply’s switch time. 2.1.1.2. Low-Dropout Regulators Low-Dropout Regulators (LDOs) are less efficient than dc-dc converters, but they also introduce less noise into the power circuit. Silicon Laboratories’ target boards typically use a low-dropout regulator, which maintains voltage within the microcontroller’s specified range of 2.7–3.6 V while providing up to 500 mA of current. 2.1.2. Power Supply Bulk Decoupling and Bypassing Noise can be introduced into the power circuit from the voltage regulator, from ICs connected to the net, and from electromagnetic noise that couples into the power supply trace loops. Power supply “bulk” decoupling capacitors help to minimize the effects of noise and pro- vide other benefits to the circuit as well. Figure 2 shows a typical decoupling circuit design. Large bulk capacitors improve performance during low- frequency fluctuations in supply current draw by provid- ing a temporary source of charge. These capacitors can supply charge to local IC decouple/bypass capacitors. See “2.1.3. IC Decoupling and Bypassing” for more information. Many voltage regulators maintain their voltage by using a negative feedback loop topology that can become unstable at certain frequencies. A capacitor placed at the regulator’s output can prevent the voltage supply from becoming unstable. Check the regulator’s data sheet for recommended capacitor specifications. Bulk decoupling capacitors should be placed close to the output pin of the voltage regulator. Typically, the power supply decoupling capacitance value should be 10 times that of the total capacitance of the decoupling capacitors local to each IC. Tantalum or electrolytic capacitors are commonly used for bulk decoupling. Figure 2. PCB Power Supply Circuit with Decoupling, Bypassing, and Isolation Voltage Regulator 10 µF Tantalum or Electrolytic 0.1 µF Ceramic or Metalised Film Stability Capacitor for LDO ANALOG + VOLTAGE SUPPLY 2 ohm Wire-wound Resistor DIGITAL + VOLTAGE SUPPLY 10 µF Tantalum or Electrolytic AN203 Preliminary Rev. 0.1 3 To help filter high-frequency digital and EMI noise, a bypass capacitor with a capacitance that is one or two orders of magnitude smaller than the bulk decoupling capacitor should be placed in parallel with the bulk decoupling capacitor. The lower value capacitor shunts high-frequency noise coupled on the power supply traces to ground due to its low impedance in the higher frequency range. 2.1.3. IC Decoupling and Bypassing As digital logic gates of ICs switch from one state to another, the IC’s current draw fluctuates at a frequency determined by the logic state transition rate or “rise time”. These changes cause the power supply voltage to fluctuate because the traces connecting the net have a characteristic impedance. The circuit’s impedance can be lowered by adding capacitance to the power supply circuit that provides a low-impedance path to ground for high frequencies. See "Appendix A—Rise Time-Related Noise" on page 15 for a more detailed explanation. Figure 3. Minimize Loop Area between Power and Ground The loop area from the voltage supply pin to decoupling capacitor to ground should be kept as small as possible by placing the capacitor near the power supply pin and ground pin of the device. For an example layout of decoupling capacitors, see Figure 3. Figure 4. Voltage Supply Filter Examples 2.1.4. Power Supply Filtering Filters can be added to the power supply circuit to pro- vide components with further immunity to high-fre- quency noise. Figure 4 shows two commonly used low- pass filter topologies. LC filters force the noise voltage to appear across the inductance rather than across the device or main power supply circuit. A ferrite bead can be used to provide the inductance. Since LC filters are reactive, they can actu- ally increase noise at the filter’s resonant frequency, and the noise across the inductor increases the EMI radiated by the circuit [1]. RC filters dissipate the noise by converting it to heat. Therefore, the circuit radiates less EMI compared to LC filters [1]. However, RC filters create a larger dc voltage drop than LC filters in the supplied voltage for a given fil- tering capability. RC filters are typically less expensive than LC filters. Figure 5. Filtering Analog Power Supply Vias To Ground Plane Voltage Supply Pin Mixed-Signal Device Ground Pin Minimize loop area between VDD and GND R-C Voltage Supply Filter Inductor may radiate EMI L + - Vnoise R Noise dissipated as heat in resistor L-C Voltage Supply Filter Decoupling Caps ANALOG + VOLTAGE SUPPLY DIGITAL + VOLTAGE SUPPLY Resistor, Inductor, or Ferrite Bead Voltage Regulator AN203 4 Preliminary Rev. 0.1 2.1.5. Filtering Considerations for Mixed-Signal ICs Mixed-signal embedded systems have both analog and digital voltage supplies that often share a common regu- lator. Through this shared power net, high-frequency digital noise can couple into the analog circuit and cor- rupt analog measurements. Filtering or isolating the analog power circuit can eliminate this coupling. In-series inductance provides the most effective isola- tion from high-frequency noise. The inductance should be placed between the analog and digital power supply circuits, with the analog circuit closest to the voltage regulator. If, due to cost or lack of availability, it is not practical to use an inductor, a low value (~2 Ω) wire- wound resistor can also be used because of the resis- tor’s inherent “parasitic” inductance. Figure 5 shows an example of analog power supply filtering. PCBs should always be designed with a place for bypass capacitor(s), in case they are needed, and removed or tested with different capacitor values should the PCB have a large amount of digital noise coupling into analog circuits. 2.2. Ground Circuits The ground circuit can introduce noise to an embedded system and affect components. An ideal ground circuit is “equipotential”, meaning that the voltage of the circuit does not change regardless of the current. Real-world ground circuits have a characteristic impedance and experience changes in voltage with changes in current. Careful PCB design can minimize this non-ideal behav- ior to create a ground circuit that provides a low imped- ance return path for current. 2.2.1. Designing with a Ground Plane While some systems connect components to a ground circuit through wires or traces, but most designs use a ground plane in which the PCB’s components connect their ground pins to a common conductive plane. Design with a ground plane is highly recommended for two reasons: „ The return current noise of one device has less effect on other components when sharing ground in a parallel configuration. „ Short connections to ground minimize current return path inductance, which can induce large voltage swings in ground. 2.2.2. Ground Plane Fill A ground plane should cover as much of the board as possible, even in spaces between devices and traces. “Islands” of copper formed between traces or devices should always be connected to ground and should never be left floating. Spreading the ground plane across the board also aids in noise dissipation and shields traces. If possible, the ground plane should also be placed under the MCU package. 2.2.3. Separate Mixed-Signal Ground Planes Separating the analog current return path from the nois- ier digital current return path can improve analog mea- surements. Ground isolation can also improve performance in boards connected to industrial or noisy systems (See 5. "Isolation And Protection" on page 11). Separate ground planes should be connected in only one location, usually near the power supply. Figure 6 shows the use of a split analog and digital ground circuit example. AN203 Preliminary Rev. 0.1 5 Figure 6. Using Split Analog and Digital Ground Planes If possible, the mixed-signal MCU should be placed entirely in the analog ground plane. The MCU may also reside over both planes, with the divide running under the device, as shown in Figure 7. Mixed-Signal MCU (over analog plane) Digital IC Digital IC Line Driver Analog IC Power Supply Tie Ground Planes in one place, close to the power supply Digital (High-Frequency) Ground PlaneAnalog (Low-Frequency) Ground Plane Analog Ground Currents Digital Ground Currents High frequency digital return currents can cross ground plane separation due to capacitance between the planes. Use at least 1/8” separation to reduce the capacitance coupling AN203 6 Preliminary Rev. 0.1 Figure 7. Placing Microcontroller on both Analog and Digital Ground Planes 2.2.4. Shared Mixed-Signal Ground Planes Not all mixed signal embedded systems require sepa- rate analog and digital to function properly. Systems tak- ing low-resolution analog measurements do not take readings that are precise enough to be impacted by coupled digital noise. In systems sharing a ground plane, interaction between analog and digital ground return currents should be min- imized. An analog component should not be placed between a digital component and its power supply because return currents traveling from the digital com- ponent across the ground plane can disturb the ground of the analog component. In general, higher frequency digital components should be placed closer to the power supply than lower fre- quency components. If possible, each component should have a straight-line return path in a solid ground plane to the power supply ground. 2.2.5. Analog Measurement and Ground Noise ADC measurements can be more precise by ensuring that the ground ADC voltage reference and the analog input circuit ground reference are at the same voltage. Differences in these two voltages are typically caused by asymmetrical current flowing in the ground plane past analog measurement circuits. Although in most embedded systems, designers connect the analog and digital ground planes near the PCB power supply. Con- necting the planes near the mixed-signal MCU can keep current flow symmetrical across the plane. Power Supply Ground Planes often connected close to the power supply Digital (High-Frequency) Ground Plane Analog (Low-Frequency) Ground Plane Analog ground currents should not create asymmetrical voltages at analog inputs and ground pins Try connections close to the device Digital IC Digital IC Mixed-Signal MCU OP-AMP/ FILTER AGND DGND AN203 Preliminary Rev. 0.1 7 2.2.6. System Ground A system of circuits or PCBs must return current to chassis ground or to the main power supply circuit ground. Noise can travel along this return path from one circuit to another. The effects of this kind of noise can be minimized by limiting the amount of interaction between the system’s return currents [1]. Figure 8 shows an example of this design technique called the “star” topol- ogy. Figure 8. “Star” Ground Topology PC B PC B PC B Parasitic Inductance of Wires or Long Traces is larger Chassis Ground or Main Power Return Return Current Return Currents have less effect on each other with separate return paths in "star" topology AN203 8 Preliminary Rev. 0.1 3. Signal Traces Mixed signal embedded systems carry both digital and analog signals across the PCB through strips of conduc- tive metal. Just as radiated noise from digital can couple into the power and ground circuits, as was discussed in Section 2, this noise can also couple into analog traces and degrade measurements. The following subsections discuss how placement and routing techniques of signal traces can minimize coupling. 3.1. General Guidelines Digital and analog traces should be routed as far apart from each other as possible. Also, digital and analog traces should never be routed so that they are perpen- dicular to one another. High-frequency signals, such as the system clock or high-speed digital signals, radiate EMI due to reflections and differential mode currents in ground circuit conductors. At high frequencies, the trace-to-ground stray capacitance and parasitic induc- tances can detrimentally affect performance [5]. 3.2. Trace Geometry and Impedance An ideal trace would conduct any amount of current without any potential drop across the trace. In real-world systems, each trace has a characteristic impedance that depends on the following: „ Length „ Thickness „ Width „ Distance from surrounding traces and ground planes „ The material used in the PCB „ Connections to the trace Figure 9. Trace Routing 3.2.1. Trace Routing and Length When routing signals, trace width should remain con- stant. Traces should be routed using two 45 degree turns instead of a single 90 degree turn, as shown in Figure 9. Trace length should be kept at a minimum, as longer traces are more susceptible to EMI, and trace inductance and resistance increase as trace length increases. 3.2.2. Vias When a signal must travel from one layer of the board to another, the trace must be routed through a via, which adds capacitance and inductance to a trace [7]. The via’s capacitance shunts high-frequency components of signals to ground, which can round digital waveforms. The via’s inductance can produce noise, reflections, and EMI. The use of vias should be minimized, espe- cially in high-frequency traces. 3.2.3. Reducing Signal Trace Crosstalk To minimize the effects of “crosstalk”, a phenomenon discussed in "Appendix C—Crosstalk" on page 18, designers should follow the “3W Rule” when routing high-frequency signals. The 3W Rule states that the separation between traces must be three times the width of these traces, measured from centerline to cen- terline [5]. This rule assumes that the traces are sur- rounded by a solid ground plane and is undisturbed by vias or cross-stitch traces. 3.2.4. Preventing Signal Reflection In Traces At high frequencies, signal traces may act as transmis- sion lines, and other traces can experience reflec- tions[7] that can cause false triggering in digital logic, signal distortion, and EMI problems. The trace length at which reflections can become a problem is determined by the rise time of the signal traveling on the trace. Most microcontroller applications do not create reflections if traces are less than 100 cm. Use two 45 degree turns instead of one 90 degree turn NO Changes in width and the 90 degree turn add parasitic capacitance W L 2:1 Ratio for L/W AN203 Preliminary Rev. 0.1 9 4. Special Considerations This section discusses elements of PCB design that require special attention. 4.1. Unused Pins Many embedded system designs do not use all avail- able pins on a mixed-signal MCU. The following is a list of typical unused pin types and what action to take dur- ing PCB design: „ Digital general-purpose I/O port pins (GPIO): Connect directly to digital ground and configured as open-drain with internal weak pullups disabled to save power, or they can be left floating and driven to logic “0” by software. „ Analog signals: Connect directly to analog ground, which reduces susceptibility to radiated noise. „ Op-amps: Connect their non-inverting (+) input to ground and the inverting input (-) to the op-amp output. 4.2. Special Signals The following subsections describe design techniques for some critical and commonly used signals routed on PCBs. 4.2.1. System Clock Traces connected to an external system clock carry a high-frequency signal and can radiate noise. To help keep system clock trace lengt
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