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JESD79-3E DDR3 Spec .pdf

JESD79-3E DDR3 Spec

luodax 2011-10-10 评分 0 浏览量 0 0 0 0 暂无简介 简介 举报

简介:本文档为《JESD79-3E DDR3 Spec pdf》,可适用于IT/计算机领域,主题内容包含JEDECSOLIDSTATETECHNOLOGYASSOCIATIONJESDEJulyJEDECSTANDARDDDRSDRAMSpecific符等。

JEDECSOLIDSTATETECHNOLOGYASSOCIATIONJESDEJulyJEDECSTANDARDDDRSDRAMSpecification(RevisionofJESDD,August)NOTICEJEDECstandardsandpublicationscontainmaterialthathasbeenprepared,reviewed,andapprovedthroughtheJEDECBoardofDirectorslevelandsubsequentlyreviewedandapprovedbytheJEDEClegalcounselJEDECstandardsandpublicationsaredesignedtoservethepublicinterestthrougheliminatingmisunderstandingsbetweenmanufacturersandpurchasers,facilitatinginterchangeabilityandimprovementofproducts,andassistingthepurchaserinselectingandobtainingwithminimumdelaytheproperproductforusebythoseotherthanJEDECmembers,whetherthestandardistobeusedeitherdomesticallyorinternationallyJEDECstandardsandpublicationsareadoptedwithoutregardtowhetherornottheiradoptionmayinvolvepatentsorarticles,materials,orprocessesBysuchactionJEDECdoesnotassumeanyliabilitytoanypatentowner,nordoesitassumeanyobligationwhatevertopartiesadoptingtheJEDECstandardsorpublicationsTheinformationincludedinJEDECstandardsandpublicationsrepresentsasoundapproachtoproductspecificationandapplication,principallyfromthesolidstatedevicemanufacturerviewpointWithintheJEDECorganizationthereareprocedureswherebyaJEDECstandardorpublicationmaybefurtherprocessedandultimatelybecomeanANSIstandardNoclaimstobeinconformancewiththisstandardmaybemadeunlessallrequirementsstatedinthestandardaremetInquiries,comments,andsuggestionsrelativetothecontentofthisJEDECstandardorpublicationshouldbeaddressedtoJEDECattheaddressbelow,orcall()orwwwjedecorgPublishedbyJEDECSolidStateTechnologyAssociationNorththStreet,SuiteSouthArlington,VAThisdocumentmaybedownloadedfreeofchargehoweverJEDECretainsthecopyrightonthismaterialBydownloadingthisfiletheindividualagreesnottochargefororreselltheresultingmaterialPRICE:PleaserefertothecurrentCatalogofJEDECEngineeringStandardsandPublicationsonlineathttp:wwwjedecorgCatalogcatalogcfmPrintedintheUSAAllrightsreservedPLEASE!DON'TVIOLATETHELAW!ThisdocumentiscopyrightedbyJEDECandmaynotbereproducedwithoutpermissionOrganizationsmayobtainpermissiontoreproducealimitednumberofcopiesthroughenteringintoalicenseagreementForinformation,contact:JEDECSolidStateTechnologyAssociationNorththStreet,SuiteSouthArlington,Virginiaorcall()JEDECStandardNoEContentsScopeDDRSDRAMPackagePinoutandAddressingDDRSDRAMxBalloutusingMODDRSDRAMxBalloutusingMODDRSDRAMxBalloutusingMOStackeddualdieDDRSDRAMxBalloutusingMOStackeddualdieDDRSDRAMxBalloutusingMOStackeddualdieDDRSDRAMxBalloutusingMOQuadstackedQuaddieDDRSDRAMxBalloutusingMOQuadstackedQuaddieDDRSDRAMxBalloutusingMOQuadstackedQuaddieDDRSDRAMxBalloutusingMOPinoutDescriptionDDRSDRAMAddressingMbGbGbGbGbFunctionalDescriptionSimplifiedStateDiagramBasicFunctionalityRESETandInitializationProcedurePowerupInitializationSequenceResetInitializationwithStablePowerRegisterDefinitionProgrammingtheModeRegistersModeRegisterMRModeRegisterMRModeRegisterMRModeRegisterMRDDRSDRAMCommandDescriptionandOperationCommandTruthTableCKETruthTableNoOPeration(NOP)CommandDeselectCommandDLLoffModeDLLonoffswitchingprocedureDLL“on”toDLL“off”ProcedureDLL“off”toDLL“on”ProcedureInputclockfrequencychangeWriteLevelingDRAMsettingforwritelevelingDRAMterminationfunctioninthatmodeProcedureDescriptionWriteLevelingModeExitiJEDECStandardNoEContentsExtendedTemperatureUsageSelfRefreshTemperatureRangeSRTMultiPurposeRegisterMPRFunctionalDescriptionMPRRegisterAddressDefinitionRelevantTimingParametersProtocolExampleACTIVECommandPRECHARGECommandREADOperationREADBurstOperationREADTimingDefinitionsBurstReadOperationfollowedbyaPrechargeWRITEOperationDDRBurstOperationWRITETimingViolationsWriteDataMasktWPRECalculationtWPSTCalculationRefreshCommandSelfRefreshOperationPowerDownModesPowerDownEntryandExitPowerDownclarificationsCasePowerDownclarificationsCasePowerDownclarificationsCaseZQCalibrationCommandsZQCalibrationDescriptionZQCalibrationTimingZQExternalResistorValue,Tolerance,andCapacitiveloadingOnDieTermination(ODT)ODTModeRegisterandODTTruthTableSynchronousODTModeODTLatencyandPostedODTTimingParametersODTduringReadsDynamicODTFunctionalDescription:ODTTimingDiagramsAsynchronousODTModeSynchronoustoAsynchronousODTModeTransitionsSynchronoustoAsynchronousODTModeTransitionduringPowerDownEntryAsynchronoustoSynchronousODTModeTransitionduringPowerDownExitiiJEDECStandardNoEContentsAsynchronoustoSynchronousODTModeduringshortCKEhighandshortCKElowperiodsAbsoluteMaximumRatingsAbsoluteMaximumDCRatingsDRAMComponentOperatingTemperatureRangeACDCOperatingConditionsRecommendedDCOperatingConditionsACandDCInputMeasurementLevelsACandDCLogicInputLevelsforSingleEndedSignalsACandDCInputLevelsforSingleEndedCommandandAddressSignalsACandDCInputLevelsforSingleEndedDataSignalsVrefTolerancesACandDCLogicInputLevelsforDifferentialSignalsDifferentialsignaldefinitionDifferentialswingrequirementsforclock(CKCK#)andstrobe(DQSDQS#)SingleendedrequirementsfordifferentialsignalsDifferentialInputCrossPointVoltageSlewRateDefinitionsforSingleEndedInputSignalsSlewRateDefinitionsforDifferentialInputSignalsACandDCOutputMeasurementLevelsSingleEndedACandDCOutputLevelsDifferentialACandDCOutputLevelsSingleEndedOutputSlewRateDifferentialOutputSlewRateReferenceLoadforACTimingandOutputSlewRateOvershootandUndershootSpecificationsAddressandControlOvershootandUndershootSpecificationsClock,Data,StrobeandMaskOvershootandUndershootSpecificationsohmOutputDriverDCElectricalCharacteristicsOutputDriverTemperatureandVoltagesensitivityOnDieTermination(ODT)LevelsandIVCharacteristicsOnDieTermination(ODT)LevelsandIVCharacteristicsODTDCElectricalCharacteristicsODTTemperatureandVoltagesensitivityODTTimingDefinitionsTestLoadforODTTimingsODTTimingDefinitionsIDDandIDDQSpecificationParametersandTestConditionsIDDandIDDQMeasurementConditionsIDDSpecificationsInputOutputCapacitanceInputOutputCapacitanceiiiJEDECStandardNoEContentsElectricalCharacteristicsACTimingforDDRtoDDRClockSpecificationDefinitionfortCK(avg)DefinitionfortCK(abs)DefinitionfortCH(avg)andtCL(avg)DefinitionfortJIT(per)andtJIT(per,lck)DefinitionfortJIT(cc)andtJIT(cc,lck)DefinitionfortERR(nper)RefreshparametersbydevicedensityStandardSpeedBinsSpeedBinTableNotesElectricalCharacteristicsandACTimingTimingParametersforDDR,DDR,DDR,andDDRTimingParamtersforDDRandDDRSpeedBinsJitterNotesTimingParameterNotes

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