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74LS90 TL/F/6381 D M 7 4 L S 9 0 / D M 7 4 L S 9 3 D e c a d e a n d B in a ry C o u n te rs June 1989 DM74LS90/DM74LS93 Decade and Binary Counters General Description Each of these monolithic counters contains four master- slave flip-flops and additional gat...

74LS90
TL/F/6381 D M 7 4 L S 9 0 / D M 7 4 L S 9 3 D e c a d e a n d B in a ry C o u n te rs June 1989 DM74LS90/DM74LS93 Decade and Binary Counters General Description Each of these monolithic counters contains four master- slave flip-flops and additional gating to provide a divide-by- two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the ’LS90 and divide- by-eight for the ’LS93. All of these counters have a gated zero reset and the LS90 also has gated set-to-nine inputs for use in BCD nine’s com- plement applications. To use their maximum count length (decade or four bit bina- ry), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical di- vide-by-ten count can be obtained from the ’LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA. Features Y Typical power dissipation 45 mW Y Count frequency 42 MHz Connection Diagrams (Dual-In-Line Packages) TL/F/6381–1 Order Number DM74LS90M or DM74LS90N See NS Package Number M14A or N14A TL/F/6381–2 Order Number DM74LS93M or DM74LS93N See NS Package Number M14A or N14A C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A. Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage (Reset) 7V Input Voltage (A or B) 5.5V Operating Free Air Temperature Range DM74LS 0§C to a70§C Storage Temperature Range b65§C to a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter DM74LS90 Units Min Nom Max VCC Supply Voltage 4.75 5 5.25 V VIH High Level Input Voltage 2 V VIL Low Level Input Voltage 0.8 V IOH High Level Output Current b0.4 mA IOL Low Level Output Current 8 mA fCLK Clock Frequency (Note 1) A to QA 0 32 MHz B to QB 0 16 fCLK Clock Frequency (Note 2) A to QA 0 20 MHz B to QB 0 10 tW Pulse Width (Note 1) A 15 B 30 ns Reset 15 tW Pulse Width (Note 2) A 25 B 50 ns Reset 25 tREL Reset Release Time (Note 1) 25 ns tREL Reset Release Time (Note 2) 35 ns TA Free Air Operating Temperature 0 70 §C Note 1: CL e 15 pF, RL e 2 kX, TA e 25§C and VCC e 5V. Note 2: CL e 50 pF, RL e 2 kX, TA e 25§C and VCC e 5V. ’LS90 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 1) VI Input Clamp Voltage VCC e Min, II e b18 mA b1.5 V VOH High Level Output VCC e Min, IOH e Max 2.7 3.4 V Voltage VIL e Max, VIH e Min VOL Low Level Output VCC e Min, IOL e Max Voltage VIL e Max, VIH e Min 0.35 0.5 V (Note 4) IOL e 4 mA, VCC e Min 0.25 0.4 II Input Current @ Max VCC e Max, VI e 7V Reset 0.1 Input Voltage VCC e Max A 0.2 mA VI e 5.5V B 0.4 2 ’LS90 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) (Continued) Symbol Parameter Conditions Min Typ Max Units (Note 1) IIH High Level Input VCC e Max, VI e 2.7V Reset 20 Current A 40 mA B 80 IIL Low Level Input VCC e Max, VI e 0.4V Reset b0.4 Current A b2.4 mA B b3.2 IOS Short Circuit VCC e Max (Note 2) b20 b100 mA Output Current ICC Supply Current VCC e Max (Note 3) 9 15 mA Note 1: All typicals are at VCC e 5V, TA e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded. Note 4: QA outputs are tested at IOL e Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability. ’LS90 Switching Characteristics at VCC e 5V and TA e 25§C (See Section 1 for Test Waveforms and Output Load) From (Input) RL e 2 kX Symbol Parameter To (Output) CL e 15 pF CL e 50 pF Units Min Max Min Max fMAX Maximum Clock A to QA 32 20 MHz Frequency B to QB 16 10 tPLH Propagation Delay Time A to QA 16 20 nsLow to High Level Output tPHL Propagation Delay Time A to QA 18 24 nsHigh to Low Level Output tPLH Propagation Delay Time A to QD 48 52 nsLow to High Level Output tPHL Propagation Delay Time A to QD 50 60 nsHigh to Low Level Output tPLH Propagation Delay Time B to QB 16 23 nsLow to High Level Output tPHL Propagation Delay Time B to QB 21 30 nsHigh to Low Level Output tPLH Propagation Delay Time B to QC 32 37 nsLow to High Level Output tPHL Propagation Delay Time B to QC 35 44 nsHigh to Low Level Output tPLH Propagation Delay Time B to QD 32 36 nsLow to High Level Output tPHL Propagation Delay Time B to QD 35 44 nsHigh to Low Level Output tPLH Propagation Delay Time SET-9 to 30 35 ns Low to High Level Output QA, QD tPHL Propagation Delay Time SET-9 to 40 48 ns High to Low Level Output QB, QC tPHL Propagation Delay Time SET-0 to 40 52 ns High to Low Level Output Any Q 3 Recommended Operating Conditions Symbol Parameter DM74LS93 Units Min Nom Max VCC Supply Voltage 4.75 5 5.25 V VIH High Level Input Voltage 2 V VIL Low Level Input Voltage 0.8 V IOH High Level Output Current b0.4 mA IOL Low Level Output Current 8 mA fCLK Clock Frequency (Note 1) A to QA 0 32 B to QB 0 16 MHz fCLK Clock Frequency (Note 2) A to QA 0 20 B to QB 0 10 tW Pulse Width (Note 1) A 15 B 30 ns Reset 15 tW Pulse Width (Note 2) A 25 B 50 ns Reset 25 tREL Reset Release Time (Note 1) 25 ns tREL Reset Release Time (Note 2) 35 ns TA Free Air Operating Temperature 0 70 §C Note 1: CL e 15 pF, RL e 2 kX, TA e 25§C and VCC e 5V. Note 2: CL e 50 pF, RL e 2 kX, TA e 25§C and VCC e 5V. ’LS93 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 1) VI Input Clamp Voltage VCC e Min, II e b18 mA b1.5 V VOH High Level Output VCC e Min, IOH e Max 2.7 3.4 V Voltage VIL e Max, VIH e Min VOL Low Level Output VCC e Min, IOL e Max Voltage VIL e Max, VIH e Min 0.35 0.5 V (Note 4) IOL e 4 mA, VCC e Min 0.25 0.4 II Input Current @Max VCC e Max, VI e 7V Reset 0.1 Input Voltage VCC e Max A 0.2 mA VI e 5.5V B 0.4 IIH High Level Input VCC e Max Reset 20 Current VI e 2.7V A 40 mA B 80 4 ’LS93 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) (Continued) Symbol Parameter Conditions Min Typ Max Units (Note 1) IIL Low Level Input VCC e Max, VI e 0.4V Reset b0.4 Current A b2.4 mA B b1.6 IOS Short Circuit VCC e Max (Note 2) b20 b100 mA Output Current ICC Supply Current VCC e Max (Note 3) 9 15 mA Note 1: All typicals are at VCC e 5V, TA e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded. Note 4: QA outputs are tested at IOL e max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability. ’LS93 Switching Characteristics at VCC e 5V and TA e 25§C (See Section 1 for Test Waveforms and Output Load) From (Input) RL e 2 kX Symbol Parameter To (Output) CL e 15 pF CL e 50 pF Units Min Max Min Max fMAX Maximum Clock A to QA 32 20 MHz Frequency B to QB 16 10 tPLH Propagation Delay Time A to QA 16 20 nsLow to High Level Output tPHL Propagation Delay Time A to QA 18 24 nsHigh to Low Level Output tPLH Propagation Delay Time A to QD 70 85 nsLow to High Level Output tPHL Propagation Delay Time A to QD 70 90 nsHigh to Low Level Output tPLH Propagation Delay Time B to QB 16 23 nsLow to High Level Output tPHL Propagation Delay Time B to QB 21 30 nsHigh to Low Level Output tPLH Propagation Delay Time B to QC 32 37 nsLow to High Level Output tPHL Propagation Delay Time B to QC 35 44 nsHigh to Low Level Output tPLH Propagation Delay Time B to QD 51 60 nsLow to High Level Output tPHL Propagation Delay Time B to QD 51 70 nsHigh to Low Level Output tPHL Propagation Delay Time SET-0 to 40 52 ns High to Low Level Output Any Q 5 Function Tables LS90 BCD Count Sequence (See Note A) Count Output QD QC QB QA 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H LS90 Bi-Quinary (5-2) (See Note B) Count Output QA QD QC QB 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 H L L L 6 H L L H 7 H L H L 8 H L H H 9 H H L L LS93 Count Sequence (See Note C) Count Output QD QC QB QA 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H 10 H L H L 11 H L H H 12 H H L L 13 H H L H 14 H H H L 15 H H H H Note A: Output QA is connected to input B for BCD count. Note B: Output QD is connected to input A for bi-quinary count. Note C: Output QA is connected to input B. Note D: H e High Level, L e Low Level, X e Don’t Care. LS90 Reset/Count Truth Table Reset Inputs Output R0(1) R0(2) R9(1) R9(2) QD QC QB QA H H L X L L L L H H X L L L L L X X H H H L L H X L X L COUNT L X L X COUNT L X X L COUNT X L L X COUNT LS93 Reset/Count Truth Table Reset Inputs Output R0(1) R0(2) QD QC QB QA H H L L L L L X COUNT X L COUNT 6 Logic Diagrams LS90 TL/F/6381–3 LS93 TL/F/6381–4 The J and K inputs shown without connection are for reference only and are functionally at a high level. 7 8 Physical Dimensions inches (millimeters) 14-Lead Small Outline Molded Package (M) Order Number DM74LS90M or DM74LS93M NS Package Number M14A 9 D M 7 4 L S 9 0 / D M 7 4 L S 9 3 D e c a d e a n d B in a ry C o u n te rs Physical Dimensions inches (millimeters) (Continued) 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS90N or DM74LS93N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd. 1111 West Bardin Road Fax: (a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge@ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: (a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: (a49) 0-180-532 78 32 Hong Kong Fran3ais Tel: (a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: (a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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