ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
� 8-Bit Resolution
� Easy Microprocessor interface or
Stand-Alone Operation
� Operates Ratiometrically or With 5-V
Reference
� Single Channel or Multiplexed Twin
Channels With Single-Ended or Differential
Input Options
� Input Range 0 to 5 V With Single 5-V Supply
� Inputs and Outputs Are Compatible With
TTL and MOS
� Conversion Time of 32 µs at CLK = 250 kHz
� Designed to Be interchangeable With
National Semiconductor ADC0831 and
ADC0832
DEVICE
TOTAL UNADJUSTED ERROR
DEVICE A-SUFFIX B-SUFFIX
ADC0831 ± 1 LSB ± 1/2 LSB
ADC0832 ± 1 LSB ± 1/2 LSB
description
These devices are 8-bit successive-approximation analog-to-digital converters. The ADC0831A and
ADC0831B have single input channels; the ADC0832A and ADC0832B have multiplexed twin input channels.
The serial output is configured to interface with standard shift registers or microprocessors. Detailed information
on interfacing to most popular microprocessors is readily available from the factory.
The ADC0832 multiplexer is software configured for single-ended or differential inputs. The differential analog
voltage input allows for common-mode rejection or offset of the analog zero input voltage value. In addition,
the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits
of resolution.
The operation of the ADC0831 and ADC0832 devices is very similar to the more complex ADC0834 and
ADC0838 devices. Ratiometric conversion can be attained by setting the REF input equal to the maximum
analog input signal value, which gives the highest possible conversion resolution. Typically, REF is set equal
to VCC (done internally on the ADC0832). For more detail on the operation of the ADC0831 and ADC0832
devices, refer to the ADC0834/A DC0838 data sheet.
The ADC0831AC, ADC0831BC, ADC0832AC, and ADC0832BC are characterized for operation from 0°C
to 70°C. The ADC0831AI, ADC0831BI, ADC0832AI, and ADC0832BI are characterized for operation from
–40°C to 85°C.
Copyright 1996, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
8
7
6
5
CS
IN+
IN–
GND
VCC
CLK
DO
REF
ADC0831 . . . P PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
CS
CH0
CH1
GND
VCC/REF
CLK
DO
DI
ADC0832 . . . P PACKAGE
(TOP VIEW)
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
functional block diagram
R
Start
Flip-Flop
S
CLK
CLK
Time
Delay
S
R
CS
DO
CS
CS
D
CLK
R
EOC9-Bit
Shift
Register
CS
RCLK
First
LSB
Bit 1
Bits 0–7
First
One
Shot
SAR
Logic
and
Latch
REN
CS
Bits 0–7REF Ladderand
Decoder
EN
Comparator
EN
Analog
MuxCH1/IN–
CH0/IN+
Single/Differential
Odd/Even
StartCLK
D
Shift Register
To Internal
Circuits
(ADC0832
Only)
DI
CS
CLK
MSB
(ADC0831
Only)
7
1
5
5
1 1 1
1
1
6
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
sequence of operation
Don’t Care
1 76201267
MSBLSB
LSB-First Data
EvenDif
+Sign
OddSGL
Start
Bit
17 6 5 24 3
MSB
DI
DO
CS
tsu
CLK
212019181413121 2 3 4 5 6 10 11
ADC0832
Hi-Z
0
LSB
tconv
MSB-First Data
MSB
HI-Z
DO
MUX
Settling Time
CS
CLK
10987654321
tsu
tconv
ADC0831
Hi-Z
MSB-First Data
ADC0832 MUX ADDRESS CONTROL LOGIC TABLE
MUX ADDRESS CHANNEL NUMBER
SGL/DIF ODD/EVEN 0 1
L
H
L
H
L
L
H
H
+
–
+
–
+
+
MUX
Settling Time
H = high level, L = low level,
– or + = polarity of selected input pin
(ADC0832
only)
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
absolute maximum ratings over recommended operating free-air temperature range (unless
otherwise noted)
Supply voltage, VCC (see Note 1) 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range: Logic –0.3 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog –0.3 V to VCC + 0.3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total input current for package ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: C-suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I-suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE 1: All voltage values, except differential voltages, are with respect to the network ground terminal.
recommended operating conditions
MIN NOM MAX UNIT
VCC Supply voltage 4.5 5 6.3 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
fclock Clock frequency 10 400 kHz
Clock duty cycle (see Note 2) 40 60 %
twH(C
S)
Pulse duration, CS high 220 ns
tsu Setup time, CS low or ADC0832 data valid before CLK↑ 350 ns
th Hold time, ADC0832 data valid after CLK↑ 90 ns
TA Operating free air temperature
C-suffix 0 70
°CTA Operating free-air temperature I-suffix –40 85
°C
NOTE 2: The clock duty cycle range ensures proper operation at all clock frequencies. If a clock frequency is used outside the recommended
duty cycle range, the minimum pulse duration (high or low) is 1 µs.
electrical characteristics over recommended range of operating free-air temperature, VCC = 5 V,
fclock = 250 kHz (unless otherwise noted)
digital section
PARAMETER TEST CONDITIONS�
C SUFFIX I SUFFIX
UNITPARAMETER TEST CONDITIONS� MIN TYP‡ MAX MIN TYP‡ MAX UNIT
VOH High level output voltage
VCC = 4.75 V, IOH = –360 µA 2.8 2.4 VVOH High-level output voltage VCC = 4.75 V, IOH = –10 µA 4.6 4.5
V
VOL Low-levl output voltage VCC = 4.75 V, IOL = 1.6 mA 0.34 0.4 V
IIH High-level input current VIH = 5 V 0.005 1 0.005 1 µA
IIL Low-level input current VIL = 0 –0.005 –1 –0.005 –1 µA
IOH High-level output (source) current VOH = VO, TA = 25°C –6.5 –14 –6.5 –14 mA
IOL Low-level output (sink) current VOL = VCC, TA = 25°C 8 16 8 16 mA
IOZ
High-impedance-state output VO = 5 V, TA = 25°C 0.01 3 0.01 3 µAIOZ
g
current (DO) VO = 0, TA = 25°C –0.01 –3 –0.01 –3
µA
Ci Input capacitance 5 5 pF
Co Output capacitance 5 5 pF
† All parameters are measured under open-loop conditions with zero common-mode input voltage.
‡ All typical values are at VCC = 5 V, TA = 25°C.
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
electrical characteristics over recommended range of operating free-air temperature,
VCC = 5 V, fclock = 250 kHz (unless otherwise noted)
analog and converter section
PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT
VICR Common-mode input voltage range See Note 3
–0.05
to
VCC+0.05
V
On-channel VI = 5 V 1
II( tdb ) Standby input current (see Note 4)
Off-channel VI = 0 –1 µAII(stdby) Standby input current (see Note 4) On-channel VI = 0 –1
µA
Off-channel VI = 5 V 1
ri(REF) Input resistance to reference ladder 1.3 2.4 5.9 kΩ
total device
PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT
ICC Supply current
ADC0831 1 2.5
mAICC Supply current ADC0832 3 5.2
mA
† All parameters are measured under open-loop conditions with zero common-mode input voltage.
‡ All typical values are at VCC = 5 V, TA = 25°C.
NOTES: 3. If channel IN– is more positive than channel IN+, the digital output code will be 0000 0000. Connected to each analog input are two
on-chip diodes that conduct forward current for analog input voltages one diode drop above VCC .Care must be taken during testing
at low VCC levels (4.5 V) because high-level analog input voltage (5 V) can, especially at high temperatures, cause this input diode
to conduct and cause errors for analog inputs that are near full-scale. As long as the analog voltage does not exceed the supply
voltage by more than 50 mV, the output code will be correct. To achieve an absolute 0 V to 5 V input voltage range requires a minimum
VCC of 4.95 V for all variations of temperature and load.
4. Standby input currents are currents going into or out of the on or off channels when the A/D converter is not performing conversion
and the clock is in a high or low steady-state condition.
operating characteristics VCC = REF = 5 V, fclock = 250 kHz, tr = tf = 20 ns, TA = 25°C (unless otherwise
noted)
PARAMETER TEST CONDITIONS§ AI, AC SUFFIX BI, BC SUFFIX UNITPARAMETER TEST CONDITIONS§ MIN TYP MAX MIN TYP MAX UNIT
Supply-voltage variation error VCC = 4.75 V to 5.25 V ±1/16 ±1/4 ±1/16 ±1/4 LSB
Total unadjusted error (see Note 5) Vref = 5 V,TA = MIN to MAX ±1 ±1/2 LSB
Common-mode error Differential mode ±1/16 ±1/4 ±1/16 ±1/4 LSB
t d
Propagation delay time,
ouput data after CLK↑
MSB-first data
CL = 100 pF
650 1500 650 1500
nstpd ouput data after CLK↑
(see Note 6) LSB-first data
CL = 100 pF
250 600 250 600
ns
tdi
Output disable time, CL = 10 pF, RL = 10 kΩ 125 250 125 250
nstdis
,
DO after CS↑ CL = 100 pF, RL = 2 kΩ 500 500
ns
tconv
Conversion time (multiplexer addressing
time not included) 8 8
clock
periods
§ All parameters are measured under open-loop conditions with zero common-mode input voltage. For conditions shown as MIN or MAX, use the
appropriate value specified under recommended operating conditions.
NOTES:5. Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
6. The most significant-bit-first data is output directly from the comparator and therefore requires additional delay to allow for comparator response
time. Least-significant-bit-first data applies only to ADC0832.
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
Figure 1. ADC0832 Data Input Timing
50%
tsu
th th
tsu
50%
VCC
GND
GND
0.4 V0.4 V
2 V2 V
DI
0.4 V
CS
CLK
VCC
VCC
GND
Figure 2. Data Output Timing
50%
tpd
50%
GND
VOL
VOH
VCC
CLK
DO
VOLTAGE WAVEFORMS
S2 closed
S1 open
10%
10%
90%
tr
VOLTAGE WAVEFORMS
S2 closed
S1 openDO and SARS
Output
tr
S1
S2
LOAD CIRCUIT
(see Note A)
CL
From Output
Under Test
Test
Point
CSCS
tdis
90%
10%
90%50% 50%
VCC
GND
GND
GND
GND
VCC
–VCC
VCC
VCC
RL
DO and SARS
Output
tdis
Figure 3. Output Disable Time Test Circuit and Voltage Waveforms
NOTE A: CL includes probe and jig capacitance.
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TYPICAL CHARACTERISTICS
Figure 4
O
ffs
et
E
rr
or
–
L
SB
Vref – Reference Voltage – V
101.00.10.01
VI+ = VI– = 0 V
0
2
4
6
8
10
12
14
16
UNADJUSTED OFFSET ERROR
vs
REFERENCE VOLTAGE
Figure 5
Vref – Reference Voltage – V
Li
ne
ar
ity
E
rr
or
–
L
SB
VCC = 5 V
fclock = 250 kHz
TA = 25°C
543210
0.25
0.5
0.75
1.0
1.25
0
1.5
LINEARITY ERROR
vs
REFERENCE VOLTAGE
Figure 6
Li
ne
ar
ity
E
rr
or
–
L
SB
TA – Free-Air Tempertature – °C
Vref = 5 V
fclock = 250 kHz
1007550250–25
0.5
0.45
0.4
0.35
0.3
–50
0.25
LINEARITY ERROR
vs
FREE-AIR TEMPERATURE
Figure 7
Li
ne
ar
ity
E
rr
or
–
L
SB
fclock – Clock Frequency – kHz
25°C
85°C
Vref = 5 V
VCC = 5 V
600500400300200100
3
2.5
2
1.5
1
0.5
00
LINEARITY ERROR
vs
CLOCK FREQUENCY
–40°C
ADC0831A, ADC0832A, ADC0831B, ADC0832B
A/D PERIPHERALS WITH SERIAL CONTROL
SLAS006 – AUGUST 1985 – REVISED JUNE 1986
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
Figure 8
TA – Free-Air Temperature — °C
fclock = 250 kHz
CS = High
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
1007550250–25
1.5
1
–50
0.5
–
Su
pp
ly
C
ur
re
nt
–
m
A
ADC0831
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
CCI
Figure 9
fclock – Clock Frequency – kHz
VCC = 5 V
TA = 25°C
1.5
1
0.5
5004003002001000
0
ADC0831
SUPPLY CURRENT
vs
CLOCK FREQUENCY
–
Su
pp
ly
C
ur
re
nt
–
m
A
CCI
Figure 10
TA – Free-Air Temperature – °C
VCC = 5 V
IOL (VOL = 5 V)
– IOH (VOH = 0 V)
– IOH (VOH = 2.4 V)
IOL (VOL = 0.4 V)
20
25
15
10
5
1007550250–25–50
0
–
O
ut
pu
t C
ur
re
nt
–
m
A
OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
I O
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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