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 Semiconductor Components Industries, LLC, 2004 October, 2004− Rev. 4 1 Publication Order Number: NCP1203/D NCP1203 PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit Protection Housed in SOIC−8 or PDIP−8 package, the NCP1203 represents a major leap toward ultra−compact Switchmode Power Supplies and represents an excellent candidate to replace the UC384X devices. Due to its proprietary SMARTMOS� Very High Voltage Technology, the circuit allows the implementation of complete off−line AC−DC adapters, battery charger and a high−power SMPS with few external components. With an internal structure operating at a fixed 40 kHz, 60 kHz or 100 kHz switching frequency, the controller features a high−voltage startup FET which ensures a clean and loss−less startup sequence. Its current−mode control naturally provides good audio−susceptibility and inherent pulse−by−pulse control. When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the so−called skip cycle mode and provides improved efficiency at light loads while offering excellent performance in standby conditions. Because this occurs at a user adjustable low peak current, no acoustic noise takes place. The NCP1203 also includes an efficient protective circuitry which, in presence of an output over load condition, disables the output pulses while the device enters a safe burst mode, trying to restart. Once the default has gone, the device auto−recovers. Finally, a temperature shutdown with hysteresis helps building safe and robust power supplies. Features • Pb−Free Packages are Available • High−Voltage Startup Current Source • Auto−Recovery Internal Output Short−Circuit Protection • Extremely Low No−Load Standby Power • Current−Mode with Adjustable Skip−Cycle Capability • Internal Leading Edge Blanking • 250 mA Peak Current Capability • Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz • Direct Optocoupler Connection • Undervoltage Lockout at 7.8 V Typical • SPICE Models Available for TRANsient and AC Analysis • Pin to Pin Compatible with NCP1200 Applications • AC−DC Adapters for Notebooks, etc. • Offline Battery Chargers • Auxiliary Power Supplies (USB, Appliances, TVs, etc.) SOIC−8 D1, D2 SUFFIX CASE 7511 8 MARKING DIAGRAMS PIN CONNECTIONS PDIP−8 N SUFFIX CASE 626 1 8 xx = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y, YY = Year W, WW = Work Week 1Adj 8 HV 2FB 3CS 4GND 7 NC 6 VCC 5 Drv (Top View) xxxxxxxxx AWL YYWW 1 8 See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ORDERING INFORMATION http://onsemi.com xxxxxx ALYW � 1 8 NCP1203 http://onsemi.com 2 Figure 1. Typical Application Example EMI FILTER UNIVERSAL INPUT + + NCP1203 + VOUT Aux. Adj FB CS GND HV VCC Drv 1 2 3 4 8 7 6 5 * *Please refer to the application information section PIN FUNCTION DESCRIPTION Pin No. Pin Name Function Pin Description 1 Adj Adjust the skipping peak current This pin lets you adjust the level at which the cycle skipping process takes place. Shorting this pin to ground, permanently disables the skip cycle feature. 2 FB Sets the peak current setpoint By connecting an optocoupler to this pin, the peak current setpoint is adjusted accordingly to the output power demand. Skip cycle occurs when FB falls below Vpin1. 3 CS Current sense input This pin senses the primary current and routes it to the internal comparator via an L.E.B. 4 GND The IC ground − 5 Drv Driving pulses The driver’s output to an external MOSFET. 6 VCC Supplies the IC This pin is connected to an external bulk capacitor of typically 22 �F. 7 NC − This unconnected pin ensures adequate creepage distance. 8 HV Ensure a clean and lossless startup sequence Connected to the high−voltage rail, this pin injects a constant current into the VCC capacitor during the startup sequence. NCP1203 http://onsemi.com 3 Figure 2. Internal Circuit Architecture OVERLOAD MANAGEMENT UVLO HIGH AND LOW INTERNAL REGULATOR ±250 mA HV CURRENT SOURCE INTERNAL VCC 8 7 6 5 HV NC VCC Drv 1 2 3 4 Q FLIP−FLOP DCmax = 80% Q250 ns L.E.B. 40−60−100 kHz CLOCK - + - + 80 k 20 k 57 k 1 V CURRENT SENSE GROUND FB Adj 24 k 25 k+ − VREF RESET 1.2 V SKIP CYCLE COMPARATOR SET MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage VCC, Drv 16 V Power Supply Voltage on all other pins except Pin 5 (Drv), Pin 6 (VCC) and Pin 8 (HV) − −0.3 to 10 V Maximum Current into all pins except Pin 6 (VCC) and Pin 8 (HV) when 10 V ESD diodes are activated − 5.0 mA Thermal Resistance Junction−to−Air, PDIP−8 Version Thermal Resistance Junction−to−Air, SOIC Version R�JA R�JA 100 178 °C/W °C/W Maximum Junction Temperature TJMAX 150 °C Temperature Shutdown − 170 °C Hysteresis in Shutdown − 30 °C Storage Temperature Range − −60 to +150 °C ESD Capability, HBM Model, All pins except Pin 6 (VCC) and Pin 8 (HV) − 2.0 KV ESD Capability, Machine Model − 200 V Maximum Voltage on Pin 6 (VCC) and Pin 8 (HV) Decoupled to Ground with 10 �F − 450 V Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. NCP1203 http://onsemi.com 4 ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C, VCC = 11 V unless otherwise noted.) Characteristic Symbol Pin Min Typ Max Unit Supply Section (All frequency versions, otherwise noted) Turn−on Threshold Level, VCC Going Up VCC(on) 6 12.2 12.8 14 V Minimum Operating Voltage after Turn−on VCC(min) 6 7.2 7.8 8.4 V VCC Decreasing Level at which the Latchoff Phase Ends VCClatch 6 − 4.9 − V Internal IC Consumption, No Output Load on Pin 5 ICC1 6 − 750 880 (Note 1) �A Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 40 kHz ICC2 6 − 1.2 1.4 (Note 2) mA Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 60 kHz ICC2 6 − 1.4 1.6 (Note 2) mA Internal IC Consumption, 1.0 nF Output Load on Pin 5, FSW = 100 kHz ICC2 6 − 2.0 2.2 (Note 2) mA Internal IC Consumption, Latch−off Phase, VCC = 6.0 V ICC3 6 − 250 − �A Internal Startup Current Source (Pin 8 biased at 50 V) High−Voltage Current Source, VCC = 10 V IC1 8 3.5 6.0 9.0 mA High−Voltage Current Source, VCC = 0 IC2 8 − 11 − mA Drive Output Output Voltage Rise−Time @ CL = 1.0 nF, 10−90% of Output Signal Tr 5 − 67 − ns Output Voltage Fall−Time @ CL = 1.0 nF, 10−90% of Output Signal Tf 5 − 28 − ns Source Resistance ROH 5 27 40 61 � Sink Resistance ROL 5 5.0 10 20 � Current Comparator (Pin 5 loaded unless otherwise noted) Input Bias Current @ 1.0 V Input Level on Pin 3 IIB 3 − 0.02 − �A Maximum Internal Current Setpoint (Note 3) ILimit 3 0.85 0.92 1.0 V Default Internal Current Setpoint for Skip Cycle Operation ILskip 3 − 360 − mV Propagation Delay from Current Detection to Gate OFF State TDEL 3 − 90 160 ns Leading Edge Blanking Duration (Note 3) TLEB 3 − 230 − ns Internal Oscillator (VCC = 11 V, Pin 5 loaded by 1 nF) Oscillation Frequency, 40 kHz Version fOSC − 37 42 47 kHz Oscillation Frequency, 60 kHz Version fOSC − 57 65 73 kHz Oscillation Frequency, 100 kHz Version fOSC − 90 103 115 kHz Maximum Duty−Cycle Dmax − 74 80 87 % Feedback Section (VCC = 11 V, Pin 5 unloaded) Internal Pullup Resistor Rup 2 − 20 − k� Pin 3 to Current Setpoint Division Ratio Iratio − − 3.3 − − Skip Cycle Generation Default Skip Mode Level Vskip 1 1.0 1.2 1.4 V Pin 1 Internal Output Impedance Zout 1 − 22 − k� 1. Max value at TJ = 0°C. 2. Maximum value @ TJ = 25°C, please see characterization curves. 3. Pin 5 loaded by 1 nF. NCP1203 http://onsemi.com 5 TEMPERATURE (°C) 1251007550250−25 150 200 250 300 350 400 I C C @ V CC = 6 V (�A ) Figure 3. VCC(on) Threshold versus Temperature Figure 4. VCC(min) Level versus Temperature 8.4 8.2 −25 0 8.0 7.6 7.2 125−25 14.0 13.8 50 12.6 12.4 12.2 100 7.4 25250 125 TEMPERATURE (°C) TEMPERATURE (°C) V C C( mi n) LE VE L (V ) V C C( on ) T H R ES HO LD (V ) 75 13.0 12.8 13.2 13.6 13.4 50 75 100 7.8 Figure 5. IC Current Consumption (No Load) versus Temperature Figure 6. ICC Consumption (Loaded by 1 nF) versus Temperature TEMPERATURE (°C) Figure 7. HV Current Source at VCC = 10 V versus Temperature Figure 8. IC Consumption at VCC = 6 V versus Temperature TEMPERATURE (°C) TEMPERATURE (°C) 1251007550250−25 500 550 600 650 700 750 950 1000 I C C, CU RR EN T CO NS UM PT IO N (�A ) 800 850 900 100 kHz 60 kHz 40 kHz 1251007550250−25 1.0 1.2 1.4 1.6 1.8 2.0 I C C, 1 nF L O AD C O NS UM PT IO N (m A) 100 kHz 60 kHz 40 kHz 1251007550250−25 4.0 4.5 5.0 5.5 6.0 6.5 7.5 8.0 7.0 H V CU RR EN T SO UR CE (m A) 100 kHz 40 & 60 kHz NCP1203 http://onsemi.com 6 Figure 9. Drive Source Resistance versus Temperature Figure 10. Drive Sink Resistance versus Temperature 20 16 −25 0 14 6 2 125−25 60 50 50 25 20 15 100 4 25250 125 TEMPERATURE (°C) TEMPERATURE (°C) D R IV E SI NK R ES IS TA N CE (� ) D R IV E SO UR CE R ES IS TA N CE (� ) 75 30 35 45 40 50 75 100 8 Figure 11. Maximum Current Setpoint versus Temperature Figure 12. Frequency versus Temperature −25 0.99 0.97 50 0.89 0.87 0.85 100250 125 TEMPERATURE (°C) TEMPERATURE (°C) M AX IM UM C UR RE NT S ET PO IN T (V ) 75 0.91 0.93 0.95 55 10 12 18 1251007550250−25 0 20 40 60 80 100 120 f, FR EQ UE NC Y (kH z) 100 kHz 60 kHz 40 kHz NCP1203 http://onsemi.com 7 APPLICATION INFORMATION Introduction The NCP1203 implements a standard current mode architecture where the switch−off time is dictated by the peak current setpoint. This component represents the ideal candidate where low part−count is the key parameter, particularly in low−cost AC−DC adapters, auxiliary supplies etc. Due to its high−performance SMARTMOS High−Voltage technology, the NCP1203 incorporates all the necessary components normally needed in UC384X based supplies: timing components, feedback devices, low−pass filter and startup device. This later point emphasizes the fact that ON Semiconductor’s NCP1203 does not need an external startup resistance but supplies the startup current directly from the high−voltage rail. On the other hand, more and more applications are requiring low no−load standby power, e.g. for AC−DC adapters, VCRs etc. UC384X series have a lot of difficulty to reduce the switching losses at low power levels. NCP1203 elegantly solves this problem by skipping unwanted switching cycles at a user−adjustable power level. By ensuring that skip cycles take place at low peak current, the device ensures quiet, noise free operation. Finally, an auto−recovery output short−circuit protection (OCP) prevents from any lethal thermal runaway in overload conditions. Startup Sequence When the power supply is first powered from the mains outlet, the internal current source (typically 6.0 mA) is biased and charges up the VCC capacitor. When the voltage on this VCC capacitor reaches the VCC(on) level (typically 12.8 V), the current source turns off and no longer wastes any power. At this time, the VCC capacitor only supplies the controller and the auxiliary supply is supposed to take over before VCC collapses below VCC(min). Figure 13 shows the internal arrangement of this structure: Figure 13. The Current Source Brings VCC Above 12.8 V and then Turns Off - + 8 6 4 6 mA or 0 CVCC Aux HV 12.8 V/4.9 V Once the power supply has started, the VCC shall be constrained below 16 V, which is the maximum rating on pin 6. Figure 14 portrays a typical startup sequence with a VCC regulated at 12.5 V: Figure 14. A Typical Startup Sequence for the NCP1203 t, TIME (sec) 3.00 M 8.00 M 13.0 M 18.0 M 23.0 M 13.5 12.5 11.5 10.5 9.5 REGULATION12.8 V NCP1203 http://onsemi.com 8 Current−Mode Operation As the UC384X series, the NCP1203 features a well−known current mode control architecture which provides superior input audio−susceptibility compared to traditional voltage−mode controllers. Primary current pulse−by−pulse checking together with a fast over current comparator offers greater security in the event of a difficult fault condition, e.g. a saturating transformer. Adjustable Skip Cycle Level By offering the ability to tailor the level at which the skip cycle takes place, the designer can make sure that the skip operation only occurs at low peak current. This point guarantees a noise−free operation with cheap transformers. Skip cycle offers a proven mean to reduce the standby power in no or light loads situations. Wide Switching−Frequency Offer Four different options are available: 40 kHz − 65 kHz – 100 kHz. Depending on the application, the designer can pick up the right device to help reducing magnetics or improve the EMI signature before reaching the 150 kHz starting point. Overcurrent Protection (OCP) When the auxiliary winding collapses below UVLOlow, the controller stops switching and reduces its consumption. It stays in this mode until Vcc reaches 4.9 V typical, where the startup source is reactivated and a new startup sequence is attempted. The power supply is thus operated in burst mode and avoids any lethal thermal runaway. When the default goes way, the power supply automatically resumes operation. Wide Duty−Cycle Operation Wide mains operation requires a large duty−cycle excursion. The NCP1203 can go up to 80% typically. Low Standby Power If SMPS naturally exhibit a good efficiency at nominal load, they begin to be less efficient when the output power demand diminishes. By skipping un−needed switching cycles, the NCP1203 drastically reduces the power wasted during light load conditions. In no−load conditions, the NCP1203 allows the total standby power to easily reach next International Energy Agency (IEA) recommendations. No Acoustic Noise while Operating Instead of skipping cycles at high peak currents, the NCP1203 waits until the peak current demand falls below a user−adjustable 1/3rd of the maximum limit. As a result, cycle skipping can take place without having a singing transformer … You can thus select cheap magnetic components free of noise problems. External MOSFET Connection By leaving the external MOSFET external to the IC, you can select avalanche proof devices which, in certain cases (e.g. low output powers), let you work without an active clamping network. Also, by controlling the MOSFET gate signal flow, you have an option to slow down the device commutation, therefore reducing the amount of ElectroMagnetic Interference (EMI). SPICE Model A dedicated model to run transient cycle−by−cycle simulations is available but also an averaged version to help you closing the loop. Ready−to−use templates can be downloaded in OrCAD’s Pspice and INTUSOFT’s from ON Semiconductor web site, NCP1203 related section. Overload Operation In applications where the output current is purposely not controlled (e.g. wall adapters delivering raw DC level), it is interesting to implement a true short−circuit protection. A short−circuit actually forces the output voltage to be at a low level, preventing a bias current to circulate in the optocoupler LED. As a result, the auxiliary voltage also decreases because it also operates in Flyback and thus duplicates the output voltage, providing the leakage inductance between windings is kept low. To account for this situation and properly protect the power supply, NCP1203 hosts a dedicated overload detection circuitry. Once activated, this circuitry imposes to deliver pulses in a burst manner with a low duty−cycle. The system auto−recovers when the fault condition disappears. During the startup phase, the peak current is pushed to the maximum until the output voltage reaches its target and the feedback loop takes over. The auxiliary voltage takes place after a few switching cycles and self−supplies the IC. In presence of a short circuit on the output, the auxiliary voltage will go down until it crosses the undervoltage lockout level of typically 7.8 V. When this happens, NCP1203 immediately stops the switching pulses and unbias all unnecessary logical blocks. The overall consumption drops, while keeping the gate grounded, and the VCC slowly falls down. As soon as VCC reaches typically 4.8 V, the startup source turns−on again and a new startup sequence occurs, bringing VCC toward 12.8 V as an attempt to restart. If the default has gone, then the power supply normally restarts. If not, a new protective burst is initiated, shielding the SMPS from any runaway. Figure 15, on the following page, portrays the typical operating signals in short circuit. NCP1203 http://onsemi.com 9 Figure 15. Typical Waveforms in Short Circuit Conditions 7.8 V 12.8 V 4.9 V VCC DRIVING PULSES Calculating the VCC Capacitor The VCC capacitor can be calculated knowing the IC consumption as soon as VCC reaches 12.8 V. Suppose that a NCP1203P60 is used and drives a MOSFET with a 30 nC total gate charge (Qg). The total average current is thus made of ICC1 (700 �A) plus the driver current, Fsw x Qg or 1.8 mA. The total current is therefore 2.5 mA. The �V available to fully startup the circuit (e.g. never reach the 7.8 V UVLO during power on) is 12.8–7.8 = 5 V. We have a capacitor who then needs to supply the NCP1203 with 2.5 mA during a given time until the auxiliary supply takes over. Suppose that this time was measured at around 15 ms. CVCC is calculated using the equation C � �t · i �V or C � 7.5 �F. Select a 22 �F/16 V and this will fit. Skipping Cycle Mode The NCP1203 automatically skips switching cycles when the output power demand drops below a given level. This is accomplished by monitoring the FB pin. In normal operation, pin 2 imposes a peak current accordingly to the load value. If the load demand decreases, the internal loop asks for less peak current. When this setpoint reaches a determined level (Vpin 1), the IC prevents the current from decreasing further down and starts to blank the output pulses: the IC enters the so−called skip cycle mode, also named controlled burst operation. The power transfer now depends upon the width of the pulse bunches (Figure 17). Suppose we have the following component values: Lp, primary inductance = 350 �H Fsw , switching frequency = 61 kHz Ip skip = 600 mA (or 333 mV/Rsense) The theoretical power transfer is therefore: 1 2 · Lp · Ip 2 · Fsw � 3.8 W If this IC enters skip cycle mode with a bunch length of 10 ms over a recurrent period of 100 ms, then the total power transfer is: 3.8 . 0.1 � 380 mW. To better understand how this skip cycle mode takes place, a look at the operation mode versus the FB level immediately gives the necessary insight: Figure 16. SKIP CYCLE OPERATION IP(min) = 333 mV/RSENSE NORMAL CURRENT MODE OPERATION FB 1 V 4.2 V, FB Pin Open 3.2 V, Upper Dynamic Range When FB is above the skip cycle threshold (1.0 V by default), the peak current cannot exceed 1.0 V/Rsense. When the IC enters the skip cycle mode, the peak current cannot go below Vpin1/3.3/Rsense. The user still has the flexibility to alter this 1.0 V by either shunting pin 1 to ground through a resistor or raising it through a resistor up to the desired level. Grounding pin 1 permanently invalidates the skip cycle operation. However, given the extremely low standby power the controller can reach, the PWM in no−load conditions can quickly enter the minimum ton and still transfer too much power. An instability can take place. We recommend in that case to leave a little bit of skip level to always allow