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cpu.pdf

cpu

kevin
2011-07-12 0人阅读 举报 0 0 暂无简介

简介:本文档为《cpupdf》,可适用于IT/计算机领域

MicroprogrammedCPUComputerOrganizationandArchitectureCourseDesignNAME:STUDENTNo:COURSE:PROJECT:DATE:MicroprogrammedCPUPurposeThepurposeofthisprojectistodesignasimpleCPU(CentralProcessingUnit)ThisCPUhasbasicinstructionset,andwewillutilizeitsinstructionsettogenerateaverysimpleprogramtoverifyitsperformanceForsimplicity,wewillonlyconsidertherelationshipamongtheCPU,registers,memoryandinstructionsetThatistosayweonlyneedconsiderthefollowingitems:ReadWriteRegisters,ReadWriteMemoryandExecutetheinstructionsAtleastfourpartsconstituteasimpleCPU:thecontrolunit,theinternalregisters,theALUandinstructionset,whicharethemainaspectsofourprojectdesignandwillbestudiedInstructionSetSingleaddressinstructionformatisusedinoursimpleCPUdesignTheinstructionwordcontainstwosections:theoperationcode(opcode),whichdefinesthefunctionofinstructions(addition,subtraction,logicoperations,etc)theaddresspart,inmostinstructions,theaddresspartcontainsthememorylocationofthedatumtobeoperated,wecalleditdirectaddressingInsomeinstructions,theaddresspartistheoperand,whichiscalledimmediateaddressingForsimplicity,thesizeofmemoryis×inthecomputerTheinstructionwordhasbitsTheopcodeparthasbitsandaddressparthasbitsTheinstructionwordformatcanbeexpressedinFigureTheopcodeoftherelevantinstructionsarelistedinTableInTable,thenotationxrepresentsthecontentsofthelocationxinthememoryForexample,theinstructionword(B)meansthattheCPUaddswordatlocationBinmemoryintotheaccumulator(ACC)theinstructionword()meansifthesignbitoftheACC(ACC)is,theCPUwillusetheaddresspartoftheinstructionastheaddressofnextinstruction,ifthesignbitis,theCPUwillincreasetheprogramcounter(PC)anduseitscontentastheaddressofthenextinstructionFigureMicroprogrammedCPUAlltheinstructionsexcepttheDivisioninstructionmustbesupportedinyourdesignItisbetterifyoucanimplementtheinstruction:DIVXAlso,youcandesignmoreinstructionsifneededYoumustdesignseveralprogramstotesttheseinstructionsAprogramisgivenasanexample:CalculatethesumofallintegersfromtoProgrammingwithClanguage:sum=temp=loop:sum=sumtemptemp=tempiftemp>=gotoloopendAssumeinthememory:sumisstoredatlocationA,tempisstoredatlocationA,thecontentsoflocationAis,thecontentsoflocationAis,thecontentsoflocationAis=WecantranslatetheaboveClanguageprogramwiththeinstructionslistedinTableintotheinstructionprogramasshowninTableMicroprogrammedCPUInternalRegistersandMemoryMAR(MemoryAddressRegister)MARcontainsthememorylocationofthewordtobereadfromthememoryorwrittenintothememoryHere,READoperationisdenotedastheCPUreadsfrommemory,andWRITEoperationisdenotedastheCPUwritestomemoryInourdesign,MARhasbitstoaccessoneofaddressesofthememoryMBR(MemoryBufferRegister)MBRcontainsthevaluetobestoredinmemoryorthelastvaluereadfrommemoryMBRisconnectedtotheaddresslinesofthesystembusInourdesign,MBRhasbitsPC(ProgramCounter)PCkeepstrackoftheinstructionstobeusedintheprogramInourdesign,PChasbitsMicroprogrammedCPUIR(InstructionRegister)IRcontainstheopcodepartofaninstructionInourdesign,IRhasbitsBR(BufferRegister)BRisusedasaninputofALUitholdsotheroperandforALUInourdesign,BRhasbitsACC(Accumulator)ACCholdsoneoperandforALU,andgenerallyACCholdsthecalculationresultofALUInourdesign,ACChasbitsMR(MultiplierRegister)MRisusedforimplementingtheMPYinstruction,holdingthemultiplieratthebeginningoftheinstructionWhentheinstructionisexecuted,itholdspartoftheproductDR(DivisionRegister)DRisusedforimplementingtheDIVinstruction,youcandefineitaccordingtoyourdivisionalgorithmLPMRAMDQLPMRAMDQisaRAMwithseparateinputandoutputports,itworksasmemory,anditssizeis×Althoughit’snotaninternalregisterofCPU,weneedittosimulateandtesttheperformanceofCPUAlltheregistersarepositiveedgetriggeredAlltheresetsignalsfortheregistersaresynchronizedtotheclocksignalALUALU(ArithmeticLogicUnit)isacalculationunitwhichaccomplishesbasicarithmeticandlogicoperationsInourdesign,someoperationsmustbesupportedwhicharelistedasfollowsMicroprogrammedCPUMicroprogrammedControlUnitIntroductionWehavelearnttheknowledgeofMicroprogrammedcontrolunitHere,weonlyreviewsometermsandbasicstructuresIntheMicroprogrammedcontrol,themicroprogramconsistsofsomemicroinstructionsandthemicroprogramisstoredincontrolmemorythatgeneratesallthecontrolsignalsrequiredtoexecutetheinstructionsetcorrectlyThemicroinstructioncontainssomemicrooperationswhichareexecutedatthesametimeMicroprogrammedCPUFigureshowsthekeyelementsofsuchanimplementationThesetofmicroinstructionsisstoredinthecontrolmemoryThecontroladdressregistercontainstheaddressofthenextmicroinstructionstobereadWhenamicroinstructionisreadfromthecontrolmemory,itistransferredtoacontrolbufferregisterTheregisterconnectstothecontrollinesemanatingfromthecontrolunitThus,readingamicroinstructionfromthecontrolmemoryisthesameasexecutingthatmicroinstructionThethirdelementshowninthefigureisasequencingunitthatloadsthecontroladdressregisterandissuesareadcommandControlWordFormatFigureControlWordFormatAbitControlWordisappliedinthedesign,whoseformatisshowninFigureTheControlWordismainlyhorizontal,withexceptiontotheJUMPfield,whichisdesignedverticallyMicroprogrammedCPUFieldFunctionInternalCPUControlSignals(bit)controlbitsfordatapathbetweenregistersandmemoryJumpCondition(bit)bitsfortheVirtualBranch*todeterminetheJumpworkAddressField(bit)bitsdesignatesnextmicroinstruction’saddressintheControlMemoryControlWordFieldandFunctionControlworddefinition:BitMeaning~OPUnusedUnusedC,DRDRC,DRDRC,DRC,ACCC,ACCALUC,ALUACCC,ALUBRC,PCPCC,MARPCC,MRALUC,BRMBRC,IRMBRC,PCMBRC,MARMBRC,ACCMBRC,RAMMBRC,MBRRAM~JUMPCONDITION~ADDRESSFIELDJumpcondition:nojumpCARCARunconditionaljump,CARADDRESSFILEDjumpaccordingtoopcode,CARADDRESSFIELDconditionaljump,ifflag=,CARADDRESSFIELDMicroprogrammedCPUOP:ADDSUBMPYANDORNOTSHLSHRControlUnitStructureForamicroprogrammedCPU,ControlUnitfunctionsasprovidingwithcontrolsignalsinternalCPUregistersandmemory,aswellasControlUnititself,accordingtothefeedbacksignalsandflagsfromwithoutATypicalDesignofControlUnitTypically,theControlUnitmustconsistofthefollowingelements:CAR,CBR,SequenceLogic,Branch,MultiplexerandControlMemoryThearchitectureofthiskindofControlUnitisdepictedinFigureThisControlUnitworksinthesequencedescribedbythefollowingfigureMicroprogrammedCPUTosimplifythewholeprocessandstructureofmicroprogrammedcontrolunit,wecombinetheentireCAR,CBRandtheliketogetherTheyareallincludedinthechip”CU”ByconnectingwithROM,itcanexactlysendoutdifferentinstructionsCUROMMicroprogrammedCPUCPUDesignFigureindicatesasimpleCPUarchitectureanditsuseofavarietyofinternaldatapathsandcontrolsignalsOurCPUdesignshouldbebasedonthisarchitectureYoushoulddeterminethecontrolsignalsaccordingtotheCPUarchitectureyou’reyourdesignAnexampleisgivenbelowtoshowtheprocedure,thisexampledescribesthecontrolunitdesignfortheLOADinstructionFirst,weneeddeterminethecontrolflowchartoftheLOADinstructionMicroprogrammedCPUMicroprogrammedCPUYoucandrawallofthecontrolflowchartsforeachinstructionanddeterminecorrespondingcontrolsignalsdescriptionsThecontrolmemorycanbeimplementedbyALTERALPMRAMDQinMAXPLUSsoftwareyoucanfindreferencefromitshelpdocumentortheAPPENDIXBeforeyoustarttodesign,pleaserefertochapterandchapterofthetextbook<<ComputerOrganizationandArchitecturedesigningforperformance>>Overallconnection:ToplevelconnectionVCCclkINPUTVCCclkINPUTVCCrstINPUTOMAROUTPUTOBROUTPUTOMROUTPUTOPCOUTPUTOMBROUTPUTODROUTPUTdatawrenaddressclockqlpmramdqinstaddressclockqlpmrominstRAMROMclkrstROMADRCLTOACCOMAROALUOMBROBROIROMRODRFLGOPCcpuinstROMADRclkRAMCLTCLTROMADRclkrstclkRAMOACCOMAROALUOBROIROMRODROPCFLAGMicroprogrammedCPUInternalconnectionofCPUclkccrstimbripcoptMARinstclkccrstiramiaccoptMBRinstclkrstcccccaccinbrinopcodeoutputoutdroutmrALUinstclkcrstimbroptIRinstCLTOACCOBRCLTCLTCLTCLTCLTrstclkOALUODROALUMRclkCLTCLTrstOMBROPCOMARclkCLTCLTrstOACCRAMOMBRclkCLTrstOMBROIRclkccrstimbroptPCinstclkccrstialuflgoptACCinstclkcrstimbroptBRinstclkcrstimroptMRinstOBRclkCLTrstOMBRCLTCLTclkrstOALUOMBRrstCLTCLTclkFLGOACCOPCclkCLTrstOMROALUMRCLTOUTPUTROMADROUTPUTclkrstflagirromcsgnromcndromadroutadroutcsgnCUinstROMADRROMADRclkrstFLGOIRROMROMROMMicroprogrammedCPUConnectionofCUCLTOUTPUTclkrstflagirromcsgnromcndromadroutadroutcsgnCUinstaddressclockqlpmrominstROMADrstFLGOIRROMROMROMclkclkROMclkSimulationAdditionHere,aexampleisraisedtotestthefunctionoftheCPUProblem:CalculatethesumofallintegersfromtoAssuminginthememory:sumisstoredatlocationAtempisstoredatlocationAthecontentsoflocationAisthecontentsoflocationAisthecontentsoflocationAisHA=HA=HA=HA=HProgramProgramwithInstructionsContentsofMemory(ram)inHexAddressContentssum=LOADASTOREAtemp=LOADASTOREAloop:sum=sumtempLOADAADDASTOREALOADAMicroprogrammedCPUSUBASTOREAiftemp>=gotoloopJMPGEZLOOPAAendHALTBCSTOREALOADSUBSTOREJMPGEZLOADADDSTOREOveralladditionresultEndingmsCLKusTotalcycleisMicroprogrammedCPUMultiplyLOADA()MPY()HALTCAccordingtothedatainthefigure,thefinalresultis,whichisrecordedinMR,added(showninSigneddec),inACCSotheresultis=*=DivisionLOADA()DIVD()HALTCInthiscase,,sotheresultis…Address=Multiply()ResultinALU()ResultinMR()InitialdataisRecyclingsubuntilflagis‘’ResultinDRisandinACCisMicroprogrammedCPUConclusionanddiscussionConclusionWecanseetheresultsofthesimulationThesimulationsofADD,MPYandDIVareallcorrectandcorrespondenttotherequirementoftheexperimentAtthesametime,allthefunctionsarewellaccordingtotheprinciplesThefeaturesofmydesignarebasicallythreefoldFirst,thecodeofthedesignispreciseandconciseaswellAllthefunctionsareincludedandtheprocedureisclearSecond,duringthecodifyingoftheCPU,IstrictlyaccordtotheprincipledescribedinthetaskEverypartoftheentirestructureiswellorganizedandwellconnectedAndtheprocedureisfluent,withoutanycontradictionThird,IcombinealltheinternalstructureofCUtoachip”CU”AlthoughthereisnotCARorCBR,alltheoperationsareincludedinsideit,sotheoverallinstructioncouldbemoreconvenientTobehonest,theoveralldesignoftheCPUisreallyinterestingandhelpedmetoenhancemyabilityofdoingresearchandlearningnewskillsAllthetheoriesareclearaftertheclassestheunderstandingofthedesignisfurthercompletedbyreferringtobooksrentedfromourlibraryHowever,theutilizationofthetoolslikeQuartusiskindofmissedandweneedsomemorereferencetopracticalbooksThishelpedmetoconcentratemyselfontheprocedureofthewholeexperimentIlearnedalotDiscussionAlthoughallthefunctionsandproceduresarestrictlyaccordingtotheprinciple,therearestilllotsofpromotiontobemadeSuchasthemicroinstructionscouldbesimplertoreducetheburdenofCUIcanalsousetheconceptofROMtofurthersimplifytheinnerstructureofCU,becausethefirststepofsearchinginstructioncanalsobeachievedinasmallerROMInthiscase,IachievethefunctionofDIVinthemicrooperations,IcanalsomakeitbycodifyingcertainloopsinALU,sotheoperationscanbesimplerMicroprogrammedCPUAppendixMicrooperationsMicrooperationsControlmemoryCurrentAddressJumpControladdressFieldConditionSignalFETCHt:MARPCCCARCARt:MBRRAMC,CPCPCCARCARt:IRMBRCCARCARt:CAROPMAPOPMAPLOADt:MARMBRACCARCARt:MBRRAMBCCARCARt:BRMBRCC,CACCCARCARt:ALUBRACCDC,CCARCAROP=t:ACCALUECCARCARt:MARPCFCCARSTOREt:MARMBRCCARCARt:MBRACCCCARCARt:RAMMBRCCARCARt:MARPCCCARADDxt:MARMBRECCARCARt:MBRRAMFCCARCARt:BRMBRCCARCARt:ALUBRACCC,CCARCAROP=MicroprogrammedCPUt:ACCALUCCARCARt:MARPCCCARSUBt:MARMBRCCARCARt:MBRRAMCCARCARt:BRMBRACCARCARt:ALUACCBRBC,CCARCAROP=t:ACCALUCCCARCARt:MARPCDCCARSHRt:ALUACCCCARCARt:ACCALUCCARCAROP=t:MARPCCCARSHLt:ALUACCCCCARCARt:ACCALUDCCARCAROP=t:MARPCECCARANDxt:MARMBRCCARCARt:MBRRAMCCARCARt:BRMBRCCARCARt:C,CALUBRACCOP=CARCARt:ACCALUACCARCARt:MARPCBCCARORxt:MARMBRCCARCAR

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