tps63020

L1 VIN VINA EN PS/SYNC GND L2 VOUT FB PGND L1 1.5 µH C2C1 VIN 1.8 V to 5.5 V VOUT 3.3 V up to 3 A TPS63021 PG Power Good Output TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 HIGH EFFICIENCY SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 4-A SWITCHES Check for Samples: TPS63020, TPS63021 1FEATURES APPLICATIONS • All Two-Cell and Three-Cell Alkaline, NiCd or2• Up to 96% Efficiency NiMH or Single-Cell Li Battery Powered • 3A Output Current at 3.3V in Step Down Mode Products(VIN = 3.6V to 5.5V) • Ultra Mobile PC's and Mobile Internet Devices • More than 2A Output Current at 3.3V in Boost • Digital Media PlayersMode (VIN > 2.5V) • DSC's and Camcorders • Automatic Transition Between Step Down and • Cellular Phones and SmartphonesBoost Mode • Personal Medical Products • Dynamic Input Current Limit • Industrial Metering Equipment • Device Quiescent Current less than 50mA • High Power LED's • Input Voltage Range: 1.8V to 5.5V • Fixed and Adjustable Output Voltage Options DESCRIPTION from 1.2V to 5.5V The TPS6302x devices provide a power supply • Power Save Mode for Improved Efficiency at solution for products powered by either a two-cell or Low Output Power three-cell alkaline, NiCd or NiMH battery, or a one-cell Li-Ion or Li-polymer battery. Output currents• Forced Fixed Frequency Operation at 2.4MHz can go as high as 3A while using a single-cell Li-Ionand Synchronization Possible or Li-Polymer Battery, and discharge it down to 2.5V • Smart Power Good Output or lower. The buck-boost converter is based on a • Load Disconnect During Shutdown fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain• Overtemperature Protection maximum efficiency. At low load currents, the • Overvoltage Protection converter enters Power Save mode to maintain high • Available in a 3 × 4-mm, QFN-14 Package efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. The maximum average current in the switches is limited to a typical value of 4A. The output voltage is programmable using an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is disconnected from the battery. The device is packaged in a 14-pin QFN PowerPAD™ package measuring 3 × 4 mm (DSJ). 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2010, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE DEVICE OPTIONS (1) OUTPUT VOLTAGETA PACKAGE MARKING PACKAGE PART NUMBER (2)DC/DC Adjustable PS63020 TPS63020DSJ –40°C to 85°C 14-Pin QFN 3.3 V PS63021 TPS63021DSJ (1) Contact the factory to check availability of other fixed output voltage versions. (2) For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this datasheet. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage range (2) VIN, VINA, L1, L2, VOUT, PS/SYNC, EN, FB, PG –0.3 7 V Operating junction, TJ –40 150 °CTemperature range Storage, Tstg –65 150 °C Human Body Model - (HBM) 3 kV ESD rating (3) Machine Model - (MM) 200 V Charge Device Model - (CDM) 1.5 kV (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. THERMAL INFORMATION TPS63020, TPS63021 THERMAL METRIC (1) UNITSDSJ 14 PINS qJA Junction-to-ambient thermal resistance (2) 41.8 qJC(TOP) Junction-to-case(top) thermal resistance (3) 47 qJB Junction-to-board thermal resistance (4) 17 °C/W yJT Junction-to-top characterization parameter (5) 0.9 yJB Junction-to-board characterization parameter (6) 16.8 qJC(BOTTOM) Junction-to-case(bottom) thermal resistance (7) 3.6 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as specified in JESD51-7, in an environment described in JESD51-2a. (3) The junction-to-case(top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. (4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. (5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).(6) The junction-to-board characterization parameter, yJB estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).(7) The junction-to-case(bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage at VIN, VINA 1.8 5.5 V Operating free air temperature range, TA –40 85 °C Operating junction temperature range, TJ –40 125 °C ELECTRICAL CHARACTERISTICS over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) DC/DC STAGE PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range 1.8 5.5 V VI Minimum input voltage for startup 0°C ≤ TA ≤ 85°C 1.5 1.8 1.9 V Minimum input voltage for startup 1.5 1.8 2.0 V VO TPS63020 output voltage range 1.2 5.5 V Minimum duty cycle in step down conversion 30% 40% VFB TPS63020 feedback voltage 495 500 505 mV TPS63021 output voltage PS/SYNC = VIN 3.267 3.3 3.333 V Maximum line regulation 0.5% Maximum load regulation 0.5% f Oscillator frequency 2200 2400 2600 kHz Frequency range for synchronization 2200 2400 2600 kHz ISW Average switch current limit VIN = VINA = 3.6 V, TA = 25°C 3500 4000 4500 mA High side switch on resistance VIN = VINA = 3.6 V 50 mΩ Low side switch on resistance VIN = VINA = 3.6 V 50 mΩ VIN and VINA 25 50 mAQuiescent IO = 0 mA, VEN = VIN = VINA = 3.6 V,Iq current VOUT = 3.3 VVOUT 5 10 mA TPS63021 FB input impedance VEN = HIGH 1 MΩ IS Shutdown current VEN = 0 V, VIN = VINA = 3.6 V 0.1 1 mA CONTROL STAGE Under voltage lockout threshold VINA voltage decreasing 1.4 1.5 1.6 VUVLO Under voltage lockout hysteresis 200 mV VIL EN, PS/SYNC input low voltage 0.4 V VIH EN, PS/SYNC input high voltage 1.2 V EN, PS/SYNC input current Clamped to GND or VINA 0.01 0.1 mA PG output low voltage VOUT = 3.3 V, IPGL = 10 mA 0.04 0.4 V PG output leakage current 0.01 0.1 mA Output overvoltage protection 5.5 7 V Overtemperature protection 140 °C Overtemperature hysteresis 20 °C Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS63020 TPS63021 VOUT L1 EN GND L2 PS/SYNC VINA FB P o w e rP a d L2 P G N D VIN L1 PG VIN VOUT P G N D P G N D P G N D P G N D P G N D P G N D P G N D TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com PIN ASSIGNMENTS DSJ PACKAGE (TOP VIEW) Pin Functions PIN I/O DESCRIPTION NAME NO. EN 12 I Enable input (1 enabled, 0 disabled) , must not be left open FB 3 I Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage versions GND 2 Control / logic ground L1 8, 9 I Connection for Inductor L2 6, 7 I Connection for Inductor PS/SYNC 13 I Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), must not be left open PG 14 O Output power good (1 good, 0 failure; open drain) PGND PowerPAD™ Power ground VIN 10, 11 I Supply voltage for power stage VOUT 4, 5 O Buck-boost converter output VINA 1 I Supply voltage for control stage PowerPAD™ Must be connected to PGND. Must be soldered to achieve appropriate power dissipation. 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 _ + PGND PGND VIN VOUT + - VREF PGND PGND FB VOUT L2L1 VIN VINA PS/SYNC EN GND VINA Current Sensor Gate Control Modulator Oscillator Device Control PG Temperature Control _ + _ + PGND PGND VIN VOUT + - VREF PGND PGND FB VOUT L2L1 VIN VINA PS/SYNC EN GND VINA Current Sensor Gate Control Modulator Oscillator Device Control PG Temperature Control _ + TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 FUNCTIONAL BLOCK DIAGRAM (TPS63020) FUNCTIONAL BLOCK DIAGRAM (TPS63021) Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPS63020 TPS63021 TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS TABLE OF GRAPHS DESCRIPTION FIGURE vs Input voltage (TPS63020, VOUT = 2.5 V / VOUT = 4.5 V) 1Maximum output current vs Input voltage (TPS63021, VOUT = 3.3V) 2 vs Output current (TPS63020, Power Save Enabled, VOUT = 2.5 V / VOUT = 4.5 V) 3 vs Output current (TPS63020, Power Save Disabled, VOUT = 2.5V / VOUT = 4.5V) 4 vs Output current (TPS63021, Power Save Enabled, VOUT = 3.3V) 5 vs Output current (TPS63021, Power Save Disabled, VOUT = 3.3V) 6 vs Input voltage (TPS63020, Power Save Enabled, VOUT = 2.5V, IOUT = {10; 500; 1000; 72000 mA}) vs Input voltage (TPS63020, Power Save Enabled, VOUT = 4.5V, IOUT = {10; 500; 1000; 82000 mA})Efficiency vs Input voltage (TPS63020, Power Save Disabled, VOUT = 2.5V, IOUT = {10; 500; 91000; 2000 mA}) vs Input voltage (TPS63020, Power Save Disabled, VOUT = 4.5V, IOUT = {10; 500; 101000; 2000 mA}) vs Input voltage (TPS63021, Power Save Enabled, VOUT = 3.3V, IOUT = {10; 500; 1000; 112000 mA}) vs Input voltage (TPS63021, Power Save Disabled, VOUT = 3.3V, IOUT = {10; 500; 121000; 2000 mA}) vs Output current (TPS63020, VOUT = 2.5 V) 13 Output voltage vs Output current (TPS63020, VOUT = 4.5 V) 14 vs Output current (TPS63021, VOUT = 3.3V) 15 Load transient response (TPS63021, VIN < VOUT, Load change from 500 mA to 1500 16 mA) Load transient response (TPS63021, VIN > VOUT, Load change from 500 mA to 1500 17 mA)Waveforms Line transient response (TPS63021, VOUT = 3.3V, IOUT = 1500 mA) 18 Startup after enable (TPS63021, VOUT = 3.3V, VIN = 2.4V, IOUT = 1500mA) 19 Startup after enable (TPS63021, VOUT = 3.3V, VIN = 4.2V, IOUT = 1500mA) 20 6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 Input Voltage (V) M a x im u m O u tp u t C u rr e n t (A ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 0.5 1 1.5 2 2.5 3 3.5 4 TPS63020 VOUT = 2.5V VOUT = 4.5V Input Voltage (V) M a x im u m O u tp u t C u rr e n t (A ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 0.5 1 1.5 2 2.5 3 3.5 4 TPS63021 VOUT = 3.3V Output Current (A) E ff ic ie n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 100µ 1m 10m 100m 1 4 TPS63020, Power Save Enabled VIN = 1.8V, VOUT = 2.5V VIN = 3.6V, VOUT = 2.5V VIN = 2.4V, VOUT = 4.5V VIN = 3.6V, VOUT = 4.5V Output Current (A) E ff ic ie n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 100µ 1m 10m 100m 1 4 TPS63020, Power Save Disabled VIN = 1.8V, VOUT = 2.5V VIN = 3.6V, VOUT = 2.5V VIN = 2.4V, VOUT = 4.5V VIN = 3.6V, VOUT = 4.5V TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 MAXIMUM OUTPUT CURRENT MAXIMUM OUTPUT CURRENT vs vs INPUT VOLTAGE INPUT VOLTAGE Figure 1. Figure 2. EFFICIENCY EFFICIENCY vs vs OUTPUT CURRENT OUTPUT CURRENT Figure 3. Figure 4. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS63020 TPS63021 Output Current (A) E ff ic ie n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 100µ 1m 10m 100m 1 4 TPS63021, Power Save Enabled VIN = 2.4V VIN = 3.6V Output Current (A) E ff ic ie n c y ( % ) 0 10 20 30 40 50 60 70 80 90 100 100µ 1m 10m 100m 1 4 TPS63021, Power Save Disabled VIN = 2.4V VIN = 3.6V Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63020, VOUT = 2.5V, Power Save Enabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63020, VOUT = 4.5V, Power Save Enabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com EFFICIENCY EFFICIENCY vs vs OUTPUT CURRENT OUTPUT CURRENT Figure 5. Figure 6. EFFICIENCY EFFICIENCY vs vs INPUT VOLTAGE INPUT VOLTAGE Figure 7. Figure 8. 8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63020, VOUT = 2.5V, Power Save Disabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63020, VOUT = 4.5V, Power Save Disabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63021, Power Save Enabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A Input Voltage (V) E ff ic ie n c y ( % ) 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0 10 20 30 40 50 60 70 80 90 100 TPS63021, Power Save Disabled IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 EFFICIENCY EFFICIENCY vs vs INPUT VOLTAGE INPUT VOLTAGE Figure 9. Figure 10. EFFICIENCY EFFICIENCY vs vs INPUT VOLTAGE INPUT VOLTAGE Figure 11. Figure 12. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TPS63020 TPS63021 Output Current (A) O u tp u t V o lt a g e ( V ) 2.4 2.45 2.5 2.55 2.6 100µ 1m 10m 100m 1 5 TPS63020, Power Save Disabled VIN = 3.6V Output Current (A) O u tp u t V o lt a g e ( V ) 4.4 4.45 4.5 4.55 4.6 100µ 1m 10m 100m 1 5 TPS63020, Power Save Disabled VIN = 3.6V V = 2.4 V, I = 500 mA to 1500 mAIN OUT Time 2 ms/div TPS63021 Output Voltage 50 mV/div, AC Output Current 500 mA/div, DC Output Current (A) O u tp u t V o lt a g e ( V ) 3.2 3.25 3.3 3.35 3.4 100µ 1m 10m 100m 1 5 TPS63021, Power Save Disabled VIN = 3.6V TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs OUTPUT CURRENT OUTPUT CURRENT Figure 13. Figure 14. OUTPUT VOLTAGE vs OUTPUT CURRENT LOAD TRANSIENT RESPONSE Figure 15. Figure 16. 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 V = 4.2 V, I = 500 mA to 1500 mAIN OUT Time 2 ms/div TPS63021 Output Voltage 50 mV/div, AC Output Current 500 mA/div, DC V = 3.0 V to 3.7 V, I = 1500 mAIN OUT Time 2 ms/div TPS63021 Output Voltage 50 mV/div, AC Input Voltage 500 mV/div, AC V = 2.4 V, R = 2.2IN L W Time 100 s/divm TPS63021 Enable 2 V/div, DC Output Voltage 1 V/div, DC Inductor Current 1 A/div, DC Voltage at L1 5 V/div, DC V = 4.2 V, R = 2.2IN L W Time 40 s/divm TPS63021 Enable 2 V/div, DC Output Voltage 1 V/div, DC Inductor Current 500 mA/div, DC Voltage at L2 5 V/div, DC TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE Figure 17. Figure 18. STARTUP AFTER ENABLE STARTUP AFTER ENABLE Figure 19. Figure 20. Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TPS63020 TPS63021 L1 VIN VINA EN PS/SYNC GND L2 VOUT FB PGND L1 C2C1 VIN VOUT TPS6302x PG Power Good Output C3 PS/SYNC R1 R2 R3 TPS63020 TPS63021 SLVS916 –APRIL 2010 www.ti.com PARAMETER MEASUREMENT INFORMATION Table 1. List of Components REFERENCE DESCRIPTION MANUFACTURER TPS63020 or TPS63021 Texas Instruments L1 1.5 mH, 4 mm x 4 mm x 2 mm XFL4020-152ML, Coilcraft C1 2 × 10 mF 6.3V, 0603, X7R ceramic GRM188R60J106KME84D, Murata C2 3 × 10 mF 6.3V, 0603, X7R ceramic GRM188R60J106KME84D, Murata C3 0.1 mF, X7R ceramic R1 Depending on the output voltage at TPS63020, 0 Ω at TPS63021 R2 Depending on the output voltage at TPS63020, not used at TPS63021 R3 1 MΩ 12 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916 –APRIL 2010 DETAILED DESCRIPTION CONTROLLER CIRCUIT The controller circuit of the device is based on an average current mode topology. The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses input and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the internal reference voltage to generate a stable and accurate output voltage. The controller circuit also senses the average input current. With this, maximum input power can be controlled to achieve a safe and stable operation under all possible conditions. To protect the device from overheating, an internal temperature sensor is implemented. Synchronous Operation The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion across all possible operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the 4-switch topology