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IBM

men1015
2010-10-27 0人阅读 举报 0 0 暂无简介

简介:本文档为《IBMpdf》,可适用于高等教育领域

DPSeraphimIFeinbergElectronicPackagingEvolutioninIBMAquartercenturyofinnovationinthedevelopmentofpackagingforsemiconductorshasculminatedintheannouncementoftheIBMSeriesofcomputersandtheIBMThistechnologyhasbeenbuiltonabroadandexpandingbasestartingwithpackagingfortheSeriesinthelatesInthenextseries,Systeml,IBMchosetofollowauniqueapproachwhichemployedsolderjointsforthesemiconductorconnections,allowingultimatelyahigherdensityandtotalnumberofinterconnectionscomparedtotherestoftheindustryThishasdriventhepackagingatthemoduleleveltoachieveextremelyhighdensityandhasledtomultichipinterconnectionsandmultilayersonthisjirstlevelofpackageThedramaticallyincreasingcircuitfunctionatthemodulelevelrequiresareaarraysofpinstobeabletogetenoughoftheminasmallareaThusthenextlevel(secondlevel)ofpackaginghaslikewisebeendriventoprovidemanylayersofdenseinterconnectionstolinktothemodulepinsNewtypesofplatedthroughholesjointhemanylayersofinterconnectionThehighlightsofthetechnicalapproacheswhichhavebeendevelopedoverthetwentyjiveyearperiodarediscussedbrieflyinthispaperIntroductionTheincreasingcomplexityofelectronicpackaginginIBMinthislastquartercenturyhasbeendrivenbyincreasingintegrationonthesemiconductorchipandthegrowthofcomputingpowerandperformanceinsystemsProjectionofwiringandwiringdensityforcircuitshasbeentreatedatvariouslevelsofsophisticationlforchipsandforpackagesTheinitialempiricalapproachbeganintheearlysbasedonthesystemsthathadbeenbuiltbythenItwasshownbyRentlthatthenumberofterminalsTsupplyingtheinputandoutputtoasetofcircuitfunctionswasexponentiallydependentonthetotalnumberofcircuitsC,T=ACP,whereAandpareconstantsIntheoriginalevaluationbyRent,AwaswhilepwasnearByusingthisrelationship,itispossibletobreakuptheentirepackaginginterconnectionsystemintoclustersofcircuitsandintosetsofconnectedinterfaces,someofwhicharepluggableThesearethechips,themoduleswhichmaycontainoneormorechips,thecards,andthebackpanels(orboards),eachofwhichcontainsafunctionorfunctionsTheRentliketrendlineisillustratedinFigforinputloutputterminalsversusmaximumcircuitspercomponentThelengthofwireinterconnectionwithinthesepackaginglevelsincreasesastheproductofthenumberofterminalsofthesubsetswithinthefunction,thenumberofinterconnectionsperterminal,andtheaveragelengthForexample,theinterconnectionlengthrequiredonamoduleisproportionaltotheproductofthenumberofchipsandthenumberofterminalsperchipOneinterconnectionobviouslyhastwoterminalsbutquiteoftenaterminalcanbecommontoseveralinterconnectionsLikewise,severalinputscanbeconnectedincommontoatransistorUsingtheseconsiderations,astatisticalinterconnectionlengthhasbeendevisedwhichincludestheglobalwiringTheincreasingsizeofthesystemcausestheglobalwiringtoincreaseTheseglobalwiresarethecontrolsforthefunctions,dataflowforthesystem,instructiondatapath,andmemorydatapathCopyrightbyInternationalBusinessMachinesCorporationCopyingispermittedwithoutpaymentofroyaltyprovidedthat(I)eachreproductionisdonewithoutalterationand()theJournalreferenceandIBMcopyrightnoticeareincludedonthefirstpageThetitleandabstractmaybeusedwithoutfurtherpermissionincomputerbasedandotherinformationservicesystemsPermissiontorepublishotherexcerptsshouldbeobtainedfromtheEditorDPSERAPHIMANDIFEINBERGIBMJRESDEVELOPVOLNOSEPTEMBERIIMaximumcircuitsperpackagecomponentFigureTrendofinputloutputterminalsversuscircuitsonmodulesFigureTheSystemSMSelectronicpackagePrintedcircuitcardswhicharefieldreplaceableunitsarepluggedintoabackpanelThebackpaneliswirewraptechnologyThethrustforhighperformancedrivesthepackagedesignertoeliminatefactorswhichdelaytimeofsignalpropagationorcauseexcessivecapacitiveorinductiveloadingonthecircuitsTheperformanceisincreasedbydecreasingthespacingbetweenthecomponentsIndeed,whatusedtobeaccomplishedonthesecondlevelofpackagingandincablingisnowbetteraccomplishedonthechipormodulewhilethepackageitselfwithitsdensemultilayerinterconnectionlargelyreplacesthecablingDPSERAPHIMANDIFEINBERGFigureTheSystedModelSLTelectronicpackagePrintedcircuitcardsplugintoaprintedcircuitbackpanelOnecardcanbeseentocontainasmanyasSLTmodulesOverthepastfewdecadesthedominantpackagingmaterialshavebeenceramicwithscreenednoblefrittedmetalinterconnectionsforthefirstlevelpackages(chipcarriers)andepoxyglasscompositedielectricwithcopperinterconnectionsforthesecondlevelpackages(theprintedcircuitcardsandboards)Signalandpowergridsandinterconnectionshavebeengreatlyincreasedthroughthemigrationofprintedcircuitsfromstructureswhichprovidedonesignalplanepriorto,twosignalplaneswithoneortwoembeddedpowerplanesintheearlylOs,totoday’spackagingenvironmentwheretomultilayerdesignsarecommonplaceAccompanyingthisevolutionwastheabilitytomanufacturecarrierswithincreasinglysmallerlinewidths,closerspacings,smallerholesizes,andgreateraspectratios(aspectratioequalsthicknessdividedbyholediameter)ThishasresultedintheuseoffewercomponentsandhasreducedtotalpackagingcostspercircuitinsystemsCoolingthecircuitsalsoincreasesindifficultyascircuitsarepackagedmoredenselyThegoodheattransfercharacteristicsofsiliconinthechips,ceramicinthemodules,andcopperinnerplanesinthesecondlevelpackage,alongwithatrendtowardhigherjunctiontemperatures,providedanevolutionarysolutiontothisproblemHowever,inthelatestgeneration(system)moredramaticinnovations,includingheatsinksandconductioncoolingfromthebackofchips,havebeenrequiredThepackagingfailurerateshavebeendecreasingbyordersofmagnitudeonapercircuitbasisThereliabilityimprovementhasbeenmadepossiblethroughuseofIBMIRESDEVELOPVOLNOSEPTEMBERFigureTheSystemModelMSTelectronicpackageUptomodulesaremountedonprintedcircuitcardspluggedintoaprintedcircuitbackpanelfewercomponentsandareductioninthetotalnumberofcontactsbetweencomponentsBecauseofthistrend,fieldmaintenancestrategyhasevolvedtohandlelargerfieldreplaceableunits(FRUs)Thus,quitelargesystemsliketheSeries,announcedbyIBMin,provideallinterconnectionononeprintedcircuitbackpanelcontainingplanesThisentirebackpanelisaFRU,asaretheprintedcircuitcardsInthispaperwedescribetheprogressinIBMindevelopingthechipcarriers,showtheprogressinconstructionofprintedcircuitbackpanels,anddiscusstheinnovationinpluggablecontactsystemsFromtimetotimewewillreferencetheindustryasabenchmarkThiseracoverscomputersystemsfromtheIBMSeriesthroughIBMSystem,System,Series,uptotheTheoverallsystemspackagingconceptsareshowninFigsthroughFirstlevelpackagingChipcarriersforsingledevicesThefunctionsofthefirstlevelpackage(ormodule)asachipcarrieraretoprovidethepropermechanical,thermal,andelectricalenvironmentwhileinterconnectingthechipterminalsandprovidingpinsasameansofinterfacingtothenextlevelofpackageThefirstchipcarriersweresmallsingledevicecarriers,hermeticallysealedmetalcanswithchipswirebondedtoaceramicbase,glasssealed,TOorthelike,andthesewereinsertedandsoldereddirectlyintothenextcardlevelofpackage,asweretheresistors,capacitors,andotherdiscretecomponentsThenextlevelofpackageFigureTheSeriesCOBelectronicpackageMultilayerceramicmodulescontaininguptoninechipsaresolderedintoprintedcircuitcardsThecardsarepluggedintoprintedcircuitbackpanelsFigureTheSystemlargeplanarboardLargeThermalConductionModules(TCMs)plugdirectlyintotheprintedcircuitbackpanelintegratedtheseintoapluggablefunctionalcircuitcontainingtotransistorsandasmanyresistorsThisfirstandsecondlevelpackageIOinIBMinthelateswascalledtheStandardModularSystem(SMS)andwasmadefrompaperepoxycontainingetchedcoppercircuitryononesideCarriersforsinglecircuitsInIBMintroducedSolidLogicTechnology(SLT)ll,whichintegratedthesemiconductorandresistoriIBMJRESDEVELOPVOLNOSEPTEMBERDPSERAPHIMANDIFEINBERGcardnotedaboveThemodulecontainedonecircuit,asdidtheSMScardTheSLTmodulewasapressedceramicpartwithholespreformedforpinsThiswasanewanduniqueceramicformulationwiththerequiredstrengthtowithstandpinningoperationsandthesurfacetexturetomeettherequirementsofscreenprintingItwasscreenedwithaninterconnectionpatternofgoldplatinumpastecontainingasmallamountofglassforadhesionThepasteformulationsweredesignedforbondstrengthandelectricalconductivityThesinteredpasteinterconnectionwassolderable,allowingmetallicwettingtothepinsandbetweenthepasteinterconnectionandthechipTheFigureProgressofchipcarriersdevelopedbyIBMintosolderenhancedtheconductivityoftheinterconnection:chipdevicespercamerincreasedfromonetonine,pinsandprovidedsufficientductilityforfatiguelifeofthechippercamerincreasedfromseveraltohundreds,circuitsfromlessjointGoldandnickelplatedcopperballsbetweenthethanonetothousandsTableChippackaging:SMScomparedtoSLTSMSSLTChipfaceupChipfacedownWirebondinterconnectionSolderbondinterconnectionCoolingthroughbackbondCoolingthroughsolderDiscreteresistorsScreenedfritresistorsHermeticsealGlasssealonchip,capcrimpedinterconnectionbondstomodule,plasticsealcomponents,providingthesetofcircuitfunctionsdesired,onaverysmallXmm(XOSin)ceramicsubstratewhichwasexceptionallywellsuitedformassproductionOneofthemaindifferencesbetweenSLTanditspredecessorSMSwastheintroductionofamoduletointerconnectindividualdevicestoformacircuitThesemodulesarecalledhybridintegratedcircuitsTheindividualdevicesinthemoduleswerenotseparatelyhousedintheirownpackageaswereSMSdevicesThus,acomparison(showninTable)ofSLTchipcarriers(ormodules)withSMSchipcarriershighlightswhatwasnewwhenIBMdevelopedSLTandwhereIBMdivergedfromtheapproachesusedbytherestoftheelectronicsindustryThiswasthebeginningofauniquetechnologybasewhichbroadened(Fig)insubsequentgenerationsasthedemandformorechipconnectionsincreasedTheSLTmoduleineffectreplacedtheSMSprintedcircuitpackageDPSERAPHIMANDIFEINBERGchipandthemodulecreatedapositivestandofftoguaranteeasolderedthicknessforfavorablefatiguebehaviorAwiderangeofresistorpasteswereformulatedtomeetpretrimmingohmicrequirementsTheyweremonitoredthroughthepinswhiletheywereautomaticallytrimmedbyremovalofmaterialtoarequiredresistanceThesemiconductorchipdeviceswereautomaticallyorientedbytheconfigurationoftheterminalswhiletheyclimbedasetoftracksinavibratingbowlTheywerepickedup,tested,positioned,andsolderedtothemoduleinterconnectionpatternsinoneautomaticmachineAsoldermeltingpointhierarchyforlandsandpinswasdevelopedsothatchipscouldbejoinedandmoduleslatersolderedintoprintedcircuitcardswithoutaffectingthechipbondsThemodulewasfinallyencapsulatedwithacoatingofsilicongelandplacedinacrimpedcanwithasiliconerubberfillerpouredintotheperipheryasabacksealCornerpinswereswagedtoprovidepositiveandcontrolledstandoffwhensolderedintoprintedcircuitcardsThispackaginghierarchywhichbuiltterminalsandpassivationintothedeviceatthewaferlevel,combinedwithautomaticchipjoiningtomodules,resultedinaveryhighproductioncapacitycomparedtothatofconventionalwirebondingtechniquesTheglasspassivatedchipdevicesnotonlymadetheultimateproductreliablebutalsomadeitpossibletoutilizeanactivesolderflux,and,moreimportantly,allowedtheuseofaplastic(nonhermetic)sealforthemoduleThedesigns,process,andtoolsachievedveryhighyieldsForexample,moduleyieldsfromchipjoiningtoshipmentweregreaterthanIBMJRESDEVELOPVOLNOSEPTEMBERChipcarriersforintegratedcircuitchipsItwaspossibleintointegrateuptocircuitsonaMonolithicSystemsTechnology(MST)chipAccordingly,thechipsgrewinsizeandrequireduptoterminalsforanaverageuseoforcircuitsperchipCopperballsusedinSLTasterminalsforthechipswerethenreplacedwithanevaporatedsolderjoint,controlledcollapsechipcontact(C),,whichdrewthechipsintoplacebysurfacetension,allowingtighterinterconnectiontolerancesandalsoaffordingafatigueresistantinterfacetothemoduleTheheightoftheCsolderpad(acriticalparameterinthefatigueresistantdesign)wascontrolledbythevolumeofsolderandthepadareascreenedonthemoduleMIThispadareawasdefinedbythelinewidthandasolderdamofscreenedandsinteredglassfritcrossingtheinterconnectionlineThesolderwaspartlysuppliedbywavesolderingthesurfaceofthemodule,butthemajoritywassuppliedwiththechipsForthefirsttime,areaarrayconnectionsweremadebetweenthechipandthemoduletoprovideimprovedpowersupplytothecenterofthechipsTheinterconnectionofthemodulewasfannedouttoanareaarrayofpinsFormemoryuseitwaspossibletointerconnectfourchipsonasubstrateandstacktwosubstratesThisprovidedveryaggressivedensitiesandsubstantialsavingsatthehigherlevelsofpackagingThemanufacturingtechniquesusedforSLTwereadaptable,withfurtherdevelopments,forMSTandmemorytechnologyByMetalOxideSemiconductorFieldEffectTransistor(MOSFET)andbipolardeviceintegrationonsemiconductorchipshadreachedtocircuits,requiringuptointerconnectionpinsonthemodulesTominimizethemodulesize,aXarrayofpinswassuppliedinaoneinchsquareareaCenterlocationswereleftfreeofpinstomakeroomforthechipsiteTherefinedpatternsandtolerancesresultingfromphotolithographictechnology(describedbelow)allowedadoublerowofCpadstobeusedaroundtheperimeterofthechippowerdistributioncouldalsobesuppliedonthemoduletothecenterofthechipThiswasbeyondthatachievablewiththetolerancesfromonelayerofscreenedfritthickfilmtechnologyAnewandextendibleevaporatedthinfilm(compositeCrCuCr)onceramicsubstrateswasdevisedtosupplyallofthefunctionsThebottomlayerofCractsasanadhesivetotheceramicwhilethetoplayerofCractsasasolderdamThecopperinterlayerissuperiorinconductivitycomparedtoitspastepredecessorandisalsoabetterbaseforsolderingAnautomatic~projectionprinterisusedtodefinetheinterconnectionpatterninthephotoresistAwiderangeofpartnumbersiseasilyadaptedtotheautomaticexposuresystemThegeneralschemeinitiatedinSLTforchiporienting,locating,andjoiningwasextendedtomeetmassproductionrequirementsAnewepoxybackseal,,muchlesspermeablethansiliconerubber,wasdevelopedforthemoduleThissealdesignprovidesacompliantconnectionbetweenthecapandtheceramicsubstrate,whichhavesubstantiallydifferentthermalexpansioncoefficientsWhileIBMpursuedthemetallizedceramic(MC)approach,thedualinlinepackage(DIP)becamethestandardoftheindustrythroughactionstakenbytheJointElectronDeviceEngineeringCouncil(JEDEC)TheleadframepinsalongthetwoedgesoftheDIPusedtopackagevendorchipswerecompatiblewiththestandardmilgridusedbyIBMTheDIPswereusedextensivelyalongwiththeMCTheDIPswereavailableeitherasplasticpackagesorasceramicpackagesHowever,whileIBMwasabletointegratefreelytoandpinsinalessthanXmmarray,theDIPswerelimitedbytheirpracticallengthdimensionsoflessthantwoinches,whichallowedonlypinsonthemilgridonthetwoedgesofthemoduleThedemandformoreinterconnectionsbroughtonanalternativeJEDECindustrystandardpackageutilizingallfouredgesofthechipcarrierThesepackages,withlargearraysofpins,arebecomingavailableintheindustrytodayMIMultichipchipcarriersforlargescaleintegrationIntegrationhascontinuedtoincrease,withdensitygrowingtobipolarcircuitsandseveralthousandMOSFETcircuitsperchipThusourRentrelationship(Fig)projectstheneedforacontinuedgrowthinterminalstoseveralhundredToaccommodatethisgrowththemetallizedceramictechnologyhasbeenextendedtommsquare(Fig)andlatertommsquareceramicsubstrateswithfinerlinestohandlethemorecloselyspacedterminalsonthechipsFinally,theuseofchipterminalssurpassedthecapabilitytointerconnectthemononeinterconnectionlayeronamoduleAtthisjuncturemanynewdevelopmentswererequiredandatechnologychangehadtobemadethatcouldbeextendedforfuturegenerationsTherefore,multilayermoduletechnologyintroducedamultichipmodulewhichreducedthetotalpackagingcostbydecreasingtheuseofhigherlevelsofpackaging,ie,cards,cables,andprintedcircuitboardsTheaddedprocessstepsofthemultilayertechnologyincreasedthepackagedcostperchip,butthiscostwasamortizedovermorethanonechip,decreasingthecostperinterconnectionIBMIRESDEVELOPVOLNOSEPTEMBERFigur

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