TL084CN

TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B, TL082Y, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Copyright  1992, Texas Instruments Incorporated 1 24 DEVICES COVER COMMERCIAL, INDUSTRIAL, AND MILITARY TEMPERATURE RANGES • Low-Power Consumption • Wide Common-Mode and Differential Voltage Ranges • Low Input Bias and Offset Currents • Output Short-Circuit Protection • Low Total Harmonic Distortion . . . 0.003% Typ • High Input Impedance . . . JFET-Input Stage • Internal Frequency Compensation (Except TL080, TL080A) • Latch-Up-Free Operation • High Slew Rate . . . 13 V/µs Typ • Common-Mode Input Voltage Range Includes VCC+ NC–No internal connection 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1 OUT 1 IN– 1 IN+ VCC+ 2 IN+ 2 IN– 2 OUT 4 OUT 4 IN– 4 IN+ VCC– 3 IN+ 3 IN– 3 OUT TL084, TL084A, TL084B D, J, N, OR PW PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 4 IN+ NC VCC– NC 3 IN+ 1 IN+ NC VCC+ NC 2 IN+ TL084M . . . FK PACKAGE (TOP VIEW) 1 IN – 1 O UT N C 3 O UT 3 IN – 4 O UT 4 IN – 2 IN – 2 O UT NC 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 NC VCC+ NC OUT NC NC IN– NC IN+ NC TL081M . . . FK PACKAGE (TOP VIEW) N C O FF SE T N 1 N C O FF SE T N 2 N C N C N C N C N C 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 NC 2 OUT NC 2 IN– NC NC 1 IN– NC 1 IN+ NC TL082M . . . FK PACKAGE (TOP VIEW) N C 1 O UT N C 2 IN + N C N C N C N C 1 2 3 4 8 7 6 5 N1/COMP IN– IN+ VCC– COMP VCC+ OUT OFFSET N2 TL080 D, P, OR PW PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 OFFSET N1 IN– IN+ VCC– NC VCC+ OUT OFFSET N2 TL081, TL081A, TL081B D, JG, P, OR PW PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 1 OUT 1 IN– 1 IN+ VCC– VCC+ 2 OUT 2 IN– 2 IN+ TL082, TL082A, TL082B D, JG, P, OR PW PACKAGE (TOP VIEW) V C C– V C C+ V C C– PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-STD-883, Class B, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B, TL082Y, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 2 symbols + – + – + – N1/COMP COMP IN+ IN– OFFSET N2 OUT TL080 OFFSET N1 IN+ IN– OUT IN+ IN– OUT TL082 (each amplifier) TL084 (each amplifier) TL081 OFFSET N2 description The TL08_ JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08_ family. Device types with a C suffix are characterized for operation from 0°C to 70°C, those with an I suffix are characterized for operation from –40°C to 85°C, and those with an M suffix are characterized for operation over the full military temperature range of –55°C to 125°C. AVAILABLE OPTIONS T VIO PACKAGE CHIP TA IO MAX at 25°C SMALL OUTLINE (D008) SMALL OUTLINE (D014) CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) TSSOP (PW) CHIP FORM (Y) 0°C 15 mV 15 mV 6 mV 3 mV TL080CD TL081CD TL081ACD TL081BCD — — — — — TL080CP TL081CP TL081ACP TL081BCP TL080CPW TL081CPW — 0°C to 70°C 15 mV 6 mV 3 mV TL082CD TL082ACD TL082BCD — — — — — TL082CP TL082ACP TL082BCP TL082CPW TL082Y 15 mV 6 mV 3 mV — TL084CD TL084ACD TL084BCD — — — TL084CN TL084ACN TL084BCN — TL084CPW TL084Y –40°C to 85°C 6 mV 6 mV 6 mV TL081ID TL082ID TL084ID TL084ID — — — TL084IN TL081IP TL082IP — — –55°C to 125°C 6 mV 6 mV 9 mV — — TL081MFK TL082MFK TL084MFK TL084MJ TL081MJG TL082MJG — — — — The D package is available taped and reeled. Add R suffix to device type, (e.g., TL080CDR). TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 3 schematic (each amplifier) C1 VCC+ IN+ OFFSET N2 COMP VCC– OFFSET N1 1080 Ω 1080 Ω N1/COMP IN– TL081 Only 64 Ω 128 Ω 64 Ω OUT Only TL080 C1 = 18 pF on TL081, TL082, and TL084 only (including their suffix versions). Component values shown are nominal. OFFSET N2 TL082Y JFET-INPUT DUAL OPERATIONAL AMPLIFIER SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 4 chip information These chips, when properly assembled, display characteristics similar to the TL082. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10% ALL DIMENSIONS ARE IN MILS PIN (4) INTERNALLY CONNECTED TO BACKSIDE OF CHIP + – 2 OUT 1 IN+ 1 IN– VCC+ (8) (6) (3) (2) (5) (1) – +(7) 2 IN+ 2 IN– 1 OUT (4) VCC– TL084Y JFET-INPUT QUAD OPERATIONAL AMPLIFIER SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 5 chip information These chips, when properly assembled, display characteristics similar to the TL084. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10% ALL DIMENSIONS ARE IN MILS PIN (11) INTERNALLY CONNECTED TO BACKSIDE OF CHIP + – 1 OUT 1 IN+ 1 IN– VCC+ (4) (6) (3) (2) (5) (1) – +(7) 2 IN+ 2 IN– 2 OUT (11) VCC– + – 3 OUT 3 IN+ 3 IN– (13) (10) (9) (12) (8) – +(14) 4 OUT 4 IN+ 4 IN– TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 6 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) TL08_C TL08_AC TL08_BC TL08_I TL08_M UNIT Supply voltage, VCC+ (see Note 1) 18 18 18 V Supply voltage VCC– (see Note 1) –18 –18 –18 V Differential input voltage (see Note 2) ± 30 ± 30 ± 30 V Input voltage (see Notes 1 and 3) ±15 ±15 ±15 V Duration of output short circuit (see Note 4) unlimited unlimited unlimited Continuous total dissipation See Dissipation Rating Table Operating free-air temperature range 0 to 70 – 40 to 85 – 55 to 125 °C Storage temperature range – 65 to 150 – 65 to 150 – 65 to 150 °C Case temperature for 60 seconds FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J or JG package 300 °C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D, N, P, or PW package 260 260 °C NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. 2. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°CPOWER RATING DERATING FACTOR DERATE ABOVE TA TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D (8 Pin) 680 mW 5.8 mW/ °C 32 °C 464 mW 377 mW N/A D (14 Pin) 680 mW 7.6 mW/ °C 60 °C 608 mW 494 mW N/A FK 680 mW 11.0 mW/ °C 88 °C 680 mW 680 mW 275 mW J 680 mW 11.0 mW/ °C 88 °C 680 mW 680 mW 275 mW JG 680 mW 8.4 mW/ °C 69 °C 672 mW 546 mW 210 mW N 680 mW 9.2 mW/ °C 76 °C 680 mW 598 mW N/A P 680 mW 8.0 mW/°C 65 °C 640 mW 520 mW N/A PW (8 Pin) 525 mW 4.2 mW/°C 25 °C 336 mW N/A N/A PW (14 Pin) 700 mW 5.6 mW/ °C 25 °C 448 mW N/A N/A TL080, TL081, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 1443 HOUSTON, TEXAS 77001POST OFFICE BOX 655303 DALLAS, TEXAS 75265• • 7 el ec tr ic al c ha ra ct er is tic s, V CC ± = ±1 5 V (u nle ss ot he rw ise no ted ) PA R A M ET ER TE ST C O ND IT IO NS † TL 08 0C TL 08 1C TL 08 2C TL 08 4C TL 08 1A C TL 08 2A C TL 08 4A C TL O 81 BC TL 08 2B C TL 08 4B C TL 08 1I TL 08 2I TL 08 4I UN IT M IN TY P M A X M IN TY P M A X M IN TY P M A X M IN TY P M A X V I O In pu to ffs et vo lta ge V O = 0, T A = 2 5° C 3 15 3 6 2 3 3 6 m V V I O In pu t o ffs et vo lta ge R S = 5 0 Ω T A = fu ll r an ge 20 7. 5 5 9 m V α VI O Te m pe ra tu re c oe ffi cie nt o f i np ut o ffs et v o lta ge V O = 0 , T A = fu ll r an ge R S = 5 0 Ω , 18 18 18 18 µV /° C I IO In pu to ffs et cu rr e n t‡ V O = 0 T A = 2 5° C 5 20 0 5 10 0 5 10 0 5 10 0 pA I IO In pu t o ffs et cu rr e n t‡ V O = 0 T A = fu ll r an ge 2 2 2 10 n A I IB In pu tb ia s cu rr e n t‡ V O = 0 T A = 2 5° C 30 40 0 30 20 0 30 20 0 30 20 0 pA I IB In pu t b ia s cu rr e n t‡ V O = 0 T A = fu ll r an ge 10 7 7 20 n A V I CR Co m m on -m od e in pu t v ol ta ge ra ng e T A = 2 5° C ± 11 – 12 to 15 ± 11 – 12 to 15 ± 11 – 12 to 15 ± 11 – 12 to 15 V V M ax im um pe ak T A = 2 5° C R L = 1 0 kΩ ± 12 ± 13 .5 ± 12 ± 13 .5 ± 12 ± 13 .5 ± 12 ± 13 .5 V V O M M a xi m u m p ea k o u tp ut v ol ta ge s wi ng T A = fu llr a n ge R L ≥ 10 k Ω ± 12 ± 12 ± 12 ± 12 V O M o u tp ut vo lta ge sw in g T A = fu ll r a n ge R L ≥ 2 kΩ ± 10 ± 12 ± 10 ± 12 ± 10 ± 12 ± 10 ± 12 A V D La rg e- sig na l d iffe re nt ia l V O = ± 10 V , T A = 2 5° C R L ≥ 2 k Ω , 25 20 0 50 20 0 50 20 0 50 20 0 V/ m V A V D g g vo lta ge a m pl ific at io n V O = ± 10 V , T A = fu ll r an ge R L ≥ 2 kΩ , 15 25 25 25 V/ m V B 1 Un ity -g ai n ba nd wi dt h T A = 2 5° C 3 3 3 3 M H z r i In pu t r es ist an ce T A = 2 5° C 10 12 10 12 10 12 10 12 Ω CM RR Co m m on -m od e V I C = V IC R m in , V O = 0 , 70 86 80 86 80 86 80 86 dB CM RR re jec tio n r ati o R S = 5 0 Ω , T A = 2 5° C 70 86 80 86 80 86 80 86 dB k S VR Su pp ly vo lta ge re jec tio n V C C = ± 15 V to ± 9 V, V O = 0 , 70 86 80 86 80 86 80 86 dB k S VR pp y g j ra tio (∆ V C C± /∆ V I O ) R S = 5 0 Ω , T A = 2 5° C 70 86 80 86 80 86 80 86 dB I C C Su pp ly cu rre nt (pe r a mp lifi er) N o lo ad , T A = 2 5° C V O = 0 , 1. 4 2. 8 1. 4 2. 8 1. 4 2. 8 1. 4 2. 8 m A V 0 1/ V 0 2 Cr os st al k a tte nu at io n A V D = 1 00 , T A = 2 5° C 12 0 12 0 12 0 12 0 dB † A ll ch ar ac te ris tic s ar e m ea su re d un de r o pe n- lo op c on di tio ns w ith z er o co m m on -m od e vo lta ge u nl es s ot he rw ise s pe cif ie d. F ul l r an ge fo r T A is 0 ° C to 7 0° C fo r T L0 8_ C, T L0 8_ AC , TL 08 _B C a n d –4 0° C to 8 5° C fo r T L0 8_ I. ‡ I np ut bi as cu rre nt s o f a F ET - in pu t o pe ra tio na l a m pl ifie r a re n or m al ju nc tio n r ev ers e c urr en ts, w hic h a re tem pe rat ure se ns itiv e a s s ho wn in Fi gu re 18 . P uls e t ec hn iqu es m us t b e u se d th at w ill m ai nt ai n th e jun cti on te mp era tur e a s c los e t o t he am bie nt tem pe rat ure as po ss ibl e. TL081M, TL082M, TL084M JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 8 electrical characteristics, VCC ±= ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS† TL081M, TL082M TL084M UNITPARAMETER TEST CONDITIONS† MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage VO = 0 RS = 50 Ω TA = 25°C 3 6 3 9 mVVIO Input offset voltage VO = 0, RS = 50 Ω TA = –55°C to 125°C 9 15 mV αVIO Temperature coefficient of input offset voltage VO = 0, TA = –55°C to 125°C RS= 50 Ω, 18 18 µV/°C IIO Input offset current‡ VO = 0 TA = 25°C 5 100 5 100 pAIIO Input offset current‡ VO = 0 TA = 125°C 20 20 nA IIB Input bias current‡ VO = 0 TA = 25°C 30 200 30 200 pAIIB Input bias current‡ VO = 0 TA = 125°C 50 50 nA VICR Common-mode input voltage range TA = 25 °C ±11 ±12 to 15 ±11 ± 12 to 15 V V Maximum peak TA = 25 °C, RL = 10 kΩ ±12 ±13.5 ±12 ±13.5 VVOM Maximum peak output voltage i TA = –55°C to 125°C RL ≥ 10 kΩ ±12 ±12 VOM swing TA = –55°C to 125°C RL ≥ 2 kΩ ±10 ±12 ±10 ±12 AVD Large-signal differential voltage VO = ±10 V, TA = 25°C RL ≥ 2 kΩ, 25 200 25 200 V/mVAVD differential voltage amplification VO = ±10 V, TA = –55°C to 125°C RL ≥ 2 kΩ, 15 15 V/mV B1 Unity-gain bandwidth TA = 25 °C 3 3 MHz ri Input resistance TA = 25 °C 1012 1012 Ω CMRR Common-mode rejection ratio VIC = VICR min, RS = 50 Ω, VO = 0, TA = 25°C 80 86 80 86 dB kSVR Supply voltage rejection ratio (∆VCC± /∆VIO) VCC = ±15 V to ±9 V, RS = 50 Ω, VO = 0, TA = 25°C 80 86 80 86 dB ICC Supply current (per amplifier) No load, VO = 0, TA = 25°C 1.4 2.8 1.4 2.8 mA V01/V02 Crosstalk attenuation AVD = 100, TA = 25°C 120 120 dB † All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 18. Pulse techniques must be used that will maintain the junction temperatures as close to the ambient temperature as is possible. operating characteristics, VCC± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = 10 V, CL = 100 pF, RL = 2 kΩ, See Figure 1 8 ∗ 13 V/µsSR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, TA = – 55 °C to 125 °C, CL = 100 pF, See Figure 1 5 ∗ V/µs tr Rise time VI = 20 mV, RL = 2 kΩ, 0.05 µs Overshoot factor CL = 100 pF, See Figure 1 20% Vn Equivalent input noise voltage RS = 100 Ω f = 1 kHz 18 nV/√Hz Vn Equivalent input noise voltage RS = 100 Ω f = 10 Hz to 10 kHz 4 µV In Equivalent input noise current RS = 100 Ω, f = 1 kHz 0.01 pA/√Hz THD Total harmonic distortion VO(rms) = 10 V,f = 1 kHz RS ≤ 1 kΩ, RL ≥ 2 kΩ, 0.003% ∗On products compliant to MIL-STD-883, Class B, this parameter is not production tested. TL080, TL081, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 9 TL082Y, TL084Y electrical characteristics, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS† MIN TYP MAX UNIT VIO Input offset voltage VO = 0, RS = 50 Ω, TA = 25°C 3 15 mV αVIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω, TA = 25°C 18 µV/ °C IIO Input offset current‡ VO = 0, TA = 25°C 5 200 pA IIB Input bias current‡ VO = 0, TA = 25°C 30 400 pA VICR Common-mode input voltage range TA = 25°C ±11 –12 to 15 V VOM Maximum peak output voltage swing TA = 25°C, RL = 10 kΩ ±12 ±13.5 V AVD Large-signal differential voltage amplification VO = ±10 V, TA = 25°C, RL ≥ 2 kΩ 25 200 V/mV B1 Unity-gain bandwidth TA = 25°C 3 MHz ri Input resistance TA = 25°C 1012 Ω CMRR Common-mode rejection ratio VIC = VICR min, VO = 0, 70 86 dBCMRR Common-mode rejection ratio RS = 50 Ω, TA = 25°C 70 86 dB kSVR Supply voltage rejection ratio (∆VCC± / ∆VIO) VCC = ±15 V to ± 9 V, VO = 0, 70 86 dBkSVR Supply voltage rejection ratio (∆VCC± / ∆VIO) RS = 50 Ω, TA = 25°C 70 86 dB ICC Supply current (per amplifier) No load, VO = 0, TA = 25°C 1.4 2.8 mA V01/V02 Crosstalk attenuation AVD = 100, TA = 25°C 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 18. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. operating characteristics, VCC± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VI = 10 V,CL = 100 pF, RL = 2 kΩ, See Figure 1 8 13 V/µs tr Rise time VI = 20 mV, RL = 2 kΩ, 0.05 µs Overshoot factor CL = 100 pF, See Figure 1 20% Vn Equivalent input noise voltage RS = 100 Ω f = 1 kHz 18 nV/√Hz Vn Equivalent input noise voltage RS = 100 Ω f = 10 Hz to 10 kHz 4 µV In Equivalent input noise current RS = 100 Ω, f = 1 kHz 0.01 pA/√Hz THD Total harmonic distortion VO(rms) = 10 V,f = 1 kHz RS ≤ 1 kΩ, RL ≥ 2 kΩ, 0.003% TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B, TL082Y, TL084Y JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 10 PARAMETER MEASUREMENT INFORMATION VI VI CL = 100 pF RL = 2 kΩ CC = 18 pF for TL080 10 kΩ 1 kΩ RL CL = 100 pF 100 kΩ C2 C1 N1 500 pF TL080 + – + – + – Figure 1. Unity-Gain Amplifier Figure 2. Gain-of-10 Inverting Amplifier Figure 3. Feed-Forward Compensation 2 MΩ N2 CC COMP TL080 1 MΩ VCC+ TL081 N2 N1 100 kΩ 1.5 kΩ VCC– N1 + – + – Figure 4. TL080 Input Offset Voltage Figure 5. TL081 Input Offset Voltage Null Circuit Null Circuit TL080, TL081, TL082, TL084, TL081A, TL082A, TL084A TL081B, TL082B, TL084B JFET-INPUT OPERATIONAL AMPLIFIERS SLOS081A–D2297, FEBRUARY 1977–REVISED NOVEMBER 1992 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 11 TYPICAL CHARACTERISTICS† MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ±15 ±12.5 ±10 ±7.5 ±5 ±2.5 0 f – Frequency – Hz 100 1 k 10 k 100 k 1 M 10 M RL = 10 kΩ TA = 25°C See Figure 2 VCC± = ±15 V VCC± = ±10 V VCC± = ±5 V – M ax im um P ea k O ut pu t V o lta ge – V MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY VCC± = ±5 V VCC± = ±10 V VCC± = ±15 V RL = 2 kΩ TA = 25°C ±15 ±12.5 ±10 ±7.5 ±5 ±2.5 0 f – Frequency – Hz 100 1 k 10 k 1 M 10 M See Figure 2 100 k V O M – M ax im um P ea k O ut pu t V o lta ge – V V O M Figure 6 Figure 7 0 ±2.5 ±5 ±7.5 ±10 ±12.5 ±15 10 k 40 k 100 k 400 k 1 M 4 M 10 M VCC± = ±15 V RL = 2 kΩ See Fi