R5460N208AF-TR-F

R5460N208AF - 1/14 - PRODUCT SPECIFICATIONS R5460N208AF-TR-F contents [1] Outline [2] Block Diagram [3] Pin Description [4] Absolute Maximum Ratings [5] Electrical Characteristics [6] Test Circuits [7] Operation [8] Technical Notes on External Components [9] Timing Diagrams [10] Package Dimensions [11] Mark Specification R5460N208AF - 2/14 - [1] Outline The R5460N208AF is high voltage CMOS-based protection ICs for over-charge/discharge of rechargeable two-cell Lithium-ion (Li+) / Lithium polymer, further include a short circuit protection circuit for preventing large external short circuit current and the protection circuits against the excess discharge-current and excess charge current. Each of these ICs is composed of six voltage detectors, a reference unit, a delay circuit, a short circuit protector, an oscillator, a counter, and a logic circuit. When the over-charge voltage threshold crosses the each detector threshold from a low value to a high value, the output of COUT pin switches to “L” level after internal fixed delay time. To release over-charge detector after detecting over-charge, or the detector will be released and the output of COUT becomes "H" when a kind of load is connected to VDD after a charger is disconnected from the battery pack and the cell voltage becomes lower than over-charge detector threshold. Even if a charger is continuously connected to the battery pack, when the cell voltage becomes lower than the over-charge detector released voltage, over-charge state is released. The output of DOUT pin, the output of the over-discharge detector and the excess discharge-current detector, switches to “L” level after internally fixed delay time, when discharged voltage crosses the detector threshold from a high value to a value lower than the threshold. To release over-discharge detector, after detecting over-discharge voltage, connect a charger to the battery pack, and when the battery supply voltage becomes higher than the released voltage from over-discharge, the over-discharge detector is released. In other words, the over-discharge voltage detector has hysteresis. Even though a battery is discharged to 0V, charge current is acceptable. After detecting excess-discharge current or short current, when the load is disconnected, the excess discharged or short condition is released and DOUT becomes “H”. After detecting over-discharge voltage, the supply current will be kept extremely low by halting internal circuits' operation. When the output of COUT is “H”, if V- pin level is set at typically equal or lower than -1.6V, the delay time of detectors can be shortened. Especially, the delay time of the over-charge detector can be reduced into approximately 1/60 and the test time for protection circuit of PCB can be reduced. The output type of COUT and DOUT is CMOS. R5460N208AF - 3/14 - [2] Block Diagram [3] Pin Description Pin No. Symbol Pin description 1 DOUT Output pin of Over-discharge detection, CMOS output 2 COUT Output pin of Over-charge detection, CMOS output 3 V- Charger negative Input Pin 4 Vc Input Pin of the center voltage between two-cell 5 VDD Power Supply pin. Substrate level of the IC. 6 Vss Vss pin. (GND pin of the IC) VD1U VD3 Counter DS Circuit Oscillator Short Detector Logic Circuit Level Shift Logic Circuit Delay VD2L VD2U VD1L VD4 VDD Vc VSS DOUT COUT V- R5460N208AF - 4/14 - [4] Absolute Maximum Rating Topt=25°C, Vss=0V Item Symbol Ratings Unit Supply Voltage VDD -0.3 to 12 V Input Voltage Middle pin Voltage between 2-cell V- pin Voltage (Charger negative input) Vc V- Vss-0.3 to VDD+0.3 VDD-30 to VDD+0.3 V V Output Voltage COUT pin Voltage DOUT pin Voltage VCOUT VDOUT VDD-30 to VDD+0.3 Vss-0.3 to VDD+0.3 V V Power Dissipation PD 150 mW Operating Temperature Topr -40 to 85 °C Storage Temperature Tstg -55 to 125 °C *Note: Exposure to the condition exceeded the absolute maximum ratings may cause the permanent damages and affects the reliability and safety of both device and systems using the device. The functional operations cannot be guaranteed beyond specified values in the recommended conditions. R5460N208AF - 5/14 - [5] Electrical Characteristics •R5460N208AF Unless otherwise specified Topt=25°C Item Symbol Conditions Min. Typ. Max. Unit Note1 Operating Input Voltage VDD1 VDD-VSS 1.5 10 V A Minimum Operating Voltage for 0V Charge Vst Voltage Defined as VDD-V-, VDD-VSS=0V 1.8 V A Cell1 Over-charge Threshold Voltage VDET1U R1=330Ω R1=330Ω, (Topt=-5°C to 55°C)*Note2 4.225 4.220 4.250 4.250 4.275 4.280 V V B B Cell1 Released Voltage VREL1U R1=330Ω 4.000 4.050 4.100 V B Cell2 Over-charge Detector threshold VDET1L R2=330Ω R2=330Ω, (Topt=-5°C to 55°C)*Note2 4.225 4.220 4.250 4.250 4.275 4.280 V V C C Cell2 Released Voltage VREL1L R2=330Ω 4.000 4.050 4.100 V C Output Delay of Over-charge tVDET1 VDD-VC=3.2V to 4.5V VC-VSS=3.2V 0.7 1.0 1.3 s B Output Delay of Release from Over-charge tVREL1 VDD-VC=4.5V to 3.2V, VC-VSS=3.2V 11 16 21 ms B Cell1 Over-discharge Threshold VDET2U Detect falling edge of the input voltage 2.340 2.400 2.460 V D Cell1 Release Voltage from Over-discharge Voltage VREL2U Detect rising edge of the input voltage 2.925 3.000 3.075 V D Cell2 Over-discharge Threshold VDET2L Detect falling edge of the input voltage 2.340 2.400 2.460 V E Cell2 Release Voltage from Over-discharge voltage VREL2L Detect rising edge of the input voltage 2.925 3.000 3.075 V E Output Delay of Over-discharge tVDET2 VDD-VC=3.2V to 1.9V VC-VSS =3.2V 89 128 167 ms D Release Delay for VD2 tVREL2 VDD-VC =1.9V to 3.2V VC-VSS =3.2V 0.7 1.2 1.7 ms D Excess Discharge-current Threshold VDET3 Detect rising edge of 'V-' pin voltage 0.185 0.200 0.215 V F Output Delay of Excess Discharge-current tVDET3 VDD-VC=3.2V,VC-VSS=3.2V V-=0V to 0.5V 8 12 16 ms F Output Delay of Release from Excess Discharge-current tVREL3 VDD-VC=3.2V,VC-VSS=3.2V V-=3V to 0V 0.7 1.2 1.7 ms F Short Protection Voltage Vshort VDD-VC=3.2V,VC-VSS=3.2V 0.7 1.1 1.5 V F Delay Time for Short Protection tshort VDD-VC=3.2V,VC-VSS=3.2V V-=0V to 6.4V 150 300 500 µs F Reset Resistance for Excess Current Protection Rshort VDD-VC=3.2V,VC-VSS=3.2V V-=1V 25 40 75 kΩ F Excess Charge-current Threshold VDET4 Detect falling edge of 'V-' pin voltage -0.230 -0.200 -0.170 V G Output Delay of Excess Charge-current tVDET4 VDD-VC=3.2V, VC-VSS=3.2V V-=0V to -1V 5 8 11 ms G Output Delay of Release from Excess Charge-current tVREL4 VDD-VC=3.2V, VC-VSS=3.2V V-=-1V to 0V 0.7 1.2 1.7 ms G Delay Shortening Mode Voltage VDS VDD-VC=4.0V, VC-VSS=4.0V -2.2 -1.6 -1.0 V G Nch ON-Voltage of COUT VoL1 Iol=50µA, VDD-VC=4.5V VC-VSS=4.5V 0.4 0.5 V H Pch ON-Voltage of COUT VoH1 Ioh=-50µA, VDD-VC=3.2V VC-VSS=3.2V 6.8 7.4 V I Nch ON-Voltage of DOUT VoL2 Iol=50µA, VDD-VC=1.9V VC-VSS=1.9V 0.2 0.5 V J Pch ON-Voltage of DOUT VoH2 Ioh=-50µA, VDD-VC=3.2V VC-VSS=3.2V 6.8 7.4 V K Supply Current IDD VDD-VC=3.2V, VC-VSS=3.2V V-=0V 4.0 8.0 µA L Standby Current Istandby VDD-VC=1.9V, VC-VSS=1.9V 0.1 µA L •: ’Note1’ indicates test circuits shown in next page. Note2: Considering of variation in process parameters, we compensate for this characteristic related to temperature by laser-trim, however, this specification is guaranteed by design, not tested. R5460N208AF - 6/14 - •R5460N208AF Topt=-40°C～+85℃ Item Symbol Conditions Min. Typ. Max. Unit Note1 Operating Input Voltage VDD1 VDD-VSS 1.5 10 V A Minimum Operating Voltage for 0V Charge Vst Voltage Defined as VDD-V-, VDD-VSS=0V 1.96 V A Cell1 Over-charge Threshold Voltage VDET1U R1=330Ω 4.198 4.250 4.289 V B Cell1 Released Voltage VREL1U R1=330Ω 3.967 4.050 4.104 V B Cell2 Over-charge Detector threshold VDET1L R2=330Ω 4.200 4.250 4.287 V C Cell2 Released Voltage VREL1L R2=330Ω 3.965 4.050 4.104 V C Output Delay of Over-charge tVDET1 VDD-VC=3.2V to 4.5V VC-VSS=3.2V 0.57 1.0 1.83 s B Output Delay of Release from Over-charge tVREL1 VDD-VC=4.5V to 3.2V, VC-VSS=3.2V 8.6 16 30 ms B Cell1 Over-discharge Threshold VDET2U Detect falling edge of the input voltage 2.322 2.400 2.462 V D Cell1 Release Voltage from Over-discharge Voltage VREL2U Detect rising edge of the input voltage 2.907 3.000 3.082 V D Cell2 Over-discharge Threshold VDET2L Detect falling edge of the input voltage 2.321 2.400 2.463 V E Cell2 Release Voltage from Over-discharge voltage VREL2L Detect rising edge of the input voltage 2.906 3.000 3.079 V E Output Delay of Over-discharge tVDET2 VDD-VC=3.2V to 1.9V VC-VSS =3.2V 73 128 233 ms D Release Delay for VD2 tVREL2 VDD-VC =1.9V to 3.2V VC-VSS =3.2V 0.51 1.2 2.46 ms D Excess Discharge-current Threshold VDET3 Detect rising edge of 'V-' pin voltage 0.181 0.200 0.219 V F Output Delay of Excess Discharge-current tVDET3 VDD-VC=3.2V,VC-VSS=3.2V V-=0V to 0.5V 6.5 12 22.5 ms F Output Delay of Release from Excess Discharge-current tVREL3 VDD-VC=3.2V,VC-VSS=3.2V V-=3V to 0V 0.56 1.2 2.33 ms F Short Protection Voltage Vshort VDD-VC=3.2V,VC-VSS=3.2V 0.54 1.1 1.62 V F Delay Time for Short Protection tshort VDD-VC=3.2V,VC-VSS=3.2V V-=0V to 6.4V 115 300 664 µs F Reset Resistance for Excess Current Protection Rshort VDD-VC=3.2V,VC-VSS=3.2V V-=1V 21.3 40 90.4 kΩ F Excess Charge-current Threshold VDET4 Detect falling edge of 'V-' pin voltage -0.242 -0.200 -0.156 V G Output Delay of Excess Charge-current tVDET4 VDD-VC=3.2V, VC-VSS=3.2V V-=0V to -1V 4 8 15.3 ms G Output Delay of Release from Excess Charge-current tVREL4 VDD-VC=3.2V, VC-VSS=3.2V V-=-1V to 0V 0.55 1.2 2.34 ms G Delay Shortening Mode Voltage VDS VDD-VC=4.0V, VC-VSS=4.0V -2.33 -1.6 -0.81 V G Nch ON-Voltage of COUT VoL1 Iol=50µA, VDD-VC=4.5V VC-VSS=4.5V 0.4 0.5 V H Pch ON-Voltage of COUT VoH1 Ioh=-50µA, VDD-VC=3.2V VC-VSS=3.2V 6.8 7.4 V I Nch ON-Voltage of DOUT VoL2 Iol=50µA, VDD-VC=1.9V VC-VSS=1.9V 0.2 0.5 V J Pch ON-Voltage of DOUT VoH2 Ioh=-50µA, VDD-VC=3.2V VC-VSS=3.2V 6.8 7.4 V K Supply Current IDD VDD-VC=3.2V, VC-VSS=3.2V V-=0V 4.0 9.16 µA L Standby Current Istandby VDD-VC=1.9V, VC-VSS=1.9V 0.14 µA L •: The above-mentioned specification is guaranteed by design, not mass production tested. R5460N208AF - 7/14 - [6] Test Circuits Refer to the note1 of Electrical Characteristics Table. A OSCILLOSCOPE V V- VDD DOUT COUT VSS V B VC COUT V VSS VDD V- C VC COUT V VSS VDD V- D VC DOUT V VSS VDD V- F VC DOUT VSS VDD V- V A E VC DOUT V VSS VDD V- H VC COUT VSS VDD V- V A G VC COUT VSS VDD V- V R5460N208AF - 8/14 - I VC COUT VSS VDD V- V A J VC DOUT VSS VDD V- V A K VC DOUT VSS VDD V- V A L VC A VSS VDD V- R5460N208AF - 9/14 - [7] Operation • VD1 / Over-charge Detector The VDET1x monitors the voltage between VDD pin and Vc pin (the voltage of Cell1) and the voltage between VC pin and VSS pin (the voltage of Cell2), if either voltage becomes equal or more than the over-charge detector threshold (Typ. 4.25V), the over-charge is detected, and an external charge control Nch MOSFET turns off with COUT pin being at "L" level. To reset the over-charge and make the COUT pin level being "H" again, after detecting over-charge, in such conditions that a time when the both Cell1 and Cell2 are down to a level lower than the over-charge released voltage (Typ. 4.05V), or when the both Cell1 and Cell2 are lower than the over-charge detector threshold, by connecting a kind of load to VDD after disconnecting a charger from the battery pack. Then, the output voltage of COUT pin becomes "H", and it makes an external Nch MOSFET turn on, and charge cycle is available. Further, in case that the voltage level of Cell1 and Cell2 is equal or higher than the over-charge detector threshold, when a charger is removed and some load is connected, COUT outputs “L”, however, load current can flow through the parasitic diode of the external charge control Nch MOSFET. After that, when the voltage level of Cell1 and Cell2 becomes lower than the over-charge detector threshold, COUT becomes “H”. Internal fixed output delay time (Typ. 1.0s) for over-charge detection and released delay time (Typ. 16ms) exist. Even when the voltage of Cell1 or Cell2 pin level becomes equal or higher level than VDET if these voltages would be back to a level lower than the over-charge detector threshold within a time period of the output delay time, the over-charge is not detected. Besides, after detecting over-charge, while the voltage level of Cell1 and Cell2 is lower than the over-charge detector threshold, even if a charger is removed and a load is connected, if the voltage is recovered within output delay time (Typ. 16ms) of release from over-charge, over-charge state is not released. A level shifter incorporated in a buffer driver for the COUT pin makes the "L" level of COUT pin to the V - pin voltage and the "H" level of COUT pin is set to VDD voltage with CMOS buffer. • VD2/Over-discharge Detector The VDET2x monitors the voltage between VDD pin and VC pin (Cell1 voltage) and the voltage between VC pin and VSS pin (Cell2 Voltage). When the either voltage becomes equal or less than the over-discharge detector threshold (Typ. 2.40V), the over-discharge is detected and discharge stops by the external discharge control Nch MOSFET turning off with the DOUT pin being at "L" level. To reset the over-discharge detector, connecting a charger is the only method. When the charger is connected, if Cell1 or Cell2 is less than the released voltage from over-discharge (Typ. 3.00V), a charge current flows through the parasitic diode of the external MOSFET. Then, the voltages of Cell1 and Cell2 become higher than the released voltage from over-discharge, DOUT becomes “H” and the external MOSFET turns on and discharge will be possible. When a charger is connected, when the Cell1 and Cell2 voltages become equal or more than the released voltage from over-discharge, the over-discharge is released and the voltage of the DOUT pin becomes “H” after the delay time. The over-discharge voltage detector has hysteresis. When a cell voltage equals to zero, if the voltage of a charger is equal or more than 0V-charge maximum voltage (Vst), COUT pin becomes "H" and a system is allowable to charge. The output delay time for over-discharge detect is fixed internally (Typ. 128ms). Even if the voltage of Cell1 or Cell2 is down to equal or lower than the over-discharge detector threshold, if the voltage of Cell1 or Cell2 would be back to a level higher than the over-discharge detector threshold within a time period of the output delay time, the over-discharge is not detected. Output delay time for release from over-discharge is also fixed internally (Typ. 1.2ms). After detecting over-discharge, supply current would be reduced and be into standby by halting all the circuits and consumption current of the IC itself is made extremely low. (Max. 0.1µA at VDD-VC=VC-Vss=2.0V) The output type of DOUT pin is CMOS having "H" level of VDD and "L" level of VSS. R5460N208AF - 10/14 - • VD3/ Excess Discharge Current Detector, Short Circuit Protector When the charge and discharge is acceptable, these detectors monitor the V- pin voltage. If the V- pin voltage is up to a value equal or more than the excess discharge current detector threshold (Typ. 0.20V) and lower than the short protection voltage Vshort (Typ. 1.1V) the excess discharge current is detected. If the V- pin voltage becomes further higher than Vshort, the short circuit protector is enabled. This leads the external discharge control Nch MOSFET turning off with the DOUT pin being at "L" level to prevent from flowing the large current into the circuit. An output delay time for the excess discharge-current detector is internally fixed (Typ. 12ms). A quick recovery of V- pin level from a value between Vshort and VDET3 within the delay time keeps the discharge control FET staying "H" state. Output delay time for the release from excess discharge-current detection is also fixed internally (Typ. 1.2ms). When the short circuit protector is enabled, the DOUT would be "L" and the delay time is also set (Typ. 300µs). The V - pin has a built-in pull-down resistor to the Vss pin, that is, the resistance (Typ. 40kΩ) to release from excess-discharge current or short circuit. After an excess discharge-current or short circuit protection is detected, removing a cause of excess discharge-current or external short circuit makes an external discharge control FET an "ON" state automatically with the V- pin level being down to the VSS level through the built-in pulled down resistor. (When the V- pin voltage becomes equal or less than excess discharge current threshold, the detector is released.) The reset resistor of excess discharge-current is off when the charge and discharge is acceptable, or normal state. Only when detecting excess discharge-current or short circuit, the resistor is on. Output delay time of excess discharge-current is set shorter than the delay time for over-discharge detector. Therefore, even if the voltage between VDD and VC (Cell1) or the voltage between VC pin and Vss pin (Cell2) becomes lower than VDET2 at the same time as the excess discharge-current is detected, the R5460xxxxxx is at excess discharge-current detection mode. By disconnecting a load, VDET3 is automatically released from excess discharge-current. • VD4/ Excess charge-current detector When the charge and discharge are acceptable, VDET4 senses V- pin voltage. For example, in case that a battery pack is charged by an inappropriate charger, an excess current flows, then the voltage of V- pin becomes equal or less than excess charge-current detector threshold (Typ. -0.20V). Then, the output of COUT becomes "L", and prevents from flowing excess current in the circuit by turning off the external Nch MOSFET. Output delay of excess charge current is internally fixed. (Typ. 8ms) Even the voltage level of V- pin becomes equal or lower than the excess charge-current detector threshold, the voltage is higher than the VDET4 threshold within the delay time, the excess charge current is not detected. Output delay for the release from excess charge current is also set. (Typ. 1.2ms) VDET4 can be released with disconnecting a charger and connecting a load. • DS (Delay Shortening) function Output delay time of over-charge and over-discharge can be made shorter than those setting values by forcing equal or lower than the test shortening mode voltage (Typ. -1.6V) to V- pin. R5460N208AF - 11/14 - [8] Technical Notes (on external components) *Typical Application VDD V- COUT DOUT Vss 1KΩ R5460 R1 330Ω C1 R3 Vc R2 330Ω C2 C3 0.01μF 0.1μF 0.1μF *Technical Notes R1, R2, C1 and C2 stabilize a supply voltage to the R5460xxxxxx. A recommended R1, R2 value is less than 1kΩ. A larger value of R1 and R2 makes the detection voltage shift higher because of some conduction current in the R5460xxxxxx. To stabilize the operation, the value of C1 and C2 should be equal or more than 0.01µF. R1 and R3 can operate also as parts for current limit circuit against reverse charge or applying a charger with excess charging voltage beyond the absolute maximum rating of the R5460xxxxxx, the batt